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net: dm9000: Checkpatch cleanup
Fix checkpatch errors and warnings. No functional change. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
This commit is contained in:
parent
6d3de0f6db
commit
a7bebf8d4d
1 changed files with 126 additions and 125 deletions
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@ -1,53 +1,53 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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dm9000.c: Version 1.2 12/15/2003
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A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
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Copyright (C) 1997 Sten Wang
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(C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
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V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
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06/22/2001 Support DM9801 progrmming
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E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
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E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
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R17 = (R17 & 0xfff0) | NF + 3
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E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
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R17 = (R17 & 0xfff0) | NF
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v1.00 modify by simon 2001.9.5
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change for kernel 2.4.x
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v1.1 11/09/2001 fix force mode bug
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v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
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Fixed phy reset.
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Added tx/rx 32 bit mode.
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Cleaned up for kernel merge.
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--------------------------------------
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12/15/2003 Initial port to u-boot by
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Sascha Hauer <saschahauer@web.de>
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06/03/2008 Remy Bohmer <linux@bohmer.net>
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- Fixed the driver to work with DM9000A.
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(check on ISR receive status bit before reading the
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FIFO as described in DM9000 programming guide and
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application notes)
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- Added autodetect of databus width.
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- Made debug code compile again.
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- Adapt eth_send such that it matches the DM9000*
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application notes. Needed to make it work properly
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for DM9000A.
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- Adapted reset procedure to match DM9000 application
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notes (i.e. double reset)
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- some minor code cleanups
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These changes are tested with DM9000{A,EP,E} together
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with a 200MHz Atmel AT91SAM9261 core
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TODO: external MII is not functional, only internal at the moment.
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*/
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* dm9000.c: Version 1.2 12/15/2003
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*
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* A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
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* Copyright (C) 1997 Sten Wang
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*
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* (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
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*
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* V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
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* 06/22/2001 Support DM9801 progrmming
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* E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
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* E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
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* R17 = (R17 & 0xfff0) | NF + 3
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* E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
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* R17 = (R17 & 0xfff0) | NF
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*
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* v1.00 modify by simon 2001.9.5
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* change for kernel 2.4.x
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*
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* v1.1 11/09/2001 fix force mode bug
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*
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* v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
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* Fixed phy reset.
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* Added tx/rx 32 bit mode.
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* Cleaned up for kernel merge.
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*
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* --------------------------------------
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*
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* 12/15/2003 Initial port to u-boot by
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* Sascha Hauer <saschahauer@web.de>
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*
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* 06/03/2008 Remy Bohmer <linux@bohmer.net>
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* - Fixed the driver to work with DM9000A.
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* (check on ISR receive status bit before reading the
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* FIFO as described in DM9000 programming guide and
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* application notes)
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* - Added autodetect of databus width.
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* - Made debug code compile again.
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* - Adapt eth_send such that it matches the DM9000*
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* application notes. Needed to make it work properly
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* for DM9000A.
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* - Adapted reset procedure to match DM9000 application
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* notes (i.e. double reset)
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* - some minor code cleanups
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* These changes are tested with DM9000{A,EP,E} together
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* with a 200MHz Atmel AT91SAM9261 core
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*
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* TODO: external MII is not functional, only internal at the moment.
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*/
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#include <common.h>
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#include <command.h>
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@ -59,7 +59,7 @@ TODO: external MII is not functional, only internal at the moment.
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#include "dm9000x.h"
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/* Structure/enum declaration ------------------------------- */
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typedef struct board_info {
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struct board_info {
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u32 runt_length_counter; /* counter: RX length < 64byte */
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u32 long_length_counter; /* counter: RX length > 1514byte */
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u32 reset_counter; /* counter: RESET */
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@ -75,9 +75,9 @@ typedef struct board_info {
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void (*inblk)(void *data_ptr, int count);
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void (*rx_status)(u16 *rxstatus, u16 *rxlen);
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struct eth_device netdev;
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} board_info_t;
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static board_info_t dm9000_info;
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};
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static struct board_info dm9000_info;
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/* function declaration ------------------------------------- */
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static int dm9000_probe(void);
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@ -88,9 +88,9 @@ static void dm9000_iow(int reg, u8 value);
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/* DM9000 network board routine ---------------------------- */
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#ifndef CONFIG_DM9000_BYTE_SWAPPED
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#define dm9000_outb(d,r) writeb((d), (r))
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#define dm9000_outw(d,r) writew((d), (r))
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#define dm9000_outl(d,r) writel((d), (r))
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#define dm9000_outb(d, r) writeb((d), (r))
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#define dm9000_outw(d, r) writew((d), (r))
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#define dm9000_outl(d, r) writel((d), (r))
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#define dm9000_inb(r) readb(r)
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#define dm9000_inw(r) readw(r)
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#define dm9000_inl(r) readl(r)
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@ -125,8 +125,9 @@ static void dm9000_dump_packet(const char *func, u8 *packet, int length) {}
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static void dm9000_outblk_8bit(void *data_ptr, int count)
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{
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int i;
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for (i = 0; i < count; i++)
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dm9000_outb((((u8 *) data_ptr)[i] & 0xff), DM9000_DATA);
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dm9000_outb((((u8 *)data_ptr)[i] & 0xff), DM9000_DATA);
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}
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static void dm9000_outblk_16bit(void *data_ptr, int count)
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u32 tmplen = (count + 1) / 2;
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for (i = 0; i < tmplen; i++)
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dm9000_outw(((u16 *) data_ptr)[i], DM9000_DATA);
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dm9000_outw(((u16 *)data_ptr)[i], DM9000_DATA);
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}
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static void dm9000_outblk_32bit(void *data_ptr, int count)
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{
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int i;
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u32 tmplen = (count + 3) / 4;
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for (i = 0; i < tmplen; i++)
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dm9000_outl(((u32 *) data_ptr)[i], DM9000_DATA);
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dm9000_outl(((u32 *)data_ptr)[i], DM9000_DATA);
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}
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static void dm9000_inblk_8bit(void *data_ptr, int count)
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{
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int i;
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for (i = 0; i < count; i++)
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((u8 *) data_ptr)[i] = dm9000_inb(DM9000_DATA);
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((u8 *)data_ptr)[i] = dm9000_inb(DM9000_DATA);
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}
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static void dm9000_inblk_16bit(void *data_ptr, int count)
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u32 tmplen = (count + 1) / 2;
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for (i = 0; i < tmplen; i++)
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((u16 *) data_ptr)[i] = dm9000_inw(DM9000_DATA);
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((u16 *)data_ptr)[i] = dm9000_inw(DM9000_DATA);
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}
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static void dm9000_inblk_32bit(void *data_ptr, int count)
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{
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int i;
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u32 tmplen = (count + 3) / 4;
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for (i = 0; i < tmplen; i++)
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((u32 *) data_ptr)[i] = dm9000_inl(DM9000_DATA);
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((u32 *)data_ptr)[i] = dm9000_inl(DM9000_DATA);
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}
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static void dm9000_rx_status_32bit(u16 *rxstatus, u16 *rxlen)
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}
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/*
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Search DM9000 board, allocate space and register it
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*/
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* Search DM9000 board, allocate space and register it
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*/
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int
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dm9000_probe(void)
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{
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u32 id_val;
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id_val = dm9000_ior(DM9000_VIDL);
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id_val |= dm9000_ior(DM9000_VIDH) << 8;
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id_val |= dm9000_ior(DM9000_PIDL) << 16;
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id_val |= dm9000_ior(DM9000_PIDH) << 24;
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if (id_val == DM9000_ID) {
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printf("dm9000 i/o: 0x%x, id: 0x%x \n", CONFIG_DM9000_BASE,
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id_val);
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return 0;
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} else {
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if (id_val != DM9000_ID) {
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printf("dm9000 not found at 0x%08x id: 0x%08x\n",
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CONFIG_DM9000_BASE, id_val);
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return -1;
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}
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printf("dm9000 i/o: 0x%x, id: 0x%x\n", CONFIG_DM9000_BASE, id_val);
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return 0;
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}
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/* General Purpose dm9000 reset routine */
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{
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debug("resetting DM9000\n");
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/* Reset DM9000,
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see DM9000 Application Notes V1.22 Jun 11, 2004 page 29 */
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/*
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* Reset DM9000,
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* see DM9000 Application Notes V1.22 Jun 11, 2004 page 29
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*/
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/* DEBUG: Make all GPIO0 outputs, all others inputs */
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dm9000_iow(DM9000_GPCR, GPCR_GPIO0_OUT);
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printf("ERROR: resetting DM9000 -> not responding\n");
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}
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/* Initialize dm9000 board
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*/
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/* Initialize dm9000 board */
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static int dm9000_init(struct eth_device *dev, struct bd_info *bd)
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{
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int i, oft, lnk;
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u8 io_mode;
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struct board_info *db = &dm9000_info;
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debug("%s\n", __func__);
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/* RESET device */
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dm9000_reset();
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dm9000_iow(DM9000_ISR, ISR_ROOS | ISR_ROS | ISR_PTS | ISR_PRS);
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printf("MAC: %pM\n", dev->enetaddr);
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if (!is_valid_ethaddr(dev->enetaddr)) {
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if (!is_valid_ethaddr(dev->enetaddr))
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printf("WARNING: Bad MAC address (uninitialized EEPROM?)\n");
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}
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/* fill device MAC address registers */
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for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
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}
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/*
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Hardware start transmission.
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Send a packet to media from the upper layer.
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*/
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* Hardware start transmission.
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* Send a packet to media from the upper layer.
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*/
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static int dm9000_send(struct eth_device *netdev, void *packet, int length)
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{
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int tmo;
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struct board_info *db = &dm9000_info;
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dm9000_dump_packet(__func__ , packet, length);
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dm9000_dump_packet(__func__, packet, length);
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dm9000_iow(DM9000_ISR, IMR_PTM); /* Clear Tx bit in ISR */
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dm9000_outb(DM9000_MWCMD, DM9000_IO); /* Prepare for TX-data */
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/* push the data to the TX-fifo */
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(db->outblk)(packet, length);
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db->outblk(packet, length);
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/* Set TX length to DM9000 */
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dm9000_iow(DM9000_TXPLL, length & 0xff);
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/* wait for end of transmission */
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tmo = get_timer(0) + 5 * CONFIG_SYS_HZ;
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while ( !(dm9000_ior(DM9000_NSR) & (NSR_TX1END | NSR_TX2END)) ||
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!(dm9000_ior(DM9000_ISR) & IMR_PTM) ) {
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while (!(dm9000_ior(DM9000_NSR) & (NSR_TX1END | NSR_TX2END)) ||
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!(dm9000_ior(DM9000_ISR) & IMR_PTM)) {
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if (get_timer(0) >= tmo) {
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printf("transmission timeout\n");
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break;
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}
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/*
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Stop the interface.
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The interface is stopped when it is brought.
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*/
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* Stop the interface.
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* The interface is stopped when it is brought.
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*/
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static void dm9000_halt(struct eth_device *netdev)
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{
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debug("%s\n", __func__);
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/* RESET devie */
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/* RESET device */
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dm9000_phy_write(0, 0x8000); /* PHY RESET */
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dm9000_iow(DM9000_GPR, 0x01); /* Power-Down PHY */
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dm9000_iow(DM9000_IMR, 0x80); /* Disable all interrupt */
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}
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/*
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Received a packet and pass to upper layer
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*/
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* Received a packet and pass to upper layer
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*/
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static int dm9000_rx(struct eth_device *netdev)
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{
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u8 rxbyte;
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u16 rxstatus, rxlen = 0;
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struct board_info *db = &dm9000_info;
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/* Check packet ready or not, we must check
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the ISR status first for DM9000A */
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/*
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* Check packet ready or not, we must check
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* the ISR status first for DM9000A
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*/
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if (!(dm9000_ior(DM9000_ISR) & 0x01)) /* Rx-ISR bit must be set. */
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return 0;
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@ -455,8 +457,10 @@ static int dm9000_rx(struct eth_device *netdev)
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for (;;) {
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dm9000_ior(DM9000_MRCMDX); /* Dummy read */
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/* Get most updated data,
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only look at bits 0:1, See application notes DM9000 */
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/*
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* Get most updated data,
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* only look at bits 0:1, See application notes DM9000
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*/
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rxbyte = dm9000_inb(DM9000_DATA) & 0x03;
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/* Status check: this byte must be 0 or 1 */
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@ -464,7 +468,7 @@ static int dm9000_rx(struct eth_device *netdev)
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dm9000_iow(DM9000_RCR, 0x00); /* Stop Device */
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dm9000_iow(DM9000_ISR, 0x80); /* Stop INT request */
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printf("DM9000 error: status check fail: 0x%x\n",
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rxbyte);
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rxbyte);
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return 0;
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}
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@ -474,31 +478,28 @@ static int dm9000_rx(struct eth_device *netdev)
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debug("receiving packet\n");
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/* A packet ready now & Get status/length */
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(db->rx_status)(&rxstatus, &rxlen);
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db->rx_status(&rxstatus, &rxlen);
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debug("rx status: 0x%04x rx len: %d\n", rxstatus, rxlen);
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/* Move data from DM9000 */
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/* Read received packet from RX SRAM */
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(db->inblk)(rdptr, rxlen);
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db->inblk(rdptr, rxlen);
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if ((rxstatus & 0xbf00) || (rxlen < 0x40)
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|| (rxlen > DM9000_PKT_MAX)) {
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if (rxstatus & 0x100) {
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if (rxstatus & 0xbf00 || rxlen < 0x40 ||
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rxlen > DM9000_PKT_MAX) {
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if (rxstatus & 0x100)
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printf("rx fifo error\n");
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}
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if (rxstatus & 0x200) {
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if (rxstatus & 0x200)
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printf("rx crc error\n");
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}
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if (rxstatus & 0x8000) {
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if (rxstatus & 0x8000)
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printf("rx length error\n");
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}
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if (rxlen > DM9000_PKT_MAX) {
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printf("rx length too big\n");
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dm9000_reset();
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}
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} else {
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dm9000_dump_packet(__func__ , rdptr, rxlen);
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dm9000_dump_packet(__func__, rdptr, rxlen);
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debug("passing packet to upper layer\n");
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net_process_received_packet(net_rx_packets[0], rxlen);
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@ -508,14 +509,14 @@ static int dm9000_rx(struct eth_device *netdev)
|
|||
}
|
||||
|
||||
/*
|
||||
Read a word data from SROM
|
||||
*/
|
||||
* Read a word data from SROM
|
||||
*/
|
||||
#if !defined(CONFIG_DM9000_NO_SROM)
|
||||
void dm9000_read_srom_word(int offset, u8 *to)
|
||||
{
|
||||
dm9000_iow(DM9000_EPAR, offset);
|
||||
dm9000_iow(DM9000_EPCR, 0x4);
|
||||
udelay(8000);
|
||||
mdelay(8);
|
||||
dm9000_iow(DM9000_EPCR, 0x0);
|
||||
to[0] = dm9000_ior(DM9000_EPDRL);
|
||||
to[1] = dm9000_ior(DM9000_EPDRH);
|
||||
|
@ -527,23 +528,24 @@ void dm9000_write_srom_word(int offset, u16 val)
|
|||
dm9000_iow(DM9000_EPDRH, ((val >> 8) & 0xff));
|
||||
dm9000_iow(DM9000_EPDRL, (val & 0xff));
|
||||
dm9000_iow(DM9000_EPCR, 0x12);
|
||||
udelay(8000);
|
||||
mdelay(8);
|
||||
dm9000_iow(DM9000_EPCR, 0);
|
||||
}
|
||||
#endif
|
||||
|
||||
static void dm9000_get_enetaddr(struct eth_device *dev)
|
||||
{
|
||||
#if !defined(CONFIG_DM9000_NO_SROM)
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 3; i++)
|
||||
dm9000_read_srom_word(i, dev->enetaddr + (2 * i));
|
||||
#endif
|
||||
}
|
||||
#else
|
||||
static void dm9000_get_enetaddr(struct eth_device *dev) {}
|
||||
#endif
|
||||
|
||||
/*
|
||||
Read a byte from I/O port
|
||||
*/
|
||||
* Read a byte from I/O port
|
||||
*/
|
||||
static u8
|
||||
dm9000_ior(int reg)
|
||||
{
|
||||
|
@ -552,8 +554,8 @@ dm9000_ior(int reg)
|
|||
}
|
||||
|
||||
/*
|
||||
Write a byte to I/O port
|
||||
*/
|
||||
* Write a byte to I/O port
|
||||
*/
|
||||
static void
|
||||
dm9000_iow(int reg, u8 value)
|
||||
{
|
||||
|
@ -562,8 +564,8 @@ dm9000_iow(int reg, u8 value)
|
|||
}
|
||||
|
||||
/*
|
||||
Read a word from phyxcer
|
||||
*/
|
||||
* Read a word from phyxcer
|
||||
*/
|
||||
static u16
|
||||
dm9000_phy_read(int reg)
|
||||
{
|
||||
|
@ -577,17 +579,16 @@ dm9000_phy_read(int reg)
|
|||
val = (dm9000_ior(DM9000_EPDRH) << 8) | dm9000_ior(DM9000_EPDRL);
|
||||
|
||||
/* The read data keeps on REG_0D & REG_0E */
|
||||
debug("dm9000_phy_read(0x%x): 0x%x\n", reg, val);
|
||||
debug("%s(0x%x): 0x%x\n", __func__, reg, val);
|
||||
return val;
|
||||
}
|
||||
|
||||
/*
|
||||
Write a word to phyxcer
|
||||
*/
|
||||
* Write a word to phyxcer
|
||||
*/
|
||||
static void
|
||||
dm9000_phy_write(int reg, u16 value)
|
||||
{
|
||||
|
||||
/* Fill the phyxcer register into REG_0C */
|
||||
dm9000_iow(DM9000_EPAR, DM9000_PHY | reg);
|
||||
|
||||
|
@ -597,12 +598,12 @@ dm9000_phy_write(int reg, u16 value)
|
|||
dm9000_iow(DM9000_EPCR, 0xa); /* Issue phyxcer write command */
|
||||
udelay(500); /* Wait write complete */
|
||||
dm9000_iow(DM9000_EPCR, 0x0); /* Clear phyxcer write command */
|
||||
debug("dm9000_phy_write(reg:0x%x, value:0x%x)\n", reg, value);
|
||||
debug("%s(reg:0x%x, value:0x%x)\n", __func__, reg, value);
|
||||
}
|
||||
|
||||
int dm9000_initialize(struct bd_info *bis)
|
||||
{
|
||||
struct eth_device *dev = &(dm9000_info.netdev);
|
||||
struct eth_device *dev = &dm9000_info.netdev;
|
||||
|
||||
/* Load MAC address from EEPROM */
|
||||
dm9000_get_enetaddr(dev);
|
||||
|
|
Loading…
Reference in a new issue