mirror of
https://github.com/AsahiLinux/u-boot
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- doc: fix code examples in qemu-mips.rst
- mips: vcoreiii: fix memtest and cache coherency issues - cmd/go: fix cache coherency issues on MIPS -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiQkHUH+J02LLC9InKPlOlyTyXBgFAl6PWTUACgkQKPlOlyTy XBhVtxAApyoiTJU3EDEwHQ1QFAz90kNpazc2H4BvyXcVfTUWjKC4kIMYFxb+EGdt RE/ndNc3ghC50uPsmVEZ3pDfY97v3LKhDwm++Evr8ge3bmtOtJJ4y+mFvjQ87+cv 1LoBbTv5YRn0EzztBpgap+cqwA+vaXdN+h2YQRtGUqTI3EwKmXwc8PP+wQVh5rvG tcWsPk1F4+0YaCJ0iazh7Vhf0eAuaHN/yLFfQLLGJeVU3zl4OBHXZCLK9grdKNsb vIAR1dQpVFwCr1UqtGaeHLtsqulZM3qRYjBhsMphwUm5Ej0qdgGhvY3LqcHNkHGY e601DUVnZ8AC5LFRuDksxni5qX5NDuiZ3OZEfLwOOKzeObVKZqf+GA9yexntlepz 98gqjl/ZChAQ9Ufg3wPIwiF9f5L/j8VmFDf68n/wzegsoOH83D8oMFwJxrXQues5 OkyBHSjRB92bfHV1x6itQ38jdNbrwPxrrlN/dUox/bYFJM/MsETBhRyrT6sylKxx YJrGiHj394Tp5y+bhfTo97so45NgyPniEOiLkRdJ4UAxrhCtQblGZMeL/GLbcSdZ dsC9zOsY/7HO6sIEabedyGNGF0pZLKheNnLT/7wqkhbdEjKBuGscyAjqKfUb+AUz msFtjCATPbxwoo7/ERhqeaBmwSKvKL1ztrVVstRc15zM9XN2IhI= =YMwd -----END PGP SIGNATURE----- Merge tag 'mips-fixes-for-2020.04' of git://git.denx.de/u-boot-mips - doc: fix code examples in qemu-mips.rst - mips: vcoreiii: fix memtest and cache coherency issues - cmd/go: fix cache coherency issues on MIPS
This commit is contained in:
commit
a7ae587f93
10 changed files with 114 additions and 69 deletions
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@ -13,7 +13,7 @@ unsigned long notrace timer_read_counter(void)
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return read_c0_count();
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}
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ulong notrace get_tbclk(void)
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ulong notrace __weak get_tbclk(void)
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{
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return CONFIG_SYS_MIPS_TIMER_FREQ;
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}
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@ -11,5 +11,6 @@ obj-y += stack.o
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obj-y += traps.o
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obj-$(CONFIG_CMD_BOOTM) += bootm.o
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obj-$(CONFIG_CMD_GO) += boot.o
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lib-$(CONFIG_USE_PRIVATE_LIBGCC) += ashldi3.o ashrdi3.o lshrdi3.o
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23
arch/mips/lib/boot.c
Normal file
23
arch/mips/lib/boot.c
Normal file
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@ -0,0 +1,23 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2020 Stefan Roese <sr@denx.de>
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*/
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#include <common.h>
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#include <command.h>
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#include <cpu_func.h>
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DECLARE_GLOBAL_DATA_PTR;
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unsigned long do_go_exec(ulong (*entry)(int, char * const []),
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int argc, char * const argv[])
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{
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/*
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* Flush cache before jumping to application. Let's flush the
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* whole SDRAM area, since we don't know the size of the image
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* that was loaded.
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*/
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flush_cache(gd->bd->bi_memstart, gd->ram_top - gd->bd->bi_memstart);
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return entry(argc, argv);
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}
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@ -141,7 +141,7 @@ ops_done:
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instruction_hazard_barrier();
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}
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void flush_dcache_range(ulong start_addr, ulong stop)
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void __weak flush_dcache_range(ulong start_addr, ulong stop)
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{
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unsigned long lsize = dcache_line_size();
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unsigned long slsize = scache_line_size();
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@ -7,6 +7,7 @@
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#include <asm/io.h>
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#include <asm/types.h>
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#include <asm/mipsregs.h>
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#include <mach/tlb.h>
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#include <mach/ddr.h>
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@ -53,7 +54,6 @@ void vcoreiii_tlb_init(void)
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MMU_REGIO_RW);
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#endif
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#if CONFIG_SYS_TEXT_BASE == MSCC_FLASH_TO
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/*
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* If U-Boot is located in NOR then we want to be able to use
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* the data cache in order to boot in a decent duration
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@ -71,9 +71,10 @@ void vcoreiii_tlb_init(void)
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create_tlb(tlbix++, MSCC_DDR_TO, MSCC_RAM_TLB_SIZE, MMU_REGIO_RW,
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MSCC_ATTRIB2);
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/* Enable caches by clearing the bit ERL, which is set on reset */
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write_c0_status(read_c0_status() & ~BIT(2));
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#endif /* CONFIG_SYS_TEXT_BASE */
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/* Enable mapping (using TLB) kuseg by clearing the bit ERL,
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* which is set on reset.
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*/
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write_c0_status(read_c0_status() & ~ST0_ERL);
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}
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int mach_cpu_init(void)
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@ -31,7 +31,7 @@ static inline int vcoreiii_train_bytelane(void)
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int vcoreiii_ddr_init(void)
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{
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int res;
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register int res;
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if (!(readl(BASE_CFG + ICPU_MEMCTRL_STAT)
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& ICPU_MEMCTRL_STAT_INIT_DONE)) {
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@ -40,20 +40,19 @@ int vcoreiii_ddr_init(void)
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if (hal_vcoreiii_init_dqs() || vcoreiii_train_bytelane())
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hal_vcoreiii_ddr_failed();
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}
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#if (CONFIG_SYS_TEXT_BASE != 0x20000000)
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res = dram_check();
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if (res == 0)
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hal_vcoreiii_ddr_verified();
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else
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hal_vcoreiii_ddr_failed();
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/* Clear boot-mode and read-back to activate/verify */
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/* Remap DDR to kuseg: Clear boot-mode */
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clrbits_le32(BASE_CFG + ICPU_GENERAL_CTRL,
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ICPU_GENERAL_CTRL_BOOT_MODE_ENA);
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/* - and read-back to activate/verify */
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readl(BASE_CFG + ICPU_GENERAL_CTRL);
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#else
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res = 0;
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#endif
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return res;
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}
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@ -66,9 +65,6 @@ int print_cpuinfo(void)
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int dram_init(void)
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{
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while (vcoreiii_ddr_init())
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;
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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@ -435,16 +435,12 @@ static inline void hal_vcoreiii_ddr_failed(void)
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reset = KSEG0ADDR(_machine_restart);
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icache_lock((void *)reset, 128);
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asm volatile ("jr %0"::"r" (reset));
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panic("DDR init failed\n");
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}
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#else /* JR2 || ServalT */
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static inline void hal_vcoreiii_ddr_failed(void)
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{
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writel(0, BASE_CFG + ICPU_RESET);
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writel(PERF_SOFT_RST_SOFT_CHIP_RST, BASE_CFG + PERF_SOFT_RST);
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panic("DDR init failed\n");
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}
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#endif
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@ -8,6 +8,7 @@
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.set noreorder
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.extern vcoreiii_tlb_init
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.extern vcoreiii_ddr_init
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#ifdef CONFIG_SOC_LUTON
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.extern pll_init
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#endif
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* As we have no stack yet, we can assume the restricted
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* luxury of the sX-registers without saving them
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*/
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move s0,ra
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/* Modify ra/s0 such we return to physical NOR location */
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li t0, 0x0fffffff
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li t1, CONFIG_SYS_TEXT_BASE
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and s0, ra, t0
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add s0, s0, t1
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jal vcoreiii_tlb_init
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nop
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#ifdef CONFIG_SOC_LUTON
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jal pll_init
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nop
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#endif
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/* Initialize DDR controller to enable stack/gd/heap */
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0:
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jal vcoreiii_ddr_init
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nop
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bnez v0, 0b /* Retry on error */
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nop
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jr s0
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nop
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END(lowlevel_init)
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@ -25,37 +25,45 @@ Example usage
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Using u-boot.bin as ROM (replaces Qemu monitor):
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32 bit, big endian::
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32 bit, big endian
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# make qemu_mips
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# qemu-system-mips -M mips -bios u-boot.bin -nographic
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.. code-block:: bash
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32 bit, little endian::
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make qemu_mips
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qemu-system-mips -M mips -bios u-boot.bin -nographic
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# make qemu_mipsel
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# qemu-system-mipsel -M mips -bios u-boot.bin -nographic
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32 bit, little endian
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64 bit, big endian::
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.. code-block:: bash
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# make qemu_mips64
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# qemu-system-mips64 -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic
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make qemu_mipsel
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qemu-system-mipsel -M mips -bios u-boot.bin -nographic
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64 bit, little endian::
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64 bit, big endian
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# make qemu_mips64el
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# qemu-system-mips64el -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic
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.. code-block:: bash
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make qemu_mips64
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qemu-system-mips64 -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic
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64 bit, little endian
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.. code-block:: bash
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make qemu_mips64el
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qemu-system-mips64el -cpu MIPS64R2-generic -M mips -bios u-boot.bin -nographic
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or using u-boot.bin from emulated flash:
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if you use a qemu version after commit 4224
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if you use a QEMU version after commit 4224
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.. code-block:: none
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.. code-block:: bash
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create image:
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# dd of=flash bs=1k count=4k if=/dev/zero
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# dd of=flash bs=1k conv=notrunc if=u-boot.bin
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start it (see above):
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# qemu-system-mips[64][el] [-cpu MIPS64R2-generic] -M mips -pflash flash -nographic
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# create image:
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dd of=flash bs=1k count=4k if=/dev/zero
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dd of=flash bs=1k conv=notrunc if=u-boot.bin
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# start it (see above):
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qemu-system-mips[64][el] [-cpu MIPS64R2-generic] -M mips -pflash flash -nographic
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Download kernel + initrd
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^^^^^^^^^^^^^^^^^^^^^^^^
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Generate uImage
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^^^^^^^^^^^^^^^
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.. code-block:: none
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.. code-block:: bash
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# tools/mkimage -A mips -O linux -T kernel -C gzip -a 0x80010000 -e 0x80245650 -n "Linux 2.6.24.y" -d vmlinux.bin.gz uImage
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tools/mkimage -A mips -O linux -T kernel -C gzip -a 0x80010000 -e 0x80245650 -n "Linux 2.6.24.y" -d vmlinux.bin.gz uImage
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Copy uImage to Flash
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^^^^^^^^^^^^^^^^^^^^
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.. code-block:: none
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.. code-block:: bash
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# dd if=uImage bs=1k conv=notrunc seek=224 of=flash
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dd if=uImage bs=1k conv=notrunc seek=224 of=flash
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Generate Ide Disk
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^^^^^^^^^^^^^^^^^
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.. code-block:: none
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.. code-block:: bash
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# dd of=ide bs=1k cout=100k if=/dev/zero
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dd of=ide bs=1k count=100k if=/dev/zero
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# sfdisk -C 261 -d ide
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# partition table of ide
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# Create partion table
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sudo sfdisk ide << EOF
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label: dos
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label-id: 0x6fe3a999
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device: image
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unit: sectors
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ide1 : start= 63, size= 32067, Id=83
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ide2 : start= 32130, size= 32130, Id=83
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ide3 : start= 64260, size= 4128705, Id=83
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ide4 : start= 0, size= 0, Id= 0
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image1 : start= 63, size= 32067, Id=83
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image2 : start= 32130, size= 32130, Id=83
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image3 : start= 64260, size= 4128705, Id=83
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EOF
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Copy to ide
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^^^^^^^^^^^
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.. code-block:: none
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.. code-block:: bash
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# dd if=uImage bs=512 conv=notrunc seek=63 of=ide
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dd if=uImage bs=512 conv=notrunc seek=63 of=ide
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Generate ext2 on part 2 on Copy uImage and initrd.gz
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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.. code-block:: none
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.. code-block:: bash
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# Attached as loop device ide offset = 32130 * 512
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# losetup -o 16450560 -f ide
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sudo losetup -o 16450560 /dev/loop0 ide
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# Format as ext2 ( arg2 : nb blocks)
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# mke2fs /dev/loop0 16065
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# losetup -d /dev/loop0
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sudo mkfs.ext2 /dev/loop0 16065
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sudo losetup -d /dev/loop0
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# Mount and copy uImage and initrd.gz to it
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# mount -o loop,offset=16450560 -t ext2 ide /mnt
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# mkdir /mnt/boot
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# cp {initrd.gz,uImage} /mnt/boot/
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sudo mount -o loop,offset=16450560 -t ext2 ide /mnt
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sudo mkdir /mnt/boot
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cp {initrd.gz,uImage} /mnt/boot/
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# Umount it
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# umount /mnt
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sudo umount /mnt
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Set Environment
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^^^^^^^^^^^^^^^
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.. code-block:: none
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.. code-block:: bash
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setenv rd_start 0x80800000
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setenv rd_size 2663940
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@ -157,9 +167,11 @@ Set Environment
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setenv addmisc 'setenv bootargs ${bootargs} console=ttyS0,${baudrate} rd_start=${rd_start} rd_size=${rd_size} ethaddr=${ethaddr}'
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setenv bootcmd 'run boot_tftp_flash'
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Now you can boot from flash, ide, ide+ext2 and tfp::
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Now you can boot from flash, ide, ide+ext2 and tfp
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# qemu-system-mips -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide
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.. code-block:: bash
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qemu-system-mips -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide
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How to debug U-Boot
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@ -168,9 +180,9 @@ How to debug U-Boot
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In order to debug U-Boot you need to start qemu with gdb server support (-s)
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and waiting the connection to start the CPU (-S)
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.. code-block:: none
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.. code-block:: bash
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# qemu-system-mips -S -s -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide
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qemu-system-mips -S -s -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide
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in an other console you start gdb
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@ -182,7 +194,7 @@ by connecting to the gdb server localhost:1234
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.. code-block:: none
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# mipsel-unknown-linux-gnu-gdb u-boot
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$ mipsel-unknown-linux-gnu-gdb u-boot
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GNU gdb 6.6
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Copyright (C) 2006 Free Software Foundation, Inc.
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GDB is free software, covered by the GNU General Public License, and you are
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|
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@ -39,7 +39,8 @@
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - SZ_1M)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + \
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CONFIG_SYS_SDRAM_SIZE - SZ_4M)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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|
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Loading…
Add table
Reference in a new issue