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arm: dts: am3517_evm: Sync DTS files with Linux 4.13-RC5
To keep the DTS and DTSI files clean and in sync with Linux, new u-boot.dtsi files are added. There are some spacing issues in the patch, but they appear to be present in the Linux source files. I'll try to get to fixing them there, and do a future re-sync at a later date. Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
This commit is contained in:
Adam Ford
Tom Rini
parent
4e1102f6de
commit
a56fd949a5
5 changed files with 318 additions and 0 deletions
12
arch/arm/dts/am3517-evm-u-boot.dtsi
Normal file
12
arch/arm/dts/am3517-evm-u-boot.dtsi
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@ -0,0 +1,12 @@
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/*
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* Copyright (C) 2017
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* Logic PD - http://www.logicpd.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/ {
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chosen {
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stdout-path = &uart3;
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};
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};
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61
arch/arm/dts/am3517-evm.dts
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61
arch/arm/dts/am3517-evm.dts
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@ -0,0 +1,61 @@
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/*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "am3517.dtsi"
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/ {
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model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
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compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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vmmc_fixed: vmmc {
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compatible = "regulator-fixed";
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regulator-name = "vmmc_fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&davinci_emac {
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status = "okay";
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};
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&davinci_mdio {
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <400000>;
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};
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&i2c2 {
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clock-frequency = <400000>;
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};
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&i2c3 {
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clock-frequency = <400000>;
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};
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&mmc1 {
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vmmc-supply = <&vmmc_fixed>;
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bus-width = <4>;
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};
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&mmc2 {
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status = "disabled";
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};
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&mmc3 {
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status = "disabled";
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};
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10
arch/arm/dts/am3517-u-boot.dtsi
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10
arch/arm/dts/am3517-u-boot.dtsi
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@ -0,0 +1,10 @@
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/*
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* Copyright (C) 2017
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* Logic PD - http://www.logicpd.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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&uart4 {
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reg-shift = <2>;
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};
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107
arch/arm/dts/am3517.dtsi
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107
arch/arm/dts/am3517.dtsi
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@ -0,0 +1,107 @@
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/*
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* Device Tree Source for am3517 SoC
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include "omap3.dtsi"
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/ {
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aliases {
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serial3 = &uart4;
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can = &hecc;
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};
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ocp@68000000 {
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am35x_otg_hs: am35x_otg_hs@5c040000 {
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compatible = "ti,omap3-musb";
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ti,hwmods = "am35x_otg_hs";
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status = "disabled";
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reg = <0x5c040000 0x1000>;
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interrupts = <71>;
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interrupt-names = "mc";
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};
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davinci_emac: ethernet@0x5c000000 {
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compatible = "ti,am3517-emac";
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ti,hwmods = "davinci_emac";
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status = "disabled";
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reg = <0x5c000000 0x30000>;
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interrupts = <67 68 69 70>;
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syscon = <&scm_conf>;
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ti,davinci-ctrl-reg-offset = <0x10000>;
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ti,davinci-ctrl-mod-reg-offset = <0>;
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ti,davinci-ctrl-ram-offset = <0x20000>;
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ti,davinci-ctrl-ram-size = <0x2000>;
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ti,davinci-rmii-en = /bits/ 8 <1>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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};
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davinci_mdio: ethernet@0x5c030000 {
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compatible = "ti,davinci_mdio";
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ti,hwmods = "davinci_mdio";
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status = "disabled";
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reg = <0x5c030000 0x1000>;
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bus_freq = <1000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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uart4: serial@4809e000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart4";
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status = "disabled";
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reg = <0x4809e000 0x400>;
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interrupts = <84>;
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dmas = <&sdma 55 &sdma 54>;
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dma-names = "tx", "rx";
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clock-frequency = <48000000>;
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};
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omap3_pmx_core2: pinmux@480025d8 {
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compatible = "ti,omap3-padconf", "pinctrl-single";
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reg = <0x480025d8 0x24>;
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#address-cells = <1>;
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#size-cells = <0>;
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#pinctrl-cells = <1>;
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#interrupt-cells = <1>;
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interrupt-controller;
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0xff1f>;
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};
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hecc: can@5c050000 {
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compatible = "ti,am3517-hecc";
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status = "disabled";
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reg = <0x5c050000 0x80>,
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<0x5c053000 0x180>,
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<0x5c052000 0x200>;
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reg-names = "hecc", "hecc-ram", "mbx";
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interrupts = <24>;
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clocks = <&hecc_ck>;
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};
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};
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};
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&iva {
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status = "disabled";
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};
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&mailbox {
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status = "disabled";
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};
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&mmu_isp {
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status = "disabled";
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};
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&smartreflex_mpu_iva {
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status = "disabled";
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};
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/include/ "am35xx-clocks.dtsi"
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/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
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128
arch/arm/dts/am35xx-clocks.dtsi
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128
arch/arm/dts/am35xx-clocks.dtsi
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@ -0,0 +1,128 @@
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/*
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* Device Tree Source for OMAP3 clock data
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*
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* Copyright (C) 2013 Texas Instruments, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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&scm_clocks {
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emac_ick: emac_ick@32c {
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#clock-cells = <0>;
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compatible = "ti,am35xx-gate-clock";
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clocks = <&ipss_ick>;
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reg = <0x032c>;
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ti,bit-shift = <1>;
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};
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emac_fck: emac_fck@32c {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&rmii_ck>;
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reg = <0x032c>;
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ti,bit-shift = <9>;
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};
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vpfe_ick: vpfe_ick@32c {
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#clock-cells = <0>;
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compatible = "ti,am35xx-gate-clock";
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clocks = <&ipss_ick>;
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reg = <0x032c>;
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ti,bit-shift = <2>;
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};
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vpfe_fck: vpfe_fck@32c {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&pclk_ck>;
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reg = <0x032c>;
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ti,bit-shift = <10>;
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};
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hsotgusb_ick_am35xx: hsotgusb_ick_am35xx@32c {
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#clock-cells = <0>;
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compatible = "ti,am35xx-gate-clock";
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clocks = <&ipss_ick>;
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reg = <0x032c>;
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ti,bit-shift = <0>;
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};
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hsotgusb_fck_am35xx: hsotgusb_fck_am35xx@32c {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&sys_ck>;
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reg = <0x032c>;
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ti,bit-shift = <8>;
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};
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hecc_ck: hecc_ck@32c {
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#clock-cells = <0>;
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compatible = "ti,am35xx-gate-clock";
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clocks = <&sys_ck>;
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reg = <0x032c>;
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ti,bit-shift = <3>;
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};
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};
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&cm_clocks {
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ipss_ick: ipss_ick@a10 {
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#clock-cells = <0>;
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compatible = "ti,am35xx-interface-clock";
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clocks = <&core_l3_ick>;
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reg = <0x0a10>;
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ti,bit-shift = <4>;
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};
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rmii_ck: rmii_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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};
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pclk_ck: pclk_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <27000000>;
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};
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uart4_ick_am35xx: uart4_ick_am35xx@a10 {
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#clock-cells = <0>;
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compatible = "ti,omap3-interface-clock";
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clocks = <&core_l4_ick>;
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reg = <0x0a10>;
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ti,bit-shift = <23>;
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};
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uart4_fck_am35xx: uart4_fck_am35xx@a00 {
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#clock-cells = <0>;
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compatible = "ti,wait-gate-clock";
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clocks = <&core_48m_fck>;
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reg = <0x0a00>;
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ti,bit-shift = <23>;
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};
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};
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&cm_clockdomains {
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core_l3_clkdm: core_l3_clkdm {
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compatible = "ti,clockdomain";
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clocks = <&sdrc_ick>, <&ipss_ick>, <&emac_ick>, <&vpfe_ick>,
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<&hsotgusb_ick_am35xx>, <&hsotgusb_fck_am35xx>,
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<&hecc_ck>;
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};
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core_l4_clkdm: core_l4_clkdm {
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compatible = "ti,clockdomain";
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clocks = <&cpefuse_fck>, <&ts_fck>, <&usbtll_fck>,
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<&usbtll_ick>, <&mmchs3_ick>, <&mmchs3_fck>,
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<&mmchs2_fck>, <&mmchs1_fck>, <&i2c3_fck>, <&i2c2_fck>,
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<&i2c1_fck>, <&mcspi4_fck>, <&mcspi3_fck>,
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<&mcspi2_fck>, <&mcspi1_fck>, <&uart2_fck>,
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<&uart1_fck>, <&hdq_fck>, <&mmchs2_ick>, <&mmchs1_ick>,
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<&hdq_ick>, <&mcspi4_ick>, <&mcspi3_ick>,
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<&mcspi2_ick>, <&mcspi1_ick>, <&i2c3_ick>, <&i2c2_ick>,
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<&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
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<&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
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<&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
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<&uart4_ick_am35xx>, <&uart4_fck_am35xx>;
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};
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};
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