diff --git a/board/amirix/ap1000/serial.c b/board/amirix/ap1000/serial.c
index 5e9e3a31ee..811f1aa7a2 100644
--- a/board/amirix/ap1000/serial.c
+++ b/board/amirix/ap1000/serial.c
@@ -19,6 +19,7 @@
  *
  */
 
+#include <asm/types.h>
 #include <asm/u-boot.h>
 #include <asm/processor.h>
 #include <common.h>
diff --git a/board/exbitgen/exbitgen.c b/board/exbitgen/exbitgen.c
index 0b08a39f90..8460893114 100644
--- a/board/exbitgen/exbitgen.c
+++ b/board/exbitgen/exbitgen.c
@@ -1,3 +1,4 @@
+#include <asm/types.h>
 #include <asm/u-boot.h>
 #include <asm/processor.h>
 #include <common.h>
diff --git a/board/exbitgen/flash.c b/board/exbitgen/flash.c
index ae88994b2c..dddd06effa 100644
--- a/board/exbitgen/flash.c
+++ b/board/exbitgen/flash.c
@@ -28,6 +28,7 @@
  * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
  */
 
+#include <asm/types.h>
 #include <asm/u-boot.h>
 #include <asm/processor.h>
 #include <ppc4xx.h>
diff --git a/board/ml2/serial.c b/board/ml2/serial.c
index 659314572a..2e9ffa29ba 100644
--- a/board/ml2/serial.c
+++ b/board/ml2/serial.c
@@ -19,6 +19,7 @@
  *
  */
 
+#include <asm/types.h>
 #include <asm/u-boot.h>
 #include <asm/processor.h>
 #include <common.h>
diff --git a/board/xilinx/ml300/serial.c b/board/xilinx/ml300/serial.c
index ba41f856e4..ff5cadbe70 100644
--- a/board/xilinx/ml300/serial.c
+++ b/board/xilinx/ml300/serial.c
@@ -36,6 +36,7 @@
  *
  */
 
+#include <asm/types.h>
 #include <asm/u-boot.h>
 #include <asm/processor.h>
 #include <common.h>
diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c
index 1e9423a89b..ac64279051 100644
--- a/cpu/ppc4xx/cpu_init.c
+++ b/cpu/ppc4xx/cpu_init.c
@@ -138,8 +138,8 @@ void reconfigure_pll(u32 new_cpu_freq)
 void
 cpu_init_f (void)
 {
-#if defined(CONFIG_WATCHDOG)
-	unsigned long val;
+#if defined(CONFIG_WATCHDOG) || defined(CONFIG_460EX)
+	u32 val;
 #endif
 	reconfigure_pll(CFG_PLL_RECONFIG);
 
@@ -272,6 +272,22 @@ cpu_init_f (void)
 
 	reset_4xx_watchdog();
 #endif /* CONFIG_WATCHDOG */
+
+#if defined(CONFIG_460EX)
+	/*
+	 * Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and
+	 * clear SDR0_AHB_CFG[A2P_PROT2] (bit 25) for a new 460EX errata
+	 * regarding concurrent use of AHB USB OTG, USB 2.0 host and SATA
+	 */
+	mfsdr(SDR0_AHB_CFG, val);
+	val |= 0x80;
+	val &= ~0x40;
+	mtsdr(SDR0_AHB_CFG, val);
+	mfsdr(SDR0_USB2HOST_CFG, val);
+	val &= ~0xf00;
+	val |= 0x400;
+	mtsdr(SDR0_USB2HOST_CFG, val);
+#endif /* CONFIG_460EX */
 }
 
 /*
diff --git a/cpu/ppc4xx/gpio.c b/cpu/ppc4xx/gpio.c
index 37d3fa8ef7..df99f5314b 100644
--- a/cpu/ppc4xx/gpio.c
+++ b/cpu/ppc4xx/gpio.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2007
+ * (C) Copyright 2007-2008
  * Stefan Roese, DENX Software Engineering, sr@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -52,7 +52,7 @@ void gpio_config(int pin, int in_out, int gpio_alt, int out_val)
 	}
 
 	mask = 0x80000000 >> pin;
-	mask2 = 0xc0000000 >> (pin2 << 1);
+	mask2 = 0xc0000000 >> pin2;
 
 	/* first set TCR to 0 */
 	out_be32((void *)GPIO0_TCR + offs, in_be32((void *)GPIO0_TCR + offs) & ~mask);
diff --git a/include/ppc440.h b/include/ppc440.h
index 62f1680441..c581f1b468 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -2471,6 +2471,8 @@
 
 #define AHB_TOP			0xA4
 #define AHB_BOT			0xA5
+#define SDR0_AHB_CFG		0x370
+#define SDR0_USB2HOST_CFG	0x371
 #endif /* CONFIG_460EX || CONFIG_460GT */
 
 #define SDR0_SDCS_SDD			(0x80000000 >> 31)