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Merge branch 'microblaze' of git://git.denx.de/u-boot-microblaze

Browse source
This commit is contained in:
Tom Rini 2015-02-09 11:44:46 -05:00
commit a4fb5df214
24 changed files with 369 additions and 427 deletions
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1
arch/arm/include/asm/u-boot-arm.h
View file

@ -36,7 +36,6 @@ int arch_early_init_r(void);
/* board/.../... */
int board_init(void);
int dram_init (void);
void dram_init_banksize (void);
/* cpu/.../interrupt.c */

5
arch/microblaze/config.mk
View file

@ -15,3 +15,8 @@ endif
CONFIG_STANDALONE_LOAD_ADDR ?= 0x80F00000
PLATFORM_CPPFLAGS += -ffixed-r31 -D__microblaze__
ifeq ($(CONFIG_SPL_BUILD),)
PLATFORM_CPPFLAGS += -fPIC
endif
__HAVE_ARCH_GENERIC_BOARD := y

3
arch/microblaze/cpu/exception.c
View file

@ -13,11 +13,14 @@ void _hw_exception_handler (void)
{
int address = 0;
int state = 0;
/* loading address of exception EAR */
MFS(address, rear);
/* loading excetpion state register ESR */
MFS(state, resr);
printf("Hardware exception at 0x%x address\n", address);
R17(address);
printf("Return address from exception 0x%x\n", address);
switch (state & 0x1f) { /* mask on exception cause */
case 0x1:
puts("Unaligned data access exception\n");

50
arch/microblaze/cpu/interrupts.c
View file

@ -14,10 +14,9 @@
#include <asm/microblaze_intc.h>
#include <asm/asm.h>
#undef DEBUG_INT
void enable_interrupts(void)
{
debug("Enable interrupts for the whole CPU\n");
MSRSET(0x2);
}
@ -50,12 +49,11 @@ static void enable_one_interrupt(int irq)
offset <<= irq;
mask = intc->ier;
intc->ier = (mask | offset);
#ifdef DEBUG_INT
printf("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask,
debug("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask,
intc->ier);
printf("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
intc->iar, intc->mer);
#endif
}
static void disable_one_interrupt(int irq)
@ -66,12 +64,11 @@ static void disable_one_interrupt(int irq)
offset <<= irq;
mask = intc->ier;
intc->ier = (mask & ~offset);
#ifdef DEBUG_INT
printf("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask,
debug("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask,
intc->ier);
printf("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
intc->iar, intc->mer);
#endif
}
int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg)
@ -107,18 +104,17 @@ static void intc_init(void)
intc->iar = 0xFFFFFFFF;
/* XIntc_Start - hw_interrupt enable and all interrupt enable */
intc->mer = 0x3;
#ifdef DEBUG_INT
printf("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
intc->iar, intc->mer);
#endif
}
int interrupts_init(void)
int interrupt_init(void)
{
int i;
#if defined(CONFIG_SYS_INTC_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM)
intc = (microblaze_intc_t *) (CONFIG_SYS_INTC_0_ADDR);
intc = (microblaze_intc_t *)CONFIG_SYS_INTC_0_ADDR;
irq_no = CONFIG_SYS_INTC_0_NUM;
#endif
if (irq_no) {
@ -147,31 +143,29 @@ void interrupt_handler(void)
{
int irqs = intc->ivr; /* find active interrupt */
int mask = 1;
#ifdef DEBUG_INT
int value;
printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
intc->iar, intc->mer);
R14(value);
printf ("Interrupt handler on %x line, r14 %x\n", irqs, value);
#endif
struct irq_action *act = vecs + irqs;
#ifdef DEBUG_INT
printf
("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
act->handler, act->count, act->arg);
debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
intc->iar, intc->mer);
#ifdef DEBUG
R14(value);
#endif
debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
debug("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n",
(u32)act->handler, act->count, (u32)act->arg);
act->handler(act->arg);
act->count++;
intc->iar = mask << irqs;
#ifdef DEBUG_INT
printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
debug("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
intc->ier, intc->iar, intc->mer);
#ifdef DEBUG
R14(value);
printf ("Interrupt handler on %x line, r14 %x\n", irqs, value);
#endif
debug("Interrupt handler on %x line, r14 %x\n", irqs, value);
}
#if defined(CONFIG_CMD_IRQ)

121
arch/microblaze/cpu/irq.S
View file

@ -11,71 +11,70 @@
.text
.global _interrupt_handler
_interrupt_handler:
swi r2, r1, -4
swi r3, r1, -8
swi r4, r1, -12
swi r5, r1, -16
swi r6, r1, -20
swi r7, r1, -24
swi r8, r1, -28
swi r9, r1, -32
swi r10, r1, -36
swi r11, r1, -40
swi r12, r1, -44
swi r13, r1, -48
swi r14, r1, -52
swi r15, r1, -56
swi r16, r1, -60
swi r17, r1, -64
swi r18, r1, -68
swi r19, r1, -72
swi r20, r1, -76
swi r21, r1, -80
swi r22, r1, -84
swi r23, r1, -88
swi r24, r1, -92
swi r25, r1, -96
swi r26, r1, -100
swi r27, r1, -104
swi r28, r1, -108
swi r29, r1, -112
swi r30, r1, -116
swi r31, r1, -120
addik r1, r1, -124
swi r2, r1, 4
swi r3, r1, 8
swi r4, r1, 12
swi r5, r1, 16
swi r6, r1, 20
swi r7, r1, 24
swi r8, r1, 28
swi r9, r1, 32
swi r10, r1, 36
swi r11, r1, 40
swi r12, r1, 44
swi r13, r1, 48
swi r14, r1, 52
swi r15, r1, 56
swi r16, r1, 60
swi r17, r1, 64
swi r18, r1, 68
swi r19, r1, 72
swi r20, r1, 76
swi r21, r1, 80
swi r22, r1, 84
swi r23, r1, 88
swi r24, r1, 92
swi r25, r1, 96
swi r26, r1, 100
swi r27, r1, 104
swi r28, r1, 108
swi r29, r1, 112
swi r30, r1, 116
swi r31, r1, 120
brlid r15, interrupt_handler
nop
lwi r31, r1, 120
lwi r30, r1, 116
lwi r29, r1, 112
lwi r28, r1, 108
lwi r27, r1, 104
lwi r26, r1, 100
lwi r25, r1, 96
lwi r24, r1, 92
lwi r23, r1, 88
lwi r22, r1, 84
lwi r21, r1, 80
lwi r20, r1, 76
lwi r19, r1, 72
lwi r18, r1, 68
lwi r17, r1, 64
lwi r16, r1, 60
lwi r15, r1, 56
lwi r14, r1, 52
lwi r13, r1, 48
lwi r12, r1, 44
lwi r11, r1, 40
lwi r10, r1, 36
lwi r9, r1, 32
lwi r8, r1, 28
lwi r7, r1, 24
lwi r6, r1, 20
lwi r5, r1, 16
lwi r4, r1, 12
lwi r3, r1, 8
lwi r2, r1, 4
addik r1, r1, 124
lwi r31, r1, -120
lwi r30, r1, -116
lwi r29, r1, -112
lwi r28, r1, -108
lwi r27, r1, -104
lwi r26, r1, -100
lwi r25, r1, -96
lwi r24, r1, -92
lwi r23, r1, -88
lwi r22, r1, -84
lwi r21, r1, -80
lwi r20, r1, -76
lwi r19, r1, -72
lwi r18, r1, -68
lwi r17, r1, -64
lwi r16, r1, -60
lwi r15, r1, -56
lwi r14, r1, -52
lwi r13, r1, -48
lwi r12, r1, -44
lwi r11, r1, -40
lwi r10, r1, -36
lwi r9, r1, -32
lwi r8, r1, -28
lwi r7, r1, -24
lwi r6, r1, -20
lwi r5, r1, -16
lwi r4, r1, -12
lwi r3, r1, -8
lwi r2, r1, -4
rtid r14, 0
nop
.size _interrupt_handler,.-_interrupt_handler

2
arch/microblaze/cpu/spl.c
View file

@ -25,8 +25,6 @@ u32 spl_boot_device(void)
/* Board initialization after bss clearance */
void spl_board_init(void)
{
gd = (gd_t *)CONFIG_SPL_STACK_ADDR;
/* enable console uart printing */
preloader_console_init();
}

126
arch/microblaze/cpu/start.S
View file

@ -29,8 +29,12 @@ _start:
addi r1, r0, CONFIG_SPL_STACK_ADDR
mts rshr, r1
addi r1, r1, -4 /* Decrement SP to top of memory */
#else
#if defined(CONFIG_SYS_MALLOC_F_LEN)
addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_SYS_MALLOC_F_LEN
#else
addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET
#endif
mts rshr, r1
addi r1, r1, -4 /* Decrement SP to top of memory */
@ -129,7 +133,7 @@ _start:
/* Flush cache before enable cache */
addik r5, r0, 0
addik r6, r0, XILINX_DCACHE_BYTE_SIZE
flush: bralid r15, flush_cache
bralid r15, flush_cache
nop
/* enable instruction and data cache */
@ -150,12 +154,28 @@ clear_bss:
bnei r6, 2b
3: /* jumping to board_init */
#ifndef CONFIG_SPL_BUILD
or r5, r0, r0 /* flags - empty */
addi r31, r0, _gd
#if defined(CONFIG_SYS_MALLOC_F_LEN)
addi r6, r0, CONFIG_SYS_INIT_SP_OFFSET
swi r6, r31, GD_MALLOC_BASE
#endif
brai board_init_f
#else
addi r31, r0, _gd
#if defined(CONFIG_SYS_MALLOC_F_LEN)
addi r6, r0, CONFIG_SPL_STACK_ADDR
swi r6, r31, GD_MALLOC_BASE
#endif
brai board_init_r
#endif
1: bri 1b
.section .bss
.align 4
_gd:
.space GENERATED_GBL_DATA_SIZE
#ifndef CONFIG_SPL_BUILD
/*
* Read 16bit little endian
@ -189,4 +209,108 @@ out16: bslli r3, r6, 8
rtsd r15, 8
or r0, r0, r0
.end out16
/*
* Relocate u-boot
*/
.text
.global relocate_code
.ent relocate_code
.align 2
relocate_code:
/*
* r5 - start_addr_sp
* r6 - new_gd
* r7 - reloc_addr
*/
addi r1, r5, 0 /* Start to use new SP */
addi r31, r6, 0 /* Start to use new GD */
add r23, r0, r7 /* Move reloc addr to r23 */
/* Relocate text and data - r12 temp value */
addi r21, r0, _start
addi r22, r0, __end - 4 /* Include BSS too */
rsub r6, r21, r22
or r5, r0, r0
1: lw r12, r21, r5 /* Load u-boot data */
sw r12, r23, r5 /* Write zero to loc */
cmp r12, r5, r6 /* Check if we have reach the end */
bneid r12, 1b
addi r5, r5, 4 /* Increment to next loc - relocate code */
/* R23 points to the base address. */
add r23, r0, r7 /* Move reloc addr to r23 */
addi r24, r0, CONFIG_SYS_TEXT_BASE /* Get reloc offset */
rsub r23, r24, r23 /* keep - this is already here gd->reloc_off */
addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
lwi r7, r0, 0x28
swi r6, r0, 0x28 /* used first unused MB vector */
lbui r10, r0, 0x28 /* used first unused MB vector */
swi r7, r0, 0x28
#ifdef CONFIG_SYS_USR_EXCEP
addik r6, r0, _exception_handler
addk r6, r6, r23 /* add offset */
sw r6, r1, r0
lhu r7, r1, r10
rsubi r8, r10, 0xa
sh r7, r0, r8
rsubi r8, r10, 0xe
sh r6, r0, r8
#endif
addik r6, r0, _hw_exception_handler
addk r6, r6, r23 /* add offset */
sw r6, r1, r0
lhu r7, r1, r10
rsubi r8, r10, 0x22
sh r7, r0, r8
rsubi r8, r10, 0x26
sh r6, r0, r8
addik r6, r0, _interrupt_handler
addk r6, r6, r23 /* add offset */
sw r6, r1, r0
lhu r7, r1, r10
rsubi r8, r10, 0x12
sh r7, r0, r8
rsubi r8, r10, 0x16
sh r6, r0, r8
/* Check if GOT exist */
addik r21, r23, _got_start
addik r22, r23, _got_end
cmpu r12, r21, r22
beqi r12, 2f /* No GOT table - jump over */
/* Skip last 3 entries plus 1 because of loop boundary below */
addik r22, r22, -0x10
/* Relocate the GOT. */
3: lw r12, r21, r0 /* Load entry */
addk r12, r12, r23 /* Add reloc offset */
sw r12, r21, r0 /* Save entry back */
cmpu r12, r21, r22 /* Check if this cross boundary */
bneid r12, 3b
addik r21. r21, 4
/* Update pointer to GOT */
mfs r20, rpc
addik r20, r20, _GLOBAL_OFFSET_TABLE_ + 8
addk r20, r20, r23
/* Flush caches to ensure consistency */
addik r5, r0, 0
addik r6, r0, XILINX_DCACHE_BYTE_SIZE
bralid r15, flush_cache
nop
2: addi r5, r31, 0 /* gd is initialized in board_r.c */
addi r6, r0, CONFIG_SYS_TEXT_BASE
addi r12, r23, board_init_r
bra r12 /* Jump to relocated code */
.end relocate_code
#endif

6
arch/microblaze/cpu/u-boot-spl.lds
View file

@ -37,6 +37,12 @@ SECTIONS
__data_end = .;
}
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
__init_end = . ;
.bss ALIGN(0x4):
{
__bss_start = .;

12
arch/microblaze/cpu/u-boot.lds
View file

@ -29,17 +29,23 @@ SECTIONS
.data ALIGN(0x4):
{
__data_start = .;
#ifdef CONFIG_OF_EMBED
dts/built-in.o (.data)
#endif
*(.data)
__data_end = .;
}
.got ALIGN(4):
{
_got_start = .;
*(.got*)
. = ALIGN(4);
_got_end = .;
}
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
__init_end = . ;
.bss ALIGN(0x4):
{

4
arch/microblaze/include/asm/asm.h
View file

@ -43,6 +43,10 @@
#define R14(val) \
__asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));
/* get return address from interrupt */
#define R17(val) \
__asm__ __volatile__ ("addi %0, r17, 0" : "=r" (val));
#define NOP __asm__ __volatile__ ("nop");
/* use machine status registe USE_MSR_REG */

7
arch/microblaze/include/asm/config.h
View file

@ -7,4 +7,11 @@
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
#ifndef CONFIG_SPL_BUILD
#define CONFIG_NEEDS_MANUAL_RELOC
#endif
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_GENERIC_BOARD
#endif

2
arch/microblaze/include/asm/microblaze_intc.h
View file

@ -34,5 +34,3 @@ struct irq_action {
*/
int install_interrupt_handler(int irq, interrupt_handler_t *hdlr,
void *arg);
int interrupts_init(void);

11
arch/microblaze/include/asm/u-boot.h
View file

@ -16,16 +16,7 @@
#ifndef _U_BOOT_H_
#define _U_BOOT_H_
typedef struct bd_info {
unsigned long bi_memstart; /* start of DRAM memory */
phys_size_t bi_memsize; /* size of DRAM memory in bytes */
unsigned long bi_flashstart; /* start of FLASH memory */
unsigned long bi_flashsize; /* size of FLASH memory */
unsigned long bi_flashoffset; /* reserved area for startup monitor */
unsigned long bi_sramstart; /* start of SRAM memory */
unsigned long bi_sramsize; /* size of SRAM memory */
ulong bi_boot_params; /* where this board expects params */
} bd_t;
#include <asm-generic/u-boot.h>
/* For image.h:image_check_target_arch() */
#define IH_ARCH_DEFAULT IH_ARCH_MICROBLAZE

1
arch/microblaze/lib/Makefile
View file

@ -5,6 +5,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += board.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-y += muldi3.o

201
arch/microblaze/lib/board.c
View file

@ -1,201 +0,0 @@
/*
* (C) Copyright 2007 Michal Simek
* (C) Copyright 2004 Atmark Techno, Inc.
*
* Michal SIMEK <monstr@monstr.eu>
* Yasushi SHOJI <yashi@atmark-techno.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <command.h>
#include <malloc.h>
#include <version.h>
#include <watchdog.h>
#include <stdio_dev.h>
#include <serial.h>
#include <net.h>
#include <spi.h>
#include <linux/compiler.h>
#include <asm/processor.h>
#include <asm/microblaze_intc.h>
#include <fdtdec.h>
DECLARE_GLOBAL_DATA_PTR;
static int display_banner(void)
{
printf("\n\n%s\n\n", version_string);
return 0;
}
/*
* All attempts to come up with a "common" initialization sequence
* that works for all boards and architectures failed: some of the
* requirements are just _too_ different. To get rid of the resulting
* mess of board dependend #ifdef'ed code we now make the whole
* initialization sequence configurable to the user.
*
* The requirements for any new initalization function is simple: it
* receives a pointer to the "global data" structure as it's only
* argument, and returns an integer return code, where 0 means
* "continue" and != 0 means "fatal error, hang the system".
*/
typedef int (init_fnc_t) (void);
init_fnc_t *init_sequence[] = {
env_init,
#ifdef CONFIG_OF_CONTROL
fdtdec_check_fdt,
#endif
serial_init,
#ifndef CONFIG_SPL_BUILD
console_init_f,
#endif
display_banner,
#ifndef CONFIG_SPL_BUILD
interrupts_init,
timer_init,
#endif
NULL,
};
unsigned long monitor_flash_len;
void board_init_f(ulong not_used)
{
bd_t *bd;
init_fnc_t **init_fnc_ptr;
gd = (gd_t *)(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET);
bd = (bd_t *)(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET
- GENERATED_BD_INFO_SIZE);
#if defined(CONFIG_CMD_FLASH) && !defined(CONFIG_SPL_BUILD)
ulong flash_size = 0;
#endif
asm ("nop"); /* FIXME gd is not initialize - wait */
memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE);
memset((void *)bd, 0, GENERATED_BD_INFO_SIZE);
gd->bd = bd;
gd->baudrate = CONFIG_BAUDRATE;
bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
monitor_flash_len = __end - __text_start;
#ifdef CONFIG_OF_EMBED
/* Get a pointer to the FDT */
gd->fdt_blob = __dtb_dt_begin;
#elif defined CONFIG_OF_SEPARATE
/* FDT is at end of image */
gd->fdt_blob = (void *)__end;
#endif
#ifndef CONFIG_SPL_BUILD
/* Allow the early environment to override the fdt address */
gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
(uintptr_t)gd->fdt_blob);
#endif
/*
* The Malloc area is immediately below the monitor copy in DRAM
* aka CONFIG_SYS_MONITOR_BASE - Note there is no need for reloc_off
* as our monitory code is run from SDRAM
*/
mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
serial_initialize();
#ifdef CONFIG_XILINX_TB_WATCHDOG
hw_watchdog_init();
#endif
for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
WATCHDOG_RESET();
if ((*init_fnc_ptr) () != 0)
hang();
}
#ifndef CONFIG_SPL_BUILD
#ifdef CONFIG_OF_CONTROL
/* For now, put this check after the console is ready */
if (fdtdec_prepare_fdt())
panic("** No FDT - please see doc/README.fdt-control");
else
printf("DTB: 0x%x\n", (u32)gd->fdt_blob);
#endif
puts("SDRAM :\n");
printf("\t\tIcache:%s\n", icache_status() ? "ON" : "OFF");
printf("\t\tDcache:%s\n", dcache_status() ? "ON" : "OFF");
printf("\tU-Boot Start:0x%08x\n", CONFIG_SYS_TEXT_BASE);
#if defined(CONFIG_CMD_FLASH)
puts("Flash: ");
bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
flash_size = flash_init();
if (bd->bi_flashstart && flash_size > 0) {
# ifdef CONFIG_SYS_FLASH_CHECKSUM
print_size(flash_size, "");
/*
* Compute and print flash CRC if flashchecksum is set to 'y'
*
* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
*/
if (getenv_yesno("flashchecksum") == 1) {
printf(" CRC: %08X",
crc32(0, (const u8 *)bd->bi_flashstart,
flash_size)
);
}
putc('\n');
# else /* !CONFIG_SYS_FLASH_CHECKSUM */
print_size(flash_size, "\n");
# endif /* CONFIG_SYS_FLASH_CHECKSUM */
bd->bi_flashsize = flash_size;
bd->bi_flashoffset = bd->bi_flashstart + flash_size;
} else {
puts("Flash init FAILED");
bd->bi_flashstart = 0;
bd->bi_flashsize = 0;
bd->bi_flashoffset = 0;
}
#endif
#ifdef CONFIG_SPI
spi_init();
#endif
/* relocate environment function pointers etc. */
env_relocate();
/* Initialize stdio devices */
stdio_init();
/* Initialize the jump table for applications */
jumptable_init();
/* Initialize the console (after the relocation and devices init) */
console_init_r();
board_init();
/* Initialize from environment */
load_addr = getenv_ulong("loadaddr", 16, load_addr);
#if defined(CONFIG_CMD_NET)
printf("Net: ");
eth_initialize(gd->bd);
uchar enetaddr[6];
eth_getenv_enetaddr("ethaddr", enetaddr);
printf("MAC: %pM\n", enetaddr);
#endif
/* main_loop */
for (;;) {
WATCHDOG_RESET();
main_loop();
}
#endif /* CONFIG_SPL_BUILD */
}

1
arch/nds32/include/asm/u-boot-nds32.h
View file

@ -22,7 +22,6 @@ int cleanup_before_linux(void);
/* board/.../... */
int board_init(void);
int dram_init(void);
/* cpu/.../interrupt.c */
void reset_timer_masked(void);

1
arch/sandbox/include/asm/u-boot-sandbox.h
View file

@ -17,7 +17,6 @@
/* board/.../... */
int board_init(void);
int dram_init(void);
/* start.c */
int sandbox_early_getopt_check(void);

6
arch/x86/include/asm/u-boot-x86.h
View file

@ -26,15 +26,9 @@ unsigned long get_tbclk_mhz(void);
void timer_set_base(uint64_t base);
int pcat_timer_init(void);
/* Architecture specific DRAM init */
int dram_init(void);
/* cpu/.../interrupts.c */
int cpu_init_interrupts(void);
/* board/.../... */
int dram_init(void);
int cleanup_before_linux(void);
int x86_cleanup_before_linux(void);
void x86_enable_caches(void);

46
board/xilinx/microblaze-generic/microblaze-generic.c
View file

@ -11,16 +11,62 @@
#include <common.h>
#include <config.h>
#include <fdtdec.h>
#include <netdev.h>
#include <asm/processor.h>
#include <asm/microblaze_intc.h>
#include <asm/asm.h>
#include <asm/gpio.h>
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_XILINX_GPIO
static int reset_pin = -1;
#endif
#ifdef CONFIG_OF_CONTROL
ulong ram_base;
void dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = ram_base;
gd->bd->bi_dram[0].size = get_effective_memsize();
}
int dram_init(void)
{
int node;
fdt_addr_t addr;
fdt_size_t size;
const void *blob = gd->fdt_blob;
node = fdt_node_offset_by_prop_value(blob, -1, "device_type",
"memory", 7);
if (node == -FDT_ERR_NOTFOUND) {
debug("DRAM: Can't get memory node\n");
return 1;
}
addr = fdtdec_get_addr_size(blob, node, "reg", &size);
if (addr == FDT_ADDR_T_NONE || size == 0) {
debug("DRAM: Can't get base address or size\n");
return 1;
}
ram_base = addr;
gd->ram_top = addr; /* In setup_dest_addr() is done +ram_size */
gd->ram_size = size;
return 0;
};
#else
int dram_init(void)
{
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
return 0;
}
#endif
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
#ifdef CONFIG_XILINX_GPIO

4
common/board_f.c
View file

@ -262,7 +262,7 @@ static int zero_global_data(void)
static int setup_mon_len(void)
{
#ifdef __ARM__
#if defined(__ARM__) || defined(__MICROBLAZE__)
gd->mon_len = (ulong)&__bss_end - (ulong)_start;
#elif defined(CONFIG_SANDBOX)
gd->mon_len = (ulong)&_end - (ulong)_init;
@ -909,7 +909,7 @@ static init_fnc_t init_sequence_f[] = {
#endif
announce_dram_init,
/* TODO: unify all these dram functions? */
#if defined(CONFIG_ARM) || defined(CONFIG_X86)
#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE)
dram_init, /* configure available RAM banks */
#endif
#if defined(CONFIG_MIPS) || defined(CONFIG_PPC)

14
common/board_r.c
View file

@ -294,6 +294,15 @@ static int initr_announce(void)
return 0;
}
#ifdef CONFIG_NEEDS_MANUAL_RELOC
static int initr_manual_reloc_cmdtable(void)
{
fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd),
ll_entry_count(cmd_tbl_t, cmd));
return 0;
}
#endif
#if !defined(CONFIG_SYS_NO_FLASH)
static int initr_flash(void)
{
@ -702,6 +711,9 @@ init_fnc_t init_sequence_r[] = {
initr_serial,
initr_announce,
INIT_FUNC_WATCHDOG_RESET
#ifdef CONFIG_NEEDS_MANUAL_RELOC
initr_manual_reloc_cmdtable,
#endif
#ifdef CONFIG_PPC
initr_trap,
#endif
@ -801,7 +813,7 @@ init_fnc_t init_sequence_r[] = {
#if defined(CONFIG_ARM)
initr_enable_interrupts,
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE)
timer_init, /* initialize timer */
#endif
#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)

16
common/cmd_bdinfo.c
View file

@ -183,8 +183,14 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
bd_t *bd = gd->bd;
print_num("mem start ", (ulong)bd->bi_memstart);
print_lnum("mem size ", (u64)bd->bi_memsize);
int i;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
print_num("DRAM bank", i);
print_num("-> start", bd->bi_dram[i].start);
print_num("-> size", bd->bi_dram[i].size);
}
print_num("flash start ", (ulong)bd->bi_flashstart);
print_num("flash size ", (ulong)bd->bi_flashsize);
print_num("flash offset ", (ulong)bd->bi_flashoffset);
@ -196,6 +202,12 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
print_eths();
#endif
printf("baudrate = %u bps\n", gd->baudrate);
print_num("relocaddr", gd->relocaddr);
print_num("reloc off", gd->reloc_off);
print_num("fdt_blob", (ulong)gd->fdt_blob);
print_num("new_fdt", (ulong)gd->new_fdt);
print_num("fdt_size", (ulong)gd->fdt_size);
return 0;
}

1
include/common.h
View file

@ -183,6 +183,7 @@ typedef void (interrupt_handler_t)(void *);
/*
* Function Prototypes
*/
int dram_init(void);
void hang (void) __attribute__ ((noreturn));

91
include/configs/microblaze-generic.h
View file

@ -106,62 +106,22 @@
# define CONFIG_XILINX_TB_WATCHDOG
#endif
/*
* memory layout - Example
* CONFIG_SYS_TEXT_BASE = 0x1200_0000; defined in config.mk
* CONFIG_SYS_SRAM_BASE = 0x1000_0000;
* CONFIG_SYS_SRAM_SIZE = 0x0400_0000; 64MB
*
* CONFIG_SYS_MONITOR_LEN = 0x40000
* CONFIG_SYS_MALLOC_LEN = 3 * CONFIG_SYS_MONITOR_LEN = 0xC0000
*
* CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000
* CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - CONFIG_SYS_MONITOR_LEN = 0x13FB_F000
* CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - CONFIG_SYS_MALLOC_LEN = 0x13EF_F000
*
* 0x1000_0000 CONFIG_SYS_SDRAM_BASE
* MEMTEST_AREA 64kB
* FREE
* 0x1200_0000 CONFIG_SYS_TEXT_BASE
* U-BOOT code
* 0x1202_0000
* FREE
*
* STACK
* 0x13EF_F000 CONFIG_SYS_MALLOC_BASE
* MALLOC_AREA 768kB Alloc
* 0x13FB_F000 CONFIG_SYS_MONITOR_BASE
* MONITOR_CODE 256kB Env
* 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET
* GLOBAL_DATA 4kB bd, gd
* 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE
*/
#ifndef CONFIG_OF_CONTROL
/* ddr sdram - main memory */
# define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
# define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
#endif
/* global pointer */
/* start of global data */
#define CONFIG_SYS_GBL_DATA_OFFSET \
(CONFIG_SYS_SDRAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_MALLOC_LEN 0xC0000
#ifndef CONFIG_SPL_BUILD
# define CONFIG_SYS_MALLOC_F_LEN 1024
#else
# define CONFIG_SYS_MALLOC_SIMPLE
# define CONFIG_SYS_MALLOC_F_LEN 0x150
#endif
/* monitor code */
#define SIZE 0x40000
#define CONFIG_SYS_MONITOR_LEN SIZE
#define CONFIG_SYS_MONITOR_BASE \
(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET \
- CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE)
#define CONFIG_SYS_MONITOR_END \
(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
#define CONFIG_SYS_MALLOC_LEN (SIZE * 3)
#define CONFIG_SYS_MALLOC_BASE \
(CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
/* stack */
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE
/* Stack location before relocation */
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_TEXT_BASE
/*
* CFI flash memory layout - Example
@ -452,7 +412,10 @@
#define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds"
#define CONFIG_SPL_RAM_DEVICE
#ifdef CONFIG_SYS_FLASH_BASE
# define CONFIG_SPL_NOR_SUPPORT
# define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
#endif
/* for booting directly linux */
#define CONFIG_SPL_OS_BOOT
@ -468,36 +431,20 @@
/* BRAM start */
#define CONFIG_SYS_INIT_RAM_ADDR 0x0
/* BRAM size - will be generated */
#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
/* Stack pointer prior relocation, must situated at on-chip RAM */
#define CONFIG_SYS_SPL_MALLOC_END (CONFIG_SYS_INIT_RAM_ADDR + \
#define CONFIG_SYS_INIT_RAM_SIZE 0x100000
# define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100
/*
* The main reason to do it in this way is that MALLOC_START
* can't be defined - common/spl/spl.c
*/
#if (CONFIG_SYS_SPL_MALLOC_SIZE != 0)
# define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_SPL_MALLOC_END - \
CONFIG_SYS_SPL_MALLOC_SIZE)
# define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_START
#else
# define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_END
#endif
CONFIG_SYS_MALLOC_F_LEN)
/* Just for sure that there is a space for stack */
#define CONFIG_SPL_STACK_SIZE 0x100
#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
CONFIG_SYS_INIT_RAM_ADDR - \
GENERATED_GBL_DATA_SIZE - \
CONFIG_SYS_SPL_MALLOC_SIZE - \
CONFIG_SYS_MALLOC_F_LEN - \
CONFIG_SPL_STACK_SIZE)
#endif /* __CONFIG_H */