mirror of
https://github.com/AsahiLinux/u-boot
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mtd: move NAND files into a raw/ subdirectory
NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in a raw/ subdirectory, to ease the addition of a core file in nand/ and the introduction of a spi/ subdirectory specific to SPI NANDs. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This commit is contained in:
Miquel Raynal
Jagan Teki
parent
ce9bdc8743
commit
a430fa06a4
66 changed files with 400 additions and 395 deletions
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@ -298,7 +298,7 @@ F: drivers/i2c/i2c-cdns.c
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F: drivers/i2c/muxes/pca954x.c
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F: drivers/i2c/zynq_i2c.c
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F: drivers/mmc/zynq_sdhci.c
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F: drivers/mtd/nand/zynq_nand.c
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F: drivers/mtd/nand/raw/zynq_nand.c
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F: drivers/net/phy/xilinx_phy.c
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F: drivers/net/zynq_gem.c
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F: drivers/serial/serial_zynq.c
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@ -322,7 +322,7 @@ F: drivers/i2c/i2c-cdns.c
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F: drivers/i2c/muxes/pca954x.c
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F: drivers/i2c/zynq_i2c.c
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F: drivers/mmc/zynq_sdhci.c
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F: drivers/mtd/nand/zynq_nand.c
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F: drivers/mtd/nand/raw/zynq_nand.c
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F: drivers/net/phy/xilinx_phy.c
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F: drivers/net/zynq_gem.c
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F: drivers/serial/serial_zynq.c
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@ -467,7 +467,7 @@ NAND FLASH
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#M: Scott Wood <oss@buserror.net>
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S: Orphaned (Since 2018-07)
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T: git git://git.denx.de/u-boot-nand-flash.git
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F: drivers/mtd/nand/
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F: drivers/mtd/nand/raw/
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NDS32
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M: Macpaul Lin <macpaul@andestech.com>
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2
Makefile
2
Makefile
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@ -689,7 +689,7 @@ libs-y += drivers/dma/
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libs-y += drivers/gpio/
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libs-y += drivers/i2c/
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libs-y += drivers/mtd/
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libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/
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libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/raw/
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libs-y += drivers/mtd/onenand/
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libs-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/
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libs-y += drivers/mtd/spi/
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6
README
6
README
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@ -3256,8 +3256,8 @@ Low Level (hardware related) configuration options:
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a 16 bit bus.
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Not all NAND drivers use this symbol.
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Example of drivers that use it:
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- drivers/mtd/nand/ndfc.c
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- drivers/mtd/nand/mxc_nand.c
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- drivers/mtd/nand/raw/ndfc.c
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- drivers/mtd/nand/raw/mxc_nand.c
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- CONFIG_SYS_NDFC_EBC0_CFG
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Sets the EBC0_CFG register for the NDFC. If not defined
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@ -3374,7 +3374,7 @@ Low Level (hardware related) configuration options:
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- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
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Option to disable subpage write in NAND driver
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driver that uses this:
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drivers/mtd/nand/davinci_nand.c
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drivers/mtd/nand/raw/davinci_nand.c
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Freescale QE/FMAN Firmware Support:
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-----------------------------------
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@ -12,7 +12,7 @@
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#include <stdio.h>
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#include <linux/io.h>
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#include <linux/printk.h>
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#include <../drivers/mtd/nand/denali.h>
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#include <../drivers/mtd/nand/raw/denali.h>
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#include "init.h"
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@ -487,7 +487,7 @@ config SPL_NAND_SUPPORT
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help
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Enable support for NAND (Negative AND) flash in SPL. NAND flash
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can be used to allow SPL to load U-Boot from supported devices.
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This enables the drivers in drivers/mtd/nand as part of an SPL
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This enables the drivers in drivers/mtd/nand/raw as part of an SPL
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build.
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config SPL_NET_SUPPORT
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@ -2,7 +2,7 @@
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/*
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* Copyright (C) 2011 OMICRON electronics GmbH
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*
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* based on drivers/mtd/nand/nand_spl_load.c
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* based on drivers/mtd/nand/raw/nand_spl_load.c
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*
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* Copyright (C) 2011
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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@ -57,11 +57,11 @@ CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
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CONFIG_SPL_EXT_SUPPORT
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CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
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CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
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CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
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CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/raw/libnand.o)
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CONFIG_SPL_DRIVERS_MISC_SUPPORT (drivers/misc)
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CONFIG_SPL_DMA_SUPPORT (drivers/dma/libdma.o)
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CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o)
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CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/nand_spl_load.o)
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CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/raw/nand_spl_load.o)
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CONFIG_SPL_SPI_LOAD (drivers/mtd/spi/spi_spl_load.o)
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CONFIG_SPL_RAM_DEVICE (common/spl/spl.c)
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CONFIG_SPL_WATCHDOG_SUPPORT (drivers/watchdog/libwatchdog.o)
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@ -84,7 +84,7 @@ Relocation with SPL (example for the tx25 booting from NAND Flash):
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- cpu copies the first page from NAND to 0xbb000000 (IMX_NFC_BASE)
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and start with code execution on this address.
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- The First page contains u-boot code from drivers/mtd/nand/mxc_nand_spl.c
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- The First page contains u-boot code from drivers/mtd/nand/raw/mxc_nand_spl.c
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which inits the dram, cpu registers, reloacte itself to CONFIG_SPL_TEXT_BASE and loads
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the "real" u-boot to CONFIG_SYS_NAND_U_BOOT_DST and starts execution
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@CONFIG_SYS_NAND_U_BOOT_START
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@ -116,7 +116,7 @@ Configuration Options:
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The maximum number of NAND chips per device to be supported.
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CONFIG_SYS_NAND_SELF_INIT
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Traditionally, glue code in drivers/mtd/nand/nand.c has driven
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Traditionally, glue code in drivers/mtd/nand/raw/nand.c has driven
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the initialization process -- it provides the mtd and nand
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structs, calls a board init function for a specific device,
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calls nand_scan(), and registers with mtd.
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@ -125,7 +125,7 @@ Configuration Options:
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run code between nand_scan_ident() and nand_scan_tail(), or other
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deviations from the "normal" flow.
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If a board defines CONFIG_SYS_NAND_SELF_INIT, drivers/mtd/nand/nand.c
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If a board defines CONFIG_SYS_NAND_SELF_INIT, drivers/mtd/nand/raw/nand.c
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will make one call to board_nand_init(), with no arguments. That
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function is responsible for calling a driver init function for
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each NAND device on the board, that performs all initialization
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@ -280,7 +280,7 @@ NOTE:
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=====
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The Disk On Chip driver is currently broken and has been for some time.
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There is a driver in drivers/mtd/nand, taken from Linux, that works with
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There is a driver in drivers/mtd/nand/raw, taken from Linux, that works with
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the current NAND system but has not yet been adapted to the u-boot
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environment.
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@ -63,7 +63,7 @@ bootmode strings at runtime.
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spi - drivers/spi/zynq_spi.c
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qspi - drivers/spi/zynq_qspi.c
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i2c - drivers/i2c/zynq_i2c.c
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nand - drivers/mtd/nand/zynq_nand.c
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nand - drivers/mtd/nand/raw/zynq_nand.c
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- Done proper cleanups on board configurations
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- Added basic FDT support for zynq boards
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- d-cache support for zynq_gem.c
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@ -6,7 +6,7 @@ obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC_SUPPORT) += misc/ sysreset/ firmware/
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obj-$(CONFIG_$(SPL_TPL_)I2C_SUPPORT) += i2c/
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obj-$(CONFIG_$(SPL_TPL_)LED) += led/
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obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += mmc/
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obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += mtd/nand/
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obj-$(CONFIG_$(SPL_TPL_)NAND_SUPPORT) += mtd/nand/raw/
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obj-$(CONFIG_$(SPL_TPL_)PHY) += phy/
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obj-$(CONFIG_$(SPL_TPL_)PINCTRL) += pinctrl/
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obj-$(CONFIG_$(SPL_TPL_)RAM) += ram/
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@ -18,3 +18,5 @@ obj-$(CONFIG_FLASH_PIC32) += pic32_flash.o
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obj-$(CONFIG_ST_SMI) += st_smi.o
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obj-$(CONFIG_STM32_FLASH) += stm32_flash.o
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obj-$(CONFIG_RENESAS_RPC_HF) += renesas_rpc_hf.o
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obj-y += nand/
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@ -1,297 +1 @@
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menuconfig NAND
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bool "NAND Device Support"
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if NAND
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config SYS_NAND_SELF_INIT
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bool
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help
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This option, if enabled, provides more flexible and linux-like
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NAND initialization process.
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config NAND_ATMEL
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bool "Support Atmel NAND controller"
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imply SYS_NAND_USE_FLASH_BBT
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help
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Enable this driver for NAND flash platforms using an Atmel NAND
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controller.
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config NAND_DAVINCI
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bool "Support TI Davinci NAND controller"
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help
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Enable this driver for NAND flash controllers available in TI Davinci
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and Keystone2 platforms
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config NAND_DENALI
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bool
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select SYS_NAND_SELF_INIT
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imply CMD_NAND
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config NAND_DENALI_DT
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bool "Support Denali NAND controller as a DT device"
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select NAND_DENALI
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depends on OF_CONTROL && DM
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help
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Enable the driver for NAND flash on platforms using a Denali NAND
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controller as a DT device.
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config NAND_DENALI_SPARE_AREA_SKIP_BYTES
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int "Number of bytes skipped in OOB area"
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depends on NAND_DENALI
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range 0 63
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help
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This option specifies the number of bytes to skip from the beginning
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of OOB area before last ECC sector data starts. This is potentially
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used to preserve the bad block marker in the OOB area.
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config NAND_LPC32XX_SLC
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bool "Support LPC32XX_SLC controller"
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help
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Enable the LPC32XX SLC NAND controller.
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config NAND_OMAP_GPMC
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bool "Support OMAP GPMC NAND controller"
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depends on ARCH_OMAP2PLUS
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help
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Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
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GPMC controller is used for parallel NAND flash devices, and can
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do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
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and BCH16 ECC algorithms.
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config NAND_OMAP_GPMC_PREFETCH
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bool "Enable GPMC Prefetch"
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depends on NAND_OMAP_GPMC
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default y
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help
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On OMAP platforms that use the GPMC controller
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(CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
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uses the prefetch mode to speed up read operations.
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config NAND_OMAP_ELM
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bool "Enable ELM driver for OMAPxx and AMxx platforms."
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depends on NAND_OMAP_GPMC && !OMAP34XX
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help
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ELM controller is used for ECC error detection (not ECC calculation)
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of BCH4, BCH8 and BCH16 ECC algorithms.
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Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
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thus such SoC platforms need to depend on software library for ECC error
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detection. However ECC calculation on such plaforms would still be
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done by GPMC controller.
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config NAND_VF610_NFC
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bool "Support for Freescale NFC for VF610"
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select SYS_NAND_SELF_INIT
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imply CMD_NAND
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help
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Enables support for NAND Flash Controller on some Freescale
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processors like the VF610, MCF54418 or Kinetis K70.
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The driver supports a maximum 2k page size. The driver
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currently does not support hardware ECC.
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choice
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prompt "Hardware ECC strength"
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depends on NAND_VF610_NFC
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default SYS_NAND_VF610_NFC_45_ECC_BYTES
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help
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Select the ECC strength used in the hardware BCH ECC block.
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config SYS_NAND_VF610_NFC_45_ECC_BYTES
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bool "24-error correction (45 ECC bytes)"
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config SYS_NAND_VF610_NFC_60_ECC_BYTES
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bool "32-error correction (60 ECC bytes)"
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endchoice
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config NAND_PXA3XX
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bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
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select SYS_NAND_SELF_INIT
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imply CMD_NAND
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help
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This enables the driver for the NAND flash device found on
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PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
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config NAND_SUNXI
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bool "Support for NAND on Allwinner SoCs"
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default ARCH_SUNXI
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depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
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select SYS_NAND_SELF_INIT
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select SYS_NAND_U_BOOT_LOCATIONS
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select SPL_NAND_SUPPORT
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imply CMD_NAND
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---help---
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Enable support for NAND. This option enables the standard and
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SPL drivers.
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The SPL driver only supports reading from the NAND using DMA
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transfers.
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if NAND_SUNXI
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config NAND_SUNXI_SPL_ECC_STRENGTH
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int "Allwinner NAND SPL ECC Strength"
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default 64
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config NAND_SUNXI_SPL_ECC_SIZE
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int "Allwinner NAND SPL ECC Step Size"
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default 1024
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config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
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int "Allwinner NAND SPL Usable Page Size"
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default 1024
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endif
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config NAND_ARASAN
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bool "Configure Arasan Nand"
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select SYS_NAND_SELF_INIT
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imply CMD_NAND
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help
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This enables Nand driver support for Arasan nand flash
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controller. This uses the hardware ECC for read and
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write operations.
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config NAND_MXC
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bool "MXC NAND support"
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depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
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imply CMD_NAND
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help
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This enables the NAND driver for the NAND flash controller on the
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i.MX27 / i.MX31 / i.MX5 rocessors.
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config NAND_MXS
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bool "MXS NAND support"
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depends on MX23 || MX28 || MX6 || MX7
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select SYS_NAND_SELF_INIT
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imply CMD_NAND
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select APBH_DMA
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select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
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select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
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help
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This enables NAND driver for the NAND flash controller on the
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MXS processors.
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if NAND_MXS
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config NAND_MXS_DT
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bool "Support MXS NAND controller as a DT device"
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depends on OF_CONTROL && MTD
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help
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Enable the driver for MXS NAND flash on platforms using
|
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device tree.
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config NAND_MXS_USE_MINIMUM_ECC
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bool "Use minimum ECC strength supported by the controller"
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default false
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endif
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config NAND_ZYNQ
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bool "Support for Zynq Nand controller"
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select SYS_NAND_SELF_INIT
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imply CMD_NAND
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help
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This enables Nand driver support for Nand flash controller
|
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found on Zynq SoC.
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config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
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bool "Enable use of 1st stage bootloader timing for NAND"
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depends on NAND_ZYNQ
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help
|
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This flag prevent U-boot reconfigure NAND flash controller and reuse
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the NAND timing from 1st stage bootloader.
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comment "Generic NAND options"
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config SYS_NAND_BLOCK_SIZE
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hex "NAND chip eraseblock size"
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depends on ARCH_SUNXI
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help
|
||||
Number of data bytes in one eraseblock for the NAND chip on the
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board. This is the multiple of NAND_PAGE_SIZE and the number of
|
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pages.
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config SYS_NAND_PAGE_SIZE
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hex "NAND chip page size"
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||||
depends on ARCH_SUNXI
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help
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Number of data bytes in one page for the NAND chip on the
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board, not including the OOB area.
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config SYS_NAND_OOBSIZE
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hex "NAND chip OOB size"
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depends on ARCH_SUNXI
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help
|
||||
Number of bytes in the Out-Of-Band area for the NAND chip on
|
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the board.
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||||
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||||
# Enhance depends when converting drivers to Kconfig which use this config
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# option (mxc_nand, ndfc, omap_gpmc).
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config SYS_NAND_BUSWIDTH_16BIT
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bool "Use 16-bit NAND interface"
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depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
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help
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Indicates that NAND device has 16-bit wide data-bus. In absence of this
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config, bus-width of NAND device is assumed to be either 8-bit and later
|
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determined by reading ONFI params.
|
||||
Above config is useful when NAND device's bus-width information cannot
|
||||
be determined from on-chip ONFI params, like in following scenarios:
|
||||
- SPL boot does not support reading of ONFI parameters. This is done to
|
||||
keep SPL code foot-print small.
|
||||
- In current U-Boot flow using nand_init(), driver initialization
|
||||
happens in board_nand_init() which is called before any device probe
|
||||
(nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
|
||||
not available while configuring controller. So a static CONFIG_NAND_xx
|
||||
is needed to know the device's bus-width in advance.
|
||||
|
||||
if SPL
|
||||
|
||||
config SYS_NAND_U_BOOT_LOCATIONS
|
||||
bool "Define U-boot binaries locations in NAND"
|
||||
help
|
||||
Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
|
||||
This option should not be enabled when compiling U-boot for boards
|
||||
defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
|
||||
file.
|
||||
|
||||
config SYS_NAND_U_BOOT_OFFS
|
||||
hex "Location in NAND to read U-Boot from"
|
||||
default 0x800000 if NAND_SUNXI
|
||||
depends on SYS_NAND_U_BOOT_LOCATIONS
|
||||
help
|
||||
Set the offset from the start of the nand where u-boot should be
|
||||
loaded from.
|
||||
|
||||
config SYS_NAND_U_BOOT_OFFS_REDUND
|
||||
hex "Location in NAND to read U-Boot from"
|
||||
default SYS_NAND_U_BOOT_OFFS
|
||||
depends on SYS_NAND_U_BOOT_LOCATIONS
|
||||
help
|
||||
Set the offset from the start of the nand where the redundant u-boot
|
||||
should be loaded from.
|
||||
|
||||
config SPL_NAND_AM33XX_BCH
|
||||
bool "Enables SPL-NAND driver which supports ELM based"
|
||||
depends on NAND_OMAP_GPMC && !OMAP34XX
|
||||
default y
|
||||
help
|
||||
Hardware ECC correction. This is useful for platforms which have ELM
|
||||
hardware engine and use NAND boot mode.
|
||||
Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
|
||||
so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
|
||||
SPL-NAND driver with software ECC correction support.
|
||||
|
||||
config SPL_NAND_DENALI
|
||||
bool "Support Denali NAND controller for SPL"
|
||||
help
|
||||
This is a small implementation of the Denali NAND controller
|
||||
for use on SPL.
|
||||
|
||||
config SPL_NAND_SIMPLE
|
||||
bool "Use simple SPL NAND driver"
|
||||
depends on !SPL_NAND_AM33XX_BCH
|
||||
help
|
||||
Support for NAND boot using simple NAND drivers that
|
||||
expose the cmd_ctrl() interface.
|
||||
endif
|
||||
|
||||
endif # if NAND
|
||||
source "drivers/mtd/nand/raw/Kconfig"
|
||||
|
|
|
|||
|
|
@ -1,77 +1,2 @@
|
|||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
# (C) Copyright 2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
|
||||
ifdef CONFIG_SPL_BUILD
|
||||
|
||||
ifdef CONFIG_SPL_NAND_DRIVERS
|
||||
NORMAL_DRIVERS=y
|
||||
endif
|
||||
|
||||
obj-$(CONFIG_SPL_NAND_AM33XX_BCH) += am335x_spl_bch.o
|
||||
obj-$(CONFIG_SPL_NAND_DENALI) += denali_spl.o
|
||||
obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o
|
||||
obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
|
||||
obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
|
||||
obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o
|
||||
obj-$(CONFIG_SPL_NAND_IDENT) += nand_ids.o nand_timings.o
|
||||
obj-$(CONFIG_SPL_NAND_INIT) += nand.o
|
||||
ifeq ($(CONFIG_SPL_ENV_SUPPORT),y)
|
||||
obj-$(CONFIG_ENV_IS_IN_NAND) += nand_util.o
|
||||
endif
|
||||
|
||||
else # not spl
|
||||
|
||||
NORMAL_DRIVERS=y
|
||||
|
||||
obj-y += nand.o
|
||||
obj-y += nand_bbt.o
|
||||
obj-y += nand_ids.o
|
||||
obj-y += nand_util.o
|
||||
obj-y += nand_ecc.o
|
||||
obj-y += nand_base.o
|
||||
obj-y += nand_timings.o
|
||||
|
||||
endif # not spl
|
||||
|
||||
ifdef NORMAL_DRIVERS
|
||||
|
||||
obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
|
||||
|
||||
obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o
|
||||
obj-$(CONFIG_NAND_ARASAN) += arasan_nfc.o
|
||||
obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
|
||||
obj-$(CONFIG_NAND_DENALI) += denali.o
|
||||
obj-$(CONFIG_NAND_DENALI_DT) += denali_dt.o
|
||||
obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
|
||||
obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
|
||||
obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
|
||||
obj-$(CONFIG_NAND_FSMC) += fsmc_nand.o
|
||||
obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o
|
||||
obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
|
||||
obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
|
||||
obj-$(CONFIG_NAND_LPC32XX_MLC) += lpc32xx_nand_mlc.o
|
||||
obj-$(CONFIG_NAND_LPC32XX_SLC) += lpc32xx_nand_slc.o
|
||||
obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o
|
||||
obj-$(CONFIG_NAND_MXC) += mxc_nand.o
|
||||
obj-$(CONFIG_NAND_MXS) += mxs_nand.o
|
||||
obj-$(CONFIG_NAND_MXS_DT) += mxs_nand_dt.o
|
||||
obj-$(CONFIG_NAND_PXA3XX) += pxa3xx_nand.o
|
||||
obj-$(CONFIG_NAND_SPEAR) += spr_nand.o
|
||||
obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
|
||||
obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
|
||||
obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
|
||||
obj-$(CONFIG_NAND_PLAT) += nand_plat.o
|
||||
obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
|
||||
obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
|
||||
|
||||
else # minimal SPL drivers
|
||||
|
||||
obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
|
||||
obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
|
||||
obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
|
||||
obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o
|
||||
obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o
|
||||
|
||||
endif # drivers
|
||||
|
|
|
|||
297
drivers/mtd/nand/raw/Kconfig
Normal file
297
drivers/mtd/nand/raw/Kconfig
Normal file
|
|
@ -0,0 +1,297 @@
|
|||
|
||||
menuconfig NAND
|
||||
bool "NAND Device Support"
|
||||
if NAND
|
||||
|
||||
config SYS_NAND_SELF_INIT
|
||||
bool
|
||||
help
|
||||
This option, if enabled, provides more flexible and linux-like
|
||||
NAND initialization process.
|
||||
|
||||
config NAND_ATMEL
|
||||
bool "Support Atmel NAND controller"
|
||||
imply SYS_NAND_USE_FLASH_BBT
|
||||
help
|
||||
Enable this driver for NAND flash platforms using an Atmel NAND
|
||||
controller.
|
||||
|
||||
config NAND_DAVINCI
|
||||
bool "Support TI Davinci NAND controller"
|
||||
help
|
||||
Enable this driver for NAND flash controllers available in TI Davinci
|
||||
and Keystone2 platforms
|
||||
|
||||
config NAND_DENALI
|
||||
bool
|
||||
select SYS_NAND_SELF_INIT
|
||||
imply CMD_NAND
|
||||
|
||||
config NAND_DENALI_DT
|
||||
bool "Support Denali NAND controller as a DT device"
|
||||
select NAND_DENALI
|
||||
depends on OF_CONTROL && DM
|
||||
help
|
||||
Enable the driver for NAND flash on platforms using a Denali NAND
|
||||
controller as a DT device.
|
||||
|
||||
config NAND_DENALI_SPARE_AREA_SKIP_BYTES
|
||||
int "Number of bytes skipped in OOB area"
|
||||
depends on NAND_DENALI
|
||||
range 0 63
|
||||
help
|
||||
This option specifies the number of bytes to skip from the beginning
|
||||
of OOB area before last ECC sector data starts. This is potentially
|
||||
used to preserve the bad block marker in the OOB area.
|
||||
|
||||
config NAND_LPC32XX_SLC
|
||||
bool "Support LPC32XX_SLC controller"
|
||||
help
|
||||
Enable the LPC32XX SLC NAND controller.
|
||||
|
||||
config NAND_OMAP_GPMC
|
||||
bool "Support OMAP GPMC NAND controller"
|
||||
depends on ARCH_OMAP2PLUS
|
||||
help
|
||||
Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
|
||||
GPMC controller is used for parallel NAND flash devices, and can
|
||||
do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
|
||||
and BCH16 ECC algorithms.
|
||||
|
||||
config NAND_OMAP_GPMC_PREFETCH
|
||||
bool "Enable GPMC Prefetch"
|
||||
depends on NAND_OMAP_GPMC
|
||||
default y
|
||||
help
|
||||
On OMAP platforms that use the GPMC controller
|
||||
(CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
|
||||
uses the prefetch mode to speed up read operations.
|
||||
|
||||
config NAND_OMAP_ELM
|
||||
bool "Enable ELM driver for OMAPxx and AMxx platforms."
|
||||
depends on NAND_OMAP_GPMC && !OMAP34XX
|
||||
help
|
||||
ELM controller is used for ECC error detection (not ECC calculation)
|
||||
of BCH4, BCH8 and BCH16 ECC algorithms.
|
||||
Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
|
||||
thus such SoC platforms need to depend on software library for ECC error
|
||||
detection. However ECC calculation on such plaforms would still be
|
||||
done by GPMC controller.
|
||||
|
||||
config NAND_VF610_NFC
|
||||
bool "Support for Freescale NFC for VF610"
|
||||
select SYS_NAND_SELF_INIT
|
||||
imply CMD_NAND
|
||||
help
|
||||
Enables support for NAND Flash Controller on some Freescale
|
||||
processors like the VF610, MCF54418 or Kinetis K70.
|
||||
The driver supports a maximum 2k page size. The driver
|
||||
currently does not support hardware ECC.
|
||||
|
||||
choice
|
||||
prompt "Hardware ECC strength"
|
||||
depends on NAND_VF610_NFC
|
||||
default SYS_NAND_VF610_NFC_45_ECC_BYTES
|
||||
help
|
||||
Select the ECC strength used in the hardware BCH ECC block.
|
||||
|
||||
config SYS_NAND_VF610_NFC_45_ECC_BYTES
|
||||
bool "24-error correction (45 ECC bytes)"
|
||||
|
||||
config SYS_NAND_VF610_NFC_60_ECC_BYTES
|
||||
bool "32-error correction (60 ECC bytes)"
|
||||
|
||||
endchoice
|
||||
|
||||
config NAND_PXA3XX
|
||||
bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
|
||||
select SYS_NAND_SELF_INIT
|
||||
imply CMD_NAND
|
||||
help
|
||||
This enables the driver for the NAND flash device found on
|
||||
PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
|
||||
|
||||
config NAND_SUNXI
|
||||
bool "Support for NAND on Allwinner SoCs"
|
||||
default ARCH_SUNXI
|
||||
depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
|
||||
select SYS_NAND_SELF_INIT
|
||||
select SYS_NAND_U_BOOT_LOCATIONS
|
||||
select SPL_NAND_SUPPORT
|
||||
imply CMD_NAND
|
||||
---help---
|
||||
Enable support for NAND. This option enables the standard and
|
||||
SPL drivers.
|
||||
The SPL driver only supports reading from the NAND using DMA
|
||||
transfers.
|
||||
|
||||
if NAND_SUNXI
|
||||
|
||||
config NAND_SUNXI_SPL_ECC_STRENGTH
|
||||
int "Allwinner NAND SPL ECC Strength"
|
||||
default 64
|
||||
|
||||
config NAND_SUNXI_SPL_ECC_SIZE
|
||||
int "Allwinner NAND SPL ECC Step Size"
|
||||
default 1024
|
||||
|
||||
config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
|
||||
int "Allwinner NAND SPL Usable Page Size"
|
||||
default 1024
|
||||
|
||||
endif
|
||||
|
||||
config NAND_ARASAN
|
||||
bool "Configure Arasan Nand"
|
||||
select SYS_NAND_SELF_INIT
|
||||
imply CMD_NAND
|
||||
help
|
||||
This enables Nand driver support for Arasan nand flash
|
||||
controller. This uses the hardware ECC for read and
|
||||
write operations.
|
||||
|
||||
config NAND_MXC
|
||||
bool "MXC NAND support"
|
||||
depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
|
||||
imply CMD_NAND
|
||||
help
|
||||
This enables the NAND driver for the NAND flash controller on the
|
||||
i.MX27 / i.MX31 / i.MX5 rocessors.
|
||||
|
||||
config NAND_MXS
|
||||
bool "MXS NAND support"
|
||||
depends on MX23 || MX28 || MX6 || MX7
|
||||
select SYS_NAND_SELF_INIT
|
||||
imply CMD_NAND
|
||||
select APBH_DMA
|
||||
select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
|
||||
select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
|
||||
help
|
||||
This enables NAND driver for the NAND flash controller on the
|
||||
MXS processors.
|
||||
|
||||
if NAND_MXS
|
||||
|
||||
config NAND_MXS_DT
|
||||
bool "Support MXS NAND controller as a DT device"
|
||||
depends on OF_CONTROL && MTD
|
||||
help
|
||||
Enable the driver for MXS NAND flash on platforms using
|
||||
device tree.
|
||||
|
||||
config NAND_MXS_USE_MINIMUM_ECC
|
||||
bool "Use minimum ECC strength supported by the controller"
|
||||
default false
|
||||
|
||||
endif
|
||||
|
||||
config NAND_ZYNQ
|
||||
bool "Support for Zynq Nand controller"
|
||||
select SYS_NAND_SELF_INIT
|
||||
imply CMD_NAND
|
||||
help
|
||||
This enables Nand driver support for Nand flash controller
|
||||
found on Zynq SoC.
|
||||
|
||||
config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
|
||||
bool "Enable use of 1st stage bootloader timing for NAND"
|
||||
depends on NAND_ZYNQ
|
||||
help
|
||||
This flag prevent U-boot reconfigure NAND flash controller and reuse
|
||||
the NAND timing from 1st stage bootloader.
|
||||
|
||||
comment "Generic NAND options"
|
||||
|
||||
config SYS_NAND_BLOCK_SIZE
|
||||
hex "NAND chip eraseblock size"
|
||||
depends on ARCH_SUNXI
|
||||
help
|
||||
Number of data bytes in one eraseblock for the NAND chip on the
|
||||
board. This is the multiple of NAND_PAGE_SIZE and the number of
|
||||
pages.
|
||||
|
||||
config SYS_NAND_PAGE_SIZE
|
||||
hex "NAND chip page size"
|
||||
depends on ARCH_SUNXI
|
||||
help
|
||||
Number of data bytes in one page for the NAND chip on the
|
||||
board, not including the OOB area.
|
||||
|
||||
config SYS_NAND_OOBSIZE
|
||||
hex "NAND chip OOB size"
|
||||
depends on ARCH_SUNXI
|
||||
help
|
||||
Number of bytes in the Out-Of-Band area for the NAND chip on
|
||||
the board.
|
||||
|
||||
# Enhance depends when converting drivers to Kconfig which use this config
|
||||
# option (mxc_nand, ndfc, omap_gpmc).
|
||||
config SYS_NAND_BUSWIDTH_16BIT
|
||||
bool "Use 16-bit NAND interface"
|
||||
depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
|
||||
help
|
||||
Indicates that NAND device has 16-bit wide data-bus. In absence of this
|
||||
config, bus-width of NAND device is assumed to be either 8-bit and later
|
||||
determined by reading ONFI params.
|
||||
Above config is useful when NAND device's bus-width information cannot
|
||||
be determined from on-chip ONFI params, like in following scenarios:
|
||||
- SPL boot does not support reading of ONFI parameters. This is done to
|
||||
keep SPL code foot-print small.
|
||||
- In current U-Boot flow using nand_init(), driver initialization
|
||||
happens in board_nand_init() which is called before any device probe
|
||||
(nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
|
||||
not available while configuring controller. So a static CONFIG_NAND_xx
|
||||
is needed to know the device's bus-width in advance.
|
||||
|
||||
if SPL
|
||||
|
||||
config SYS_NAND_U_BOOT_LOCATIONS
|
||||
bool "Define U-boot binaries locations in NAND"
|
||||
help
|
||||
Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
|
||||
This option should not be enabled when compiling U-boot for boards
|
||||
defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
|
||||
file.
|
||||
|
||||
config SYS_NAND_U_BOOT_OFFS
|
||||
hex "Location in NAND to read U-Boot from"
|
||||
default 0x800000 if NAND_SUNXI
|
||||
depends on SYS_NAND_U_BOOT_LOCATIONS
|
||||
help
|
||||
Set the offset from the start of the nand where u-boot should be
|
||||
loaded from.
|
||||
|
||||
config SYS_NAND_U_BOOT_OFFS_REDUND
|
||||
hex "Location in NAND to read U-Boot from"
|
||||
default SYS_NAND_U_BOOT_OFFS
|
||||
depends on SYS_NAND_U_BOOT_LOCATIONS
|
||||
help
|
||||
Set the offset from the start of the nand where the redundant u-boot
|
||||
should be loaded from.
|
||||
|
||||
config SPL_NAND_AM33XX_BCH
|
||||
bool "Enables SPL-NAND driver which supports ELM based"
|
||||
depends on NAND_OMAP_GPMC && !OMAP34XX
|
||||
default y
|
||||
help
|
||||
Hardware ECC correction. This is useful for platforms which have ELM
|
||||
hardware engine and use NAND boot mode.
|
||||
Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
|
||||
so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
|
||||
SPL-NAND driver with software ECC correction support.
|
||||
|
||||
config SPL_NAND_DENALI
|
||||
bool "Support Denali NAND controller for SPL"
|
||||
help
|
||||
This is a small implementation of the Denali NAND controller
|
||||
for use on SPL.
|
||||
|
||||
config SPL_NAND_SIMPLE
|
||||
bool "Use simple SPL NAND driver"
|
||||
depends on !SPL_NAND_AM33XX_BCH
|
||||
help
|
||||
Support for NAND boot using simple NAND drivers that
|
||||
expose the cmd_ctrl() interface.
|
||||
endif
|
||||
|
||||
endif # if NAND
|
||||
77
drivers/mtd/nand/raw/Makefile
Normal file
77
drivers/mtd/nand/raw/Makefile
Normal file
|
|
@ -0,0 +1,77 @@
|
|||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
# (C) Copyright 2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
|
||||
ifdef CONFIG_SPL_BUILD
|
||||
|
||||
ifdef CONFIG_SPL_NAND_DRIVERS
|
||||
NORMAL_DRIVERS=y
|
||||
endif
|
||||
|
||||
obj-$(CONFIG_SPL_NAND_AM33XX_BCH) += am335x_spl_bch.o
|
||||
obj-$(CONFIG_SPL_NAND_DENALI) += denali_spl.o
|
||||
obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o
|
||||
obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
|
||||
obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
|
||||
obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o
|
||||
obj-$(CONFIG_SPL_NAND_IDENT) += nand_ids.o nand_timings.o
|
||||
obj-$(CONFIG_SPL_NAND_INIT) += nand.o
|
||||
ifeq ($(CONFIG_SPL_ENV_SUPPORT),y)
|
||||
obj-$(CONFIG_ENV_IS_IN_NAND) += nand_util.o
|
||||
endif
|
||||
|
||||
else # not spl
|
||||
|
||||
NORMAL_DRIVERS=y
|
||||
|
||||
obj-y += nand.o
|
||||
obj-y += nand_bbt.o
|
||||
obj-y += nand_ids.o
|
||||
obj-y += nand_util.o
|
||||
obj-y += nand_ecc.o
|
||||
obj-y += nand_base.o
|
||||
obj-y += nand_timings.o
|
||||
|
||||
endif # not spl
|
||||
|
||||
ifdef NORMAL_DRIVERS
|
||||
|
||||
obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
|
||||
|
||||
obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o
|
||||
obj-$(CONFIG_NAND_ARASAN) += arasan_nfc.o
|
||||
obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
|
||||
obj-$(CONFIG_NAND_DENALI) += denali.o
|
||||
obj-$(CONFIG_NAND_DENALI_DT) += denali_dt.o
|
||||
obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
|
||||
obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
|
||||
obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
|
||||
obj-$(CONFIG_NAND_FSMC) += fsmc_nand.o
|
||||
obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o
|
||||
obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
|
||||
obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
|
||||
obj-$(CONFIG_NAND_LPC32XX_MLC) += lpc32xx_nand_mlc.o
|
||||
obj-$(CONFIG_NAND_LPC32XX_SLC) += lpc32xx_nand_slc.o
|
||||
obj-$(CONFIG_NAND_VF610_NFC) += vf610_nfc.o
|
||||
obj-$(CONFIG_NAND_MXC) += mxc_nand.o
|
||||
obj-$(CONFIG_NAND_MXS) += mxs_nand.o
|
||||
obj-$(CONFIG_NAND_MXS_DT) += mxs_nand_dt.o
|
||||
obj-$(CONFIG_NAND_PXA3XX) += pxa3xx_nand.o
|
||||
obj-$(CONFIG_NAND_SPEAR) += spr_nand.o
|
||||
obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
|
||||
obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
|
||||
obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
|
||||
obj-$(CONFIG_NAND_PLAT) += nand_plat.o
|
||||
obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
|
||||
obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
|
||||
|
||||
else # minimal SPL drivers
|
||||
|
||||
obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
|
||||
obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o
|
||||
obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
|
||||
obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o
|
||||
obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o
|
||||
|
||||
endif # drivers
|
||||
|
|
@ -9,7 +9,7 @@
|
|||
|
||||
/*
|
||||
*
|
||||
* linux/drivers/mtd/nand/nand_davinci.c
|
||||
* linux/drivers/mtd/nand/raw/nand_davinci.c
|
||||
*
|
||||
* NAND Flash Driver
|
||||
*
|
||||
|
|
@ -3,7 +3,7 @@
|
|||
* This file contains an ECC algorithm from Toshiba that detects and
|
||||
* corrects 1 bit errors in a 256 byte block of data.
|
||||
*
|
||||
* drivers/mtd/nand/nand_ecc.c
|
||||
* drivers/mtd/nand/raw/nand_ecc.c
|
||||
*
|
||||
* Copyright (C) 2000-2004 Steven J. Hill (sjhill@realitydiluted.com)
|
||||
* Toshiba America Electronics Components, Inc.
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* drivers/mtd/nand/nand_util.c
|
||||
* drivers/mtd/nand/raw/nand_util.c
|
||||
*
|
||||
* Copyright (C) 2006 by Weiss-Electronic GmbH.
|
||||
* All rights reserved.
|
||||
|
|
@ -1,6 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* drivers/mtd/nand/pxa3xx_nand.c
|
||||
* drivers/mtd/nand/raw/pxa3xx_nand.c
|
||||
*
|
||||
* Copyright © 2005 Intel Corporation
|
||||
* Copyright © 2006 Marvell International Ltd.
|
||||
|
|
@ -240,7 +240,7 @@
|
|||
/* LB refresh timer prescal, 266MHz/32 */
|
||||
#define CONFIG_SYS_LBC_MRTPR 0x20000000 /*TODO */
|
||||
|
||||
/* drivers/mtd/nand/nand.c */
|
||||
/* drivers/mtd/nand/raw/nand.c */
|
||||
#if defined(CONFIG_NAND) && defined(CONFIG_SPL_BUILD)
|
||||
#define CONFIG_SYS_NAND_BASE 0xFFF00000
|
||||
#else
|
||||
|
|
|
|||
Loading…
Reference in a new issue