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rockchip: Convert the PMU IOMUX registers into an array

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This is easier to deal with when using generic code since it allows us to
use a register index instead of naming each register.

Adjust it, adding an enum to improve readability.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2016-01-21 19:43:33 -07:00
parent 1e724f8ea8
commit a4275f5e52
2 changed files with 10 additions and 6 deletions
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12
arch/arm/include/asm/arch-rockchip/pmu_rk3288.h
View file

@ -46,14 +46,18 @@ struct rk3288_pmu {
u32 gpio_op;
u32 gpio0_sel18; /* 0x80 */
u32 gpio0a_iomux;
u32 gpio0b_iomux;
u32 gpio0c_iomux;
u32 gpio0d_iomux;
u32 gpio0_iomux[4]; /* a, b, c, d */
u32 sys_reg[4];
};
check_member(rk3288_pmu, sys_reg[3], 0x00a0);
enum {
PMU_GPIO0_A = 0,
PMU_GPIO0_B,
PMU_GPIO0_C,
PMU_GPIO0_D,
};
/* PMU_GPIO0_B_IOMUX */
enum {
GPIO0_B7_SHIFT = 14,

4
drivers/pinctrl/rockchip/pinctrl_rk3288.c
View file

@ -56,10 +56,10 @@ static void pinctrl_rk3288_i2c_config(struct rk3288_grf *grf,
{
switch (i2c_id) {
case PERIPH_ID_I2C0:
clrsetbits_le32(&pmu->gpio0b_iomux,
clrsetbits_le32(&pmu->gpio0_iomux[PMU_GPIO0_B],
GPIO0_B7_MASK << GPIO0_B7_SHIFT,
GPIO0_B7_I2C0PMU_SDA << GPIO0_B7_SHIFT);
clrsetbits_le32(&pmu->gpio0b_iomux,
clrsetbits_le32(&pmu->gpio0_iomux[PMU_GPIO0_C],
GPIO0_C0_MASK << GPIO0_C0_SHIFT,
GPIO0_C0_I2C0PMU_SCL << GPIO0_C0_SHIFT);
break;