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https://github.com/AsahiLinux/u-boot
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VoiceBlue: limit line lenght to 80 characters
Reindent configuration header to limit line lenght to 80 characters by removing obvious and sometimes misleading comments. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This commit is contained in:
Ladislav Michl
Tom Rix
parent
779b534385
commit
a32c1e0ecd
1 changed files with 81 additions and 85 deletions
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@ -31,8 +31,8 @@
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#define CONFIG_OMAP1510 1 /* which is in a 5910 */
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/* Input clock of PLL */
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#define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz input clock */
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#define CONFIG_XTAL_FREQ 12000000
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#define CONFIG_SYS_CLK_FREQ 150000000 /* 150MHz */
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#define CONFIG_XTAL_FREQ 12000000 /* 12MHz */
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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@ -48,55 +48,53 @@
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/*
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 0x10000000
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#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
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#define PHYS_FLASH_1 0x0000000
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#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
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#define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */
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/*
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* FLASH organization
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*/
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#define CONFIG_SYS_FLASH_CFI /* Flash is CFI conformant */
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#define CONFIG_FLASH_CFI_DRIVER /* Use the common driver */
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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/* FIXME: Does not work on AMD flash */
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/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */ /* use buffered writes (20x faster) */
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#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max # of sectors on one chip */
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#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
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#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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/*
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* Environment settings
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*/
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN)
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#define CONFIG_ENV_SIZE (8 * 1024)
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN)
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#define CONFIG_ENV_SIZE (8 * 1024)
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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#define CONFIG_ENV_OVERWRITE
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/*
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* Size of malloc() pool and stack
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*/
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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#define CONFIG_SYS_GBL_DATA_SIZE 128
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#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
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#define CONFIG_STACKSIZE (1 * 1024 * 1024)
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#define PHYS_SDRAM_1_RESERVED (CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE)
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#define CONFIG_STACKSIZE (1 * 1024 * 1024)
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/*
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* Hardware drivers
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*/
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ)
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#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE
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#define CONFIG_NET_MULTI
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#define CONFIG_SMC91111
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#define CONFIG_SMC91111_BASE 0x08000300
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#define CONFIG_SMC91111_BASE 0x08000300
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 512
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
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#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED 100000
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@ -104,24 +102,16 @@
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#define CONFIG_DRIVER_OMAP1510_I2C
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#define CONFIG_RTC_DS1307
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68
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#define CONFIG_SYS_I2C_RTC_ADDR 0x68
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/*
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* NS16550 Configuration
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*/
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK (CONFIG_XTAL_FREQ) /* can be 12M/32Khz or 48Mhz */
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#define CONFIG_SYS_NS16550_COM1 OMAP1510_UART1_BASE /* uart1 */
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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/*
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* Command line configuration.
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* Command line configuration
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*/
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#include <config_cmd_default.h>
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@ -138,7 +128,6 @@
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_RUN
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/*
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* BOOTP options
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*/
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@ -147,36 +136,39 @@
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#define CONFIG_BOOTP_HOSTNAME
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_LOOPW
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
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#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
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#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
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#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
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#define CONFIG_SYS_AUTOLOAD "n"
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#define CONFIG_BOOTCOMMAND "run nboot"
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#define CONFIG_PREBOOT "run setup"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"silent=1\0" \
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"ospart=0\0" \
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"bootfile=/boot/uImage\0" \
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"setpart=" \
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"if test -n $swapos; then " \
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"setenv swapos; saveenv; " \
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"if test $ospart -eq 0; then setenv ospart 1; else setenv ospart 0; fi; "\
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"fi\0" \
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"setup=setenv bootargs console=ttyS0,$baudrate " \
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"mtdparts=$mtdparts\0" \
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"nfsargs=setenv bootargs $bootargs " \
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"silent=1\0" \
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"ospart=0\0" \
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"bootfile=/boot/uImage\0" \
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"setpart=" \
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"if test -n $swapos; then " \
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"setenv swapos; saveenv; " \
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"if test $ospart -eq 0; then " \
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"setenv ospart 1; " \
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"else " \
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"setenv ospart 0; " \
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"fi; " \
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"fi\0" \
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"setup=setenv bootargs console=ttyS0,$baudrate " \
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"mtdparts=$mtdparts\0" \
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"nfsargs=setenv bootargs $bootargs " \
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"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
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"nfsroot=$rootpath root=/dev/nfs\0" \
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"flashargs=run setpart; setenv bootargs $bootargs " \
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"root=mtd:data$ospart ro " \
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"rootfstype=jffs2\0" \
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"initrdargs=setenv bootargs $bootargs " \
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"nfsroot=$rootpath root=/dev/nfs\0" \
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"flashargs=run setpart; setenv bootargs $bootargs " \
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"root=mtd:data$ospart ro " \
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"rootfstype=jffs2\0" \
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"initrdargs=setenv bootargs $bootargs " \
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"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
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"fboot=run flashargs; chpart data$ospart; fsload; bootm\0" \
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"mboot=bootp; run initrdargs; tftp; bootm\0" \
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"fboot=run flashargs; chpart data$ospart; fsload; bootm\0" \
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"mboot=bootp; run initrdargs; tftp; bootm\0" \
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"nboot=bootp; run nfsargs; tftp; bootm\0"
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#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
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@ -188,14 +180,14 @@
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#endif
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/*
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* JFFS2 partitions (mtdparts command line support)
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* Partitions (mtdparts command line support)
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*/
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
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#define CONFIG_FLASH_CFI_MTD
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#define MTDIDS_DEFAULT "nor0=omapflash.0"
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#define MTDPARTS_DEFAULT "mtdparts=omapflash.0:256k(u-boot),64k(env),64k(r_env),16192k(data0),-(data1)"
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#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
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#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \
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"256k(u-boot),64k(env),64k(r_env),16192k(data0),-(data1)"
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/*
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* Miscellaneous configurable options
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@ -203,26 +195,30 @@
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT "# " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_PROMPT "# "
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
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#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - PHYS_SDRAM_1_RESERVED
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#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1)
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#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE - \
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(CONFIG_SYS_MONITOR_LEN + CONFIG_SYS_MALLOC_LEN + CONFIG_STACKSIZE))
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#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x400000)
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/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
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/*
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* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1.
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* This time is further subdivided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
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#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE
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#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
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#define CONFIG_SYS_HZ 1000
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#define OMAP5910_DPLL_DIV 1
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#define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \
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(1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
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#define OMAP5910_DPLL_DIV 1
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#define OMAP5910_DPLL_MUL \
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((CONFIG_SYS_CLK_FREQ * (1 << OMAP5910_DPLL_DIV)) / CONFIG_XTAL_FREQ)
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#define OMAP5910_ARM_PER_DIV 2 /* CKL/4 */
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#define OMAP5910_LCD_DIV 2 /* CKL/4 */
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