Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2025-03-14 05:46:58 +00:00
Code Issues Projects Releases Packages Wiki Activity

MIPS: use common code from lib/time.c

Browse source 
The common code just needs the C0_COUNT as free running counter,
without the need of writing and checking C0_COMPARE.

The function get_tbclk() is still implemented here instead of changing
all places of CONFIG_SYS_MIPS_TIMER_FREQ to CONFIG_SYS_TIMER_RATE.

The change was tested on a MIPS32 system, but as the MIPS64 code
was/is the same, this should be no problem.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
This commit is contained in:
Thomas Langer 2015-01-14 18:44:00 +00:00 • committed by Daniel Schwierzeck
parent e13a50b34b
commit a18a477147
2 changed files with 8 additions and 110 deletions
arch/mips/cpu
mips32
time.c
mips64
time.c

59
arch/mips/cpu/mips32/time.c
View file

@ -8,63 +8,12 @@
#include <common.h> #include <common.h>
#include <asm/mipsregs.h> #include <asm/mipsregs.h>
static unsigned long timestamp; unsigned long notrace timer_read_counter(void)
/* how many counter cycles in a jiffy */
#define CYCLES_PER_JIFFY \
(CONFIG_SYS_MIPS_TIMER_FREQ + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ
/*
* timer without interrupts
*/
int timer_init(void)
{ {
/* Set up the timer for the first expiration. */ return read_c0_count();
write_c0_compare(read_c0_count() + CYCLES_PER_JIFFY);
return 0;
} }
ulong get_timer(ulong base) ulong notrace get_tbclk(void)
{ {
unsigned int count; return CONFIG_SYS_MIPS_TIMER_FREQ;
unsigned int expirelo = read_c0_compare();
/* Check to see if we have missed any timestamps. */
count = read_c0_count();
while ((count - expirelo) < 0x7fffffff) {
expirelo += CYCLES_PER_JIFFY;
timestamp++;
}
write_c0_compare(expirelo);
return timestamp - base;
}
void __udelay(unsigned long usec)
{
unsigned int tmo;
tmo = read_c0_count() + (usec * (CONFIG_SYS_MIPS_TIMER_FREQ / 1000000));
while ((tmo - read_c0_count()) < 0x7fffffff)
/*NOP*/;
}
/*
* This function is derived from PowerPC code (read timebase as long long).
* On MIPS it just returns the timer value.
*/
unsigned long long get_ticks(void)
{
return get_timer(0);
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On MIPS it returns the number of timer ticks per second.
*/
ulong get_tbclk(void)
{
return CONFIG_SYS_HZ;
} }

59
arch/mips/cpu/mips64/time.c
View file

@ -8,63 +8,12 @@
#include <common.h> #include <common.h>
#include <asm/mipsregs.h> #include <asm/mipsregs.h>
static unsigned long timestamp; unsigned long notrace timer_read_counter(void)
/* how many counter cycles in a jiffy */
#define CYCLES_PER_JIFFY \
(CONFIG_SYS_MIPS_TIMER_FREQ + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ
/*
* timer without interrupts
*/
int timer_init(void)
{ {
/* Set up the timer for the first expiration. */ return read_c0_count();
write_c0_compare(read_c0_count() + CYCLES_PER_JIFFY);
return 0;
} }
ulong get_timer(ulong base) ulong notrace get_tbclk(void)
{ {
unsigned int count; return CONFIG_SYS_MIPS_TIMER_FREQ;
unsigned int expirelo = read_c0_compare();
/* Check to see if we have missed any timestamps. */
count = read_c0_count();
while ((count - expirelo) < 0x7fffffff) {
expirelo += CYCLES_PER_JIFFY;
timestamp++;
}
write_c0_compare(expirelo);
return timestamp - base;
}
void __udelay(unsigned long usec)
{
unsigned int tmo;
tmo = read_c0_count() + (usec * (CONFIG_SYS_MIPS_TIMER_FREQ / 1000000));
while ((tmo - read_c0_count()) < 0x7fffffff)
/*NOP*/;
}
/*
* This function is derived from PowerPC code (read timebase as long long).
* On MIPS it just returns the timer value.
*/
unsigned long long get_ticks(void)
{
return get_timer(0);
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On MIPS it returns the number of timer ticks per second.
*/
ulong get_tbclk(void)
{
return CONFIG_SYS_HZ;
} }