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rockchip: rk3399: default enable SPL LIBCOMMON and LIBGENERIC
We needs SPL LIBCOMMON and LIBGENERIC for all boards, so we can enable them by default and no need to define in each board. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
parent
8ef62a4aab
commit
a13f870ad4
13 changed files with 6 additions and 24 deletions
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@ -73,6 +73,12 @@ config SYS_SOC
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config SYS_MALLOC_F_LEN
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default 0x4000
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config SPL_LIBCOMMON_SUPPORT
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default y
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config SPL_LIBGENERIC_SUPPORT
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default y
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config TPL_LDSCRIPT
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default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
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@ -2,8 +2,6 @@ CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_BOOT_MODE_REG=0
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
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@ -1,8 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
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CONFIG_NR_DRAM_BANKS=1
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@ -1,8 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
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CONFIG_TARGET_ROCK960_RK3399=y
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@ -1,8 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
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CONFIG_NR_DRAM_BANKS=1
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@ -1,8 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
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CONFIG_NR_DRAM_BANKS=1
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@ -1,8 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
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CONFIG_NR_DRAM_BANKS=1
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@ -1,8 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
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CONFIG_NR_DRAM_BANKS=1
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@ -1,8 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
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CONFIG_NR_DRAM_BANKS=1
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@ -2,8 +2,6 @@ CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0
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CONFIG_TARGET_PUMA_RK3399=y
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@ -1,8 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
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CONFIG_NR_DRAM_BANKS=1
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@ -1,8 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
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CONFIG_TARGET_ROCK960_RK3399=y
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@ -1,8 +1,6 @@
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CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
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CONFIG_NR_DRAM_BANKS=1
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