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DM9000: Add data bus-width auto detection.
The U-boot DM9000x driver contains a compile time bus-width definition for the databus connected to the network controller. This compile check makes the code unclear, inflexible and is unneccessary. It can be asked to the network controller what its bus-width is by reading bits 6 and 7 of the interrupt status register. The linux kernel already uses a runtime mechanism to determine this bus-width, so the implementation below looks somewhat like that implementation. This change has been tested with DM9000A, DM9000E, DM9000EP. Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
This commit is contained in:
Remy Bohmer
Ben Warren
parent
ea183432e7
commit
a101361bfe
3 changed files with 129 additions and 66 deletions
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@ -36,7 +36,13 @@ v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
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--------------------------------------
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12/15/2003 Initial port to u-boot by Sascha Hauer <saschahauer@web.de>
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12/15/2003 Initial port to u-boot by
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Sascha Hauer <saschahauer@web.de>
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06/03/2008 Remy Bohmer <linux@bohmer.net>
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- Added autodetect of databus width.
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These changes are tested with DM9000{A,EP,E} together
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with a 200MHz Atmel AT91SAM92161 core
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TODO: Homerun NIC and longrun NIC are not functional, only internal at the
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moment.
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@ -84,8 +90,11 @@ typedef struct board_info {
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u8 device_wait_reset; /* device state */
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u8 nic_type; /* NIC type */
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unsigned char srom[128];
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} board_info_t;
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board_info_t dmfe_info;
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void (*outblk)(void *data_ptr, int count);
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void (*inblk)(void *data_ptr, int count);
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void (*rx_status)(u16 *RxStatus, u16 *RxLen);
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} board_info_t;
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static board_info_t dm9000_info;
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/* For module input parameter */
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static int media_mode = DM9000_AUTO;
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@ -127,7 +136,81 @@ dump_regs(void)
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DM9000_DBG("ISR (0xFE): %02x\n", DM9000_ior(ISR));
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DM9000_DBG("\n");
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}
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#endif /* */
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#endif
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static void dm9000_outblk_8bit(void *data_ptr, int count)
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{
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int i;
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for (i = 0; i < count; i++)
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DM9000_outb((((u8 *) data_ptr)[i] & 0xff), DM9000_DATA);
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}
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static void dm9000_outblk_16bit(void *data_ptr, int count)
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{
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int i;
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u32 tmplen = (count + 1) / 2;
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for (i = 0; i < tmplen; i++)
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DM9000_outw(((u16 *) data_ptr)[i], DM9000_DATA);
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}
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static void dm9000_outblk_32bit(void *data_ptr, int count)
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{
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int i;
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u32 tmplen = (count + 3) / 4;
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for (i = 0; i < tmplen; i++)
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DM9000_outl(((u32 *) data_ptr)[i], DM9000_DATA);
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}
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static void dm9000_inblk_8bit(void *data_ptr, int count)
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{
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int i;
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for (i = 0; i < count; i++)
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((u8 *) data_ptr)[i] = DM9000_inb(DM9000_DATA);
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}
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static void dm9000_inblk_16bit(void *data_ptr, int count)
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{
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int i;
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u32 tmplen = (count + 1) / 2;
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for (i = 0; i < tmplen; i++)
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((u16 *) data_ptr)[i] = DM9000_inw(DM9000_DATA);
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}
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static void dm9000_inblk_32bit(void *data_ptr, int count)
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{
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int i;
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u32 tmplen = (count + 3) / 4;
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for (i = 0; i < tmplen; i++)
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((u32 *) data_ptr)[i] = DM9000_inl(DM9000_DATA);
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}
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static void dm9000_rx_status_32bit(u16 *RxStatus, u16 *RxLen)
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{
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u32 tmpdata = DM9000_inl(DM9000_DATA);
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DM9000_outb(DM9000_MRCMD, DM9000_IO);
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*RxStatus = tmpdata;
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*RxLen = tmpdata >> 16;
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}
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static void dm9000_rx_status_16bit(u16 *RxStatus, u16 *RxLen)
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{
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DM9000_outb(DM9000_MRCMD, DM9000_IO);
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*RxStatus = DM9000_inw(DM9000_DATA);
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*RxLen = DM9000_inw(DM9000_DATA);
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}
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static void dm9000_rx_status_8bit(u16 *RxStatus, u16 *RxLen)
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{
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DM9000_outb(DM9000_MRCMD, DM9000_IO);
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*RxStatus = DM9000_inb(DM9000_DATA) + (DM9000_inb(DM9000_DATA) << 8);
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*RxLen = DM9000_inb(DM9000_DATA) + (DM9000_inb(DM9000_DATA) << 8);
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}
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/*
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Search DM9000 board, allocate space and register it
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@ -236,7 +319,7 @@ program_dm9802(void)
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static void
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identify_nic(void)
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{
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struct board_info *db = &dmfe_info; /* Point a board information structure */
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struct board_info *db = &dm9000_info;
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u16 phy_reg3;
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DM9000_iow(DM9000_NCR, NCR_EXT_PHY);
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phy_reg3 = phy_read(3);
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@ -274,12 +357,46 @@ int
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eth_init(bd_t * bd)
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{
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int i, oft, lnk;
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u8 io_mode;
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struct board_info *db = &dm9000_info;
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DM9000_DBG("eth_init()\n");
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/* RESET device */
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dm9000_reset();
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dm9000_probe();
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/* Auto-detect 8/16/32 bit mode, ISR Bit 6+7 indicate bus width */
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io_mode = DM9000_ior(DM9000_ISR) >> 6;
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switch (io_mode) {
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case 0x0: /* 16-bit mode */
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printf("DM9000: running in 16 bit mode\n");
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db->outblk = dm9000_outblk_16bit;
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db->inblk = dm9000_inblk_16bit;
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db->rx_status = dm9000_rx_status_16bit;
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break;
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case 0x01: /* 32-bit mode */
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printf("DM9000: running in 32 bit mode\n");
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db->outblk = dm9000_outblk_32bit;
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db->inblk = dm9000_inblk_32bit;
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db->rx_status = dm9000_rx_status_32bit;
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break;
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case 0x02: /* 8 bit mode */
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printf("DM9000: running in 8 bit mode\n");
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db->outblk = dm9000_outblk_8bit;
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db->inblk = dm9000_inblk_8bit;
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db->rx_status = dm9000_rx_status_8bit;
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break;
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default:
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/* Assume 8 bit mode, will probably not work anyway */
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printf("DM9000: Undefined IO-mode:0x%x\n", io_mode);
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db->outblk = dm9000_outblk_8bit;
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db->inblk = dm9000_inblk_8bit;
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db->rx_status = dm9000_rx_status_8bit;
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break;
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}
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/* NIC Type: FASTETHER, HOMERUN, LONGRUN */
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identify_nic();
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@ -377,6 +494,8 @@ eth_send(volatile void *packet, int length)
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char *data_ptr;
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u32 tmplen, i;
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int tmo;
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struct board_info *db = &dm9000_info;
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DM9000_DBG("eth_send: length: %d\n", length);
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for (i = 0; i < length; i++) {
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if (i % 8 == 0)
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@ -388,24 +507,8 @@ eth_send(volatile void *packet, int length)
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data_ptr = (char *) packet;
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DM9000_outb(DM9000_MWCMD, DM9000_IO);
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#ifdef CONFIG_DM9000_USE_8BIT
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/* Byte mode */
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for (i = 0; i < length; i++)
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DM9000_outb((data_ptr[i] & 0xff), DM9000_DATA);
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#endif /* */
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#ifdef CONFIG_DM9000_USE_16BIT
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tmplen = (length + 1) / 2;
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for (i = 0; i < tmplen; i++)
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DM9000_outw(((u16 *) data_ptr)[i], DM9000_DATA);
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#endif /* */
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#ifdef CONFIG_DM9000_USE_32BIT
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tmplen = (length + 3) / 4;
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for (i = 0; i < tmplen; i++)
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DM9000_outl(((u32 *) data_ptr)[i], DM9000_DATA);
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#endif /* */
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/* push the data to the TX-fifo */
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(db->outblk)(data_ptr, length);
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/* Set TX length to DM9000 */
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DM9000_iow(DM9000_TXPLL, length & 0xff);
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@ -450,10 +553,7 @@ eth_rx(void)
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{
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u8 rxbyte, *rdptr = (u8 *) NetRxPackets[0];
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u16 RxStatus, RxLen = 0;
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u32 tmplen, i;
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#ifdef CONFIG_DM9000_USE_32BIT
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u32 tmpdata;
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#endif
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struct board_info *db = &dm9000_info;
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/* Check packet ready or not */
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DM9000_ior(DM9000_MRCMDX); /* Dummy read */
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@ -472,43 +572,14 @@ eth_rx(void)
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/* A packet ready now & Get status/length */
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DM9000_outb(DM9000_MRCMD, DM9000_IO);
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#ifdef CONFIG_DM9000_USE_8BIT
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RxStatus = DM9000_inb(DM9000_DATA) + (DM9000_inb(DM9000_DATA) << 8);
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RxLen = DM9000_inb(DM9000_DATA) + (DM9000_inb(DM9000_DATA) << 8);
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(db->rx_status)(&RxStatus, &RxLen);
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#endif /* */
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#ifdef CONFIG_DM9000_USE_16BIT
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RxStatus = DM9000_inw(DM9000_DATA);
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RxLen = DM9000_inw(DM9000_DATA);
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#endif /* */
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#ifdef CONFIG_DM9000_USE_32BIT
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tmpdata = DM9000_inl(DM9000_DATA);
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RxStatus = tmpdata;
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RxLen = tmpdata >> 16;
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#endif /* */
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DM9000_DBG("rx status: 0x%04x rx len: %d\n", RxStatus, RxLen);
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/* Move data from DM9000 */
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/* Read received packet from RX SRAM */
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#ifdef CONFIG_DM9000_USE_8BIT
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for (i = 0; i < RxLen; i++)
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rdptr[i] = DM9000_inb(DM9000_DATA);
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(db->inblk)(rdptr, RxLen);
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#endif /* */
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#ifdef CONFIG_DM9000_USE_16BIT
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tmplen = (RxLen + 1) / 2;
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for (i = 0; i < tmplen; i++)
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((u16 *) rdptr)[i] = DM9000_inw(DM9000_DATA);
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#endif /* */
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#ifdef CONFIG_DM9000_USE_32BIT
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tmplen = (RxLen + 3) / 4;
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for (i = 0; i < tmplen; i++)
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((u32 *) rdptr)[i] = DM9000_inl(DM9000_DATA);
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#endif /* */
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if ((RxStatus & 0xbf00) || (RxLen < 0x40)
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|| (RxLen > DM9000_PKT_MAX)) {
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if (RxStatus & 0x100) {
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@ -256,14 +256,10 @@
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#define CFG_CS5U_VAL 0x00008400
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#define CFG_CS5L_VAL 0x00000D03
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#define CONFIG_DRIVER_DM9000 1
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#define CONFIG_DRIVER_DM9000 1
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#define CONFIG_DM9000_BASE 0x16000000
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#define DM9000_IO CONFIG_DM9000_BASE
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#define DM9000_DATA (CONFIG_DM9000_BASE+4)
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/* #define CONFIG_DM9000_USE_8BIT */
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#define CONFIG_DM9000_USE_16BIT
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/* #define CONFIG_DM9000_USE_32BIT */
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/* f_{dpll}=2*f{ref}*(MFI+MFN/(MFD+1))/(PD+1)
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f_ref=16,777MHz
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@ -275,14 +275,10 @@
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#define CFG_MCIO0_VAL 0x00008407
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#define CFG_MCIO1_VAL 0x0000c108
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#define CONFIG_DRIVER_DM9000 1
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#define CONFIG_DRIVER_DM9000 1
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#define CONFIG_DM9000_BASE 0x08000000
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#define DM9000_IO CONFIG_DM9000_BASE
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#define DM9000_DATA (CONFIG_DM9000_BASE+0x8004)
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/* #define CONFIG_DM9000_USE_8BIT */
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/* #define CONFIG_DM9000_USE_16BIT */
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#define CONFIG_DM9000_USE_32BIT
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#define CONFIG_USB_OHCI_NEW 1
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#define CFG_USB_OHCI_BOARD_INIT 1
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