arch: x86: apl: Update FSP parameters

Add missing parameters to support full configuration of the latest FSP
MR6 release.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bernhard Messerklinger 2020-07-22 09:29:39 +02:00 committed by Bin Meng
parent 858e5a1a8b
commit a0186110af
5 changed files with 44 additions and 2 deletions

View file

@ -633,6 +633,17 @@ const struct fsp_binding fsp_m_bindings[] = {
.offset = offsetof(struct fsp_m_config, variable_nvs_buffer_ptr), .offset = offsetof(struct fsp_m_config, variable_nvs_buffer_ptr),
.propname = "fspm,variable-nvs-buffer-ptr", .propname = "fspm,variable-nvs-buffer-ptr",
}, { }, {
.type = FSP_UINT64,
.offset = offsetof(struct fsp_m_config, start_timer_ticker_of_pfet_assert),
.propname = "fspm,start-timer-ticker-of-pfet-assert",
}, {
.type = FSP_UINT8, .offset = offsetof(struct fsp_m_config, rt_en),
.propname = "fspm,rt-en",
}, {
.type = FSP_UINT8,
.offset = offsetof(struct fsp_m_config, skip_pcie_power_sequence),
.propname = "fspm,skip-pcie-power-sequence",
}, {
.propname = NULL .propname = NULL
} }
}; };
@ -1822,6 +1833,18 @@ const struct fsp_binding fsp_s_bindings[] = {
.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, .count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
port_usb20_hs_npre_drv_sel), port_usb20_hs_npre_drv_sel),
}, { }, {
.type = FSP_UINT8,
.offset = offsetof(struct fsp_s_config, os_selection),
.propname = "fsps,os-selection",
}, {
.type = FSP_UINT8,
.offset = offsetof(struct fsp_s_config, dptf_enabled),
.propname = "fsps,dptf-enabled",
}, {
.type = FSP_UINT8,
.offset = offsetof(struct fsp_s_config, pwm_enabled),
.propname = "fsps,pwm-enabled",
}, {
.propname = NULL .propname = NULL
} }
}; };

View file

@ -122,7 +122,10 @@ struct __packed fsp_m_config {
/* 0x150 */ /* 0x150 */
void *variable_nvs_buffer_ptr; void *variable_nvs_buffer_ptr;
u8 reserved_fspm_upd[12]; u64 start_timer_ticker_of_pfet_assert;
u8 rt_en;
u8 skip_pcie_power_sequence;
u8 reserved_fspm_upd[2];
}; };
/** FSP-M UPD Configuration */ /** FSP-M UPD Configuration */

View file

@ -351,7 +351,10 @@ struct __packed fsp_s_config {
u8 port_usb20_hs_npre_drv_sel[8]; u8 port_usb20_hs_npre_drv_sel[8];
/* 0x370 */ /* 0x370 */
u8 reserved_fsps_upd[16]; u8 os_selection;
u8 dptf_enabled;
u8 pwm_enabled;
u8 reserved_fsps_upd[13];
}; };
/** struct fsps_upd - FSP-S Configuration */ /** struct fsps_upd - FSP-S Configuration */
@ -563,4 +566,8 @@ struct __packed fsps_upd {
#define PCIE_RP_SELECTABLE_DEEMPHASIS_6_DB 0 #define PCIE_RP_SELECTABLE_DEEMPHASIS_6_DB 0
#define PCIE_RP_SELECTABLE_DEEMPHASIS_3_5_DB 1 #define PCIE_RP_SELECTABLE_DEEMPHASIS_3_5_DB 1
#define OS_SELECTION_WINDOWS 0
#define OS_SELECTION_ANDROID 1
#define OS_SELECTION_LINUX 3
#endif #endif

View file

@ -240,6 +240,9 @@ Optional properties:
- fspm,enable-reset-system: Enable Reset System - fspm,enable-reset-system: Enable Reset System
- fspm,enable-s3-heci2: Enable HECI2 in S3 resume path - fspm,enable-s3-heci2: Enable HECI2 in S3 resume path
- fspm,variable-nvs-buffer-ptr: - fspm,variable-nvs-buffer-ptr:
- fspm,start-timer-ticker-of-pfet-assert: PCIE SLOT Power Enable Assert Time - PFET
- fspm,rt-en: Real Time Enabling
- fspm,skip-pcie-power-sequence: Skip Pcie Power Sequence
Example: Example:

View file

@ -463,6 +463,12 @@ Optional properties:
- fsps,port-usb20-i-usb-tx-emphasis-en: PerPort HS Transmitter Emphasis - fsps,port-usb20-i-usb-tx-emphasis-en: PerPort HS Transmitter Emphasis
- fsps,port-usb20-per-port-rxi-set: PerPort HS Receiver Bias - fsps,port-usb20-per-port-rxi-set: PerPort HS Receiver Bias
- fsps,port-usb20-hs-npre-drv-sel: Delay/skew's strength control for HS driver - fsps,port-usb20-hs-npre-drv-sel: Delay/skew's strength control for HS driver
- fsps,os-selection: OS Selection
0: Windows
1: Android
3: Linux
- fsps,dptf-enabled: DPTF
- fsps,pwm-enabled: PWM Enabled
Example: Example: