Merge git://git.denx.de/u-boot-marvell

- Enable network interface on clearfog_gt_8k (Baruch)
- Fix dreamplug boot by adding an spi0 alias to the DT (Chris)
- Fix / enhance Marvell ddr3 setup / parameters (Chris)
- Change CONFIG_SYS_MALLOC_F_LEN to 0x2000 on db-88f6820-amc (Chris)
- Enable SPL_FLASH_BAR on db-88f6820-amc (Chris)
- Use correct pcie controller name in Armada-38x dts files (Chris)
- Disable d-cache on Kirkwood platforms as currently needed (Chris)
- Add a more descriptive comment to pci_mvebu.c (Stefan)
- Update Marvell maintainers entry (Stefan)

MAINTAINERS

@@ -161,16 +161,19 @@ S:	Maintained
 F:	arch/arm/cpu/armv8/hisilicon
 F:	arch/arm/include/asm/arch-hi6220/
 
-ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX
+ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX ARMADA-7K/8K
-M:	Prafulla Wadaskar <prafulla@marvell.com>
-M:	Luka Perkov <luka.perkov@sartura.hr>
 M:	Stefan Roese <sr@denx.de>
 S:	Maintained
 T:	git git://git.denx.de/u-boot-marvell.git
 F:	arch/arm/mach-kirkwood/
 F:	arch/arm/mach-mvebu/
 F:	drivers/ata/ahci_mvebu.c
-F:	drivers/phy/marvell/
+F:	drivers/ddr/marvell/
+F:	drivers/gpio/mvebu_gpio.c
+F:	drivers/spi/kirkwood_spi.c
+F:	drivers/pci/pci_mvebu.c
+F:	drivers/pci/pcie_dw_mvebu.c
+F:	drivers/watchdog/orion_wdt.c
 
 ARM MARVELL PXA
 M:	Marek Vasut <marex@denx.de>

arch/arm/dts/armada-385-amc.dts

@@ -133,7 +133,7 @@
 			};
 		};
 
-		pcie-controller {
+		pcie {
 			status = "okay";
 			pcie@1,0 {
 				/* Port 0, Lane 0 */

arch/arm/dts/armada-385-turris-omnia.dts

@@ -96,7 +96,7 @@
 			};
 		};
 
-		pcie-controller {
+		pcie {
 			status = "okay";
 
 			pcie@1,0 {

arch/arm/dts/armada-388-clearfog.dts

@@ -124,7 +124,7 @@
 			};
 		};
 
-		pcie-controller {
+		pcie {
 			status = "okay";
 			/*
 			 * The two PCIe units are accessible through

arch/arm/dts/armada-388-gp.dts

@@ -234,7 +234,7 @@
 			};
 		};
 
-		pcie-controller {
+		pcie {
 			status = "okay";
 			/*
 			 * One PCIe units is accessible through

arch/arm/dts/armada-38x-controlcenterdc.dts

@@ -243,7 +243,7 @@
 			};
 		};
 
-		pcie-controller {
+		pcie {
 			status = "okay";
 			/*
 			 * The two PCIe units are accessible through

arch/arm/dts/kirkwood-dreamplug.dts

@@ -18,6 +18,10 @@
 		stdout-path = &uart0;
 	};
 
+	aliases {
+		spi0 = &spi0;
+	};
+
 	ocp@f1000000 {
 		pinctrl: pin-controller@10000 {
 			pmx_led_bluetooth: pmx-led-bluetooth {

arch/arm/mach-kirkwood/include/mach/config.h

@@ -26,6 +26,12 @@
 #define CONFIG_KIRKWOOD_EGIGA_INIT	/* Enable GbePort0/1 for kernel */
 #define CONFIG_KIRKWOOD_RGMII_PAD_1V8	/* Set RGMII Pad voltage to 1.8V */
 #define CONFIG_KIRKWOOD_PCIE_INIT       /* Enable PCIE Port0 for kernel */
+/*
+ * Disable the dcache. Currently the network driver (mvgbe.c) and USB
+ * EHCI driver (ehci-marvell.c) and possibly others rely on the data
+ * cache being disabled.
+ */
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * By default kwbimage.cfg from board specific folder is used

configs/clearfog_gt_8k_defconfig

@@ -35,6 +35,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_MAC_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-8040-clearfog-gt-8k"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_AHCI_MVEBU=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
@@ -48,8 +49,9 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHYLIB=y
+CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
+CONFIG_MVPP2=y
 CONFIG_NVME=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y

configs/db-88f6820-amc_defconfig

@@ -3,6 +3,7 @@ CONFIG_ARCH_MVEBU=y
 CONFIG_SYS_TEXT_BASE=0x00800000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DB_88F6820_AMC=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
@@ -52,6 +53,7 @@ CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_NAND=y
 CONFIG_NAND_PXA3XX=y
 CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHY_MARVELL=y

drivers/ddr/marvell/a38x/ddr3_training_db.c

@@ -420,13 +420,13 @@ unsigned int mv_ddr_speed_bin_timing_get(enum mv_ddr_speed_bin index, enum mv_dd
 		result = speed_bin_table_t_rcd_t_rp[index];
 		break;
 	case SPEED_BIN_TRAS:
-		if (index < SPEED_BIN_DDR_1066G)
+		if (index <= SPEED_BIN_DDR_1066G)
 			result = 37500;
-		else if (index < SPEED_BIN_DDR_1333J)
+		else if (index <= SPEED_BIN_DDR_1333J)
 			result = 36000;
-		else if (index < SPEED_BIN_DDR_1600K)
+		else if (index <= SPEED_BIN_DDR_1600K)
 			result = 35000;
-		else if (index < SPEED_BIN_DDR_1866M)
+		else if (index <= SPEED_BIN_DDR_1866M)
 			result = 34000;
 		else
 			result = 33000;

drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c

@@ -50,6 +50,7 @@ int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id)
 	int max_phase = MIN_VALUE, current_phase;
 	enum hws_access_type access_type = ACCESS_TYPE_UNICAST;
 	u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE);
+	unsigned int max_cs = mv_ddr_cs_num_get();
 
 	CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id,
 				       DUNIT_ODT_CTRL_REG,
@@ -59,7 +60,7 @@ int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id)
 				      data_read, MASK_ALL_BITS));
 	val = data_read[if_id];
 
-	for (cs_num = 0; cs_num < MAX_CS_NUM; cs_num++) {
+	for (cs_num = 0; cs_num < max_cs; cs_num++) {
 		read_sample[cs_num] = GET_RD_SAMPLE_DELAY(val, cs_num);
 
 		/* find maximum of read_samples */

drivers/pci/pci_mvebu.c

@@ -369,6 +369,12 @@ static int mvebu_get_tgt_attr(ofnode node, int devfn,
 	if (!range)
 		return -EINVAL;
 
+	/*
+	 * Linux uses of_n_addr_cells() to get the number of address cells
+	 * here. Currently this function is only available in U-Boot when
+	 * CONFIG_OF_LIVE is enabled. Until this is enabled for MVEBU in
+	 * general, lets't hardcode the "pna" value in the U-Boot code.
+	 */
 	pna = 2; /* hardcoded for now because of lack of of_n_addr_cells() */
 	rangesz = pna + na + ns;
 	nranges = rlen / sizeof(__be32) / rangesz;