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https://github.com/AsahiLinux/u-boot
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board: ti: AM43xx: added USB initializtion code
Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in am43xx board file that can be invoked by various gadget drivers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
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2 changed files with 117 additions and 0 deletions
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@ -61,6 +61,15 @@
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/* RTC base address */
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/* RTC base address */
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#define RTC_BASE 0x44E3E000
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#define RTC_BASE 0x44E3E000
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/* USB OTG */
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#define USB_OTG_SS1_BASE 0x48390000
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#define USB_OTG_SS1_GLUE_BASE 0x48380000
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#define USB2_PHY1_POWER 0x44E10620
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#define USB_OTG_SS2_BASE 0x483D0000
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#define USB_OTG_SS2_GLUE_BASE 0x483C0000
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#define USB2_PHY2_POWER 0x44E10628
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/* USB Clock Control */
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/* USB Clock Control */
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#define PRM_PER_USB_OTG_SS0_CLKCTRL (CM_PER + 0x260)
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#define PRM_PER_USB_OTG_SS0_CLKCTRL (CM_PER + 0x260)
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#define PRM_PER_USB_OTG_SS1_CLKCTRL (CM_PER + 0x268)
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#define PRM_PER_USB_OTG_SS1_CLKCTRL (CM_PER + 0x268)
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@ -12,6 +12,7 @@
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#include <i2c.h>
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#include <i2c.h>
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#include <asm/errno.h>
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#include <asm/errno.h>
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#include <spl.h>
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#include <spl.h>
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#include <usb.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/mux.h>
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@ -24,6 +25,10 @@
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#include <power/tps62362.h>
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#include <power/tps62362.h>
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#include <miiphy.h>
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#include <miiphy.h>
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#include <cpsw.h>
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#include <cpsw.h>
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#include <linux/usb/gadget.h>
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#include <dwc3-uboot.h>
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#include <dwc3-omap-uboot.h>
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#include <ti-usb-phy-uboot.h>
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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@ -636,6 +641,109 @@ int board_late_init(void)
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}
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}
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#endif
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#endif
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#ifdef CONFIG_USB_DWC3
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static struct dwc3_device usb_otg_ss1 = {
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.maximum_speed = USB_SPEED_HIGH,
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.base = USB_OTG_SS1_BASE,
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.tx_fifo_resize = false,
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.index = 0,
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};
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static struct dwc3_omap_device usb_otg_ss1_glue = {
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.base = (void *)USB_OTG_SS1_GLUE_BASE,
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.utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
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.vbus_id_status = OMAP_DWC3_VBUS_VALID,
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.index = 0,
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};
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static struct ti_usb_phy_device usb_phy1_device = {
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.usb2_phy_power = (void *)USB2_PHY1_POWER,
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.index = 0,
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};
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static struct dwc3_device usb_otg_ss2 = {
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.maximum_speed = USB_SPEED_HIGH,
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.base = USB_OTG_SS2_BASE,
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.tx_fifo_resize = false,
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.index = 1,
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};
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static struct dwc3_omap_device usb_otg_ss2_glue = {
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.base = (void *)USB_OTG_SS2_GLUE_BASE,
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.utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
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.vbus_id_status = OMAP_DWC3_VBUS_VALID,
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.index = 1,
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};
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static struct ti_usb_phy_device usb_phy2_device = {
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.usb2_phy_power = (void *)USB2_PHY2_POWER,
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.index = 1,
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};
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int board_usb_init(int index, enum usb_init_type init)
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{
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switch (index) {
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case 0:
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if (init == USB_INIT_DEVICE) {
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usb_otg_ss1.dr_mode = USB_DR_MODE_PERIPHERAL;
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usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
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} else {
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usb_otg_ss1.dr_mode = USB_DR_MODE_HOST;
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usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
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}
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dwc3_omap_uboot_init(&usb_otg_ss1_glue);
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ti_usb_phy_uboot_init(&usb_phy1_device);
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dwc3_uboot_init(&usb_otg_ss1);
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break;
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case 1:
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if (init == USB_INIT_DEVICE) {
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usb_otg_ss2.dr_mode = USB_DR_MODE_PERIPHERAL;
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usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
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} else {
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usb_otg_ss2.dr_mode = USB_DR_MODE_HOST;
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usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
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}
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ti_usb_phy_uboot_init(&usb_phy2_device);
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dwc3_omap_uboot_init(&usb_otg_ss2_glue);
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dwc3_uboot_init(&usb_otg_ss2);
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break;
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default:
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printf("Invalid Controller Index\n");
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}
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return 0;
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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switch (index) {
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case 0:
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case 1:
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ti_usb_phy_uboot_exit(index);
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dwc3_uboot_exit(index);
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dwc3_omap_uboot_exit(index);
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break;
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default:
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printf("Invalid Controller Index\n");
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}
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return 0;
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}
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int usb_gadget_handle_interrupts(void)
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{
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u32 status;
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status = dwc3_omap_uboot_interrupt_status(0);
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if (status)
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dwc3_uboot_handle_interrupt(0);
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return 0;
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}
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#endif
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#ifdef CONFIG_DRIVER_TI_CPSW
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#ifdef CONFIG_DRIVER_TI_CPSW
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static void cpsw_control(int enabled)
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static void cpsw_control(int enabled)
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