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arm64: mvebu: gpio: Add GPIO nodes to A8K family devices
Add GPIO nodes to AP-806 and CP-110-master DTSI files. Change-Id: I05958698d460cb721b7d8683d34f74a5ea32532c Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
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5 changed files with 46 additions and 0 deletions
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@ -45,6 +45,7 @@
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* one CP110.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include "armada-ap806-quad.dtsi"
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#include "armada-cp110-master.dtsi"
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@ -45,6 +45,7 @@
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* two CP110.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include "armada-ap806-quad.dtsi"
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#include "armada-cp110-master.dtsi"
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#include "armada-cp110-slave.dtsi"
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@ -158,6 +158,14 @@
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};
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};
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ap_gpio0: gpio@6F5040 {
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compatible = "marvell,orion-gpio";
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reg = <0x6F5040 0x40>;
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ngpios = <20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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xor@400000 {
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compatible = "marvell,mv-xor-v2";
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reg = <0x400000 0x1000>,
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@ -113,6 +113,24 @@
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};
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};
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cpm_gpio0: gpio@440100 {
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compatible = "marvell,orion-gpio";
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reg = <0x440100 0x40>;
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ngpios = <32>;
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gpiobase = <20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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cpm_gpio1: gpio@440140 {
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compatible = "marvell,orion-gpio";
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reg = <0x440140 0x40>;
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ngpios = <31>;
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gpiobase = <52>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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cpm_sata0: sata@540000 {
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compatible = "marvell,armada-8k-ahci";
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reg = <0x540000 0x30000>;
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@ -100,6 +100,24 @@
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};
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};
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cps_gpio0: gpio@440100 {
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compatible = "marvell,orion-gpio";
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reg = <0x440100 0x40>;
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ngpios = <32>;
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gpiobase = <20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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cps_gpio1: gpio@440140 {
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compatible = "marvell,orion-gpio";
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reg = <0x440140 0x40>;
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ngpios = <31>;
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gpiobase = <52>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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cps_sata0: sata@540000 {
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compatible = "marvell,armada-8k-ahci";
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reg = <0x540000 0x30000>;
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