mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-24 13:43:28 +00:00
arm64: dts: imx8mp: Update i.MX8MP DHCOM SoM DT to production rev.200
The current imx8mp-dhcom-som.dtsi describes prototype rev.100 SoM, update the DT to describe production rev.200 SoM which brings the following changes: - Fast SoC GPIOs exposed on the SoM edge connector - Slow GPIOs like component resets moved to I2C GPIO expander - ADC upgraded from TLA2024 to ADS1015 with conversion interrupt - EEPROM size increased from 256 B to 4 kiB Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Marek Vasut
Stefano Babic
parent
ad1158c50e
commit
9de599ec3d
3 changed files with 152 additions and 49 deletions
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@ -25,9 +25,7 @@
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reg_eth_vio: regulator-eth-vio {
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compatible = "regulator-fixed";
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gpio = <&gpio2 10 GPIO_ACTIVE_LOW>;
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pinctrl-0 = <&pinctrl_enet_vio>;
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pinctrl-names = "default";
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gpio = <&ioexp 2 GPIO_ACTIVE_LOW>;
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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@ -49,6 +47,14 @@
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startup-delay-us = <100>;
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vin-supply = <&buck4>;
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};
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reg_vdd_3p3v_awo: regulator-vdd-3p3v-awo { /* VDD_3V3_AWO */
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compatible = "regulator-fixed";
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "VDD_3P3V_AWO";
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};
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};
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&A53_0 {
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@ -104,7 +110,7 @@
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reg = <0>;
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reset-assert-us = <1000>;
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reset-deassert-us = <1000>;
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reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
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reset-gpios = <&ioexp 4 GPIO_ACTIVE_LOW>;
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/* Non-default PHY population option. */
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status = "disabled";
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};
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@ -120,7 +126,7 @@
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reg = <5>;
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reset-assert-us = <1000>;
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reset-deassert-us = <1000>;
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reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
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reset-gpios = <&ioexp 4 GPIO_ACTIVE_LOW>;
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/* Default PHY population option. */
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status = "okay";
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};
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@ -320,8 +326,9 @@
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};
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adc@48 {
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compatible = "ti,tla2024";
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compatible = "ti,ads1015";
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reg = <0x48>;
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interrupts-extended = <&ioexp 7 IRQ_TYPE_EDGE_FALLING>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -368,24 +375,40 @@
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};
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eeprom0: eeprom@50 { /* EEPROM with EQoS MAC address */
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compatible = "atmel,24c02";
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pagesize = <16>;
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compatible = "atmel,24c32"; /* M24C32-D */
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pagesize = <32>;
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reg = <0x50>;
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};
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rv3032: rtc@51 {
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compatible = "microcrystal,rv3032";
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reg = <0x51>;
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interrupts-extended = <&gpio5 5 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rtc>;
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interrupts-extended = <&ioexp 3 IRQ_TYPE_EDGE_FALLING>;
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};
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eeprom1: eeprom@53 { /* EEPROM with FEC MAC address */
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compatible = "atmel,24c02";
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pagesize = <16>;
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compatible = "atmel,24c32"; /* M24C32-D */
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pagesize = <32>;
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reg = <0x53>;
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};
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ioexp: gpio@74 {
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compatible = "nxp,pca9539";
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reg = <0x74>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ioexp>;
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gpio-line-names =
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"BT_REG_EN", "WL_REG_EN", "VIO_SWITCHED_#EN", "RTC_#INT",
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"ENET_QOS_#RST", "RGB_OSZ_ENABLE", "USB1_ID", "ADC_ALTER_RDY",
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"DHCOM-W", "DHCOM-V", "DHCOM-U", "DHCOM-T",
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"BT_HOST_WAKE", "BT_DEV_WAKE", "", "";
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};
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};
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&i2c4 {
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@ -427,6 +450,23 @@
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pinctrl-0 = <&pinctrl_uart2>;
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uart-has-rtscts;
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status = "okay";
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/*
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* PLL1 at 80 MHz supplies UART2 root with 80 MHz clock,
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* which with 16x oversampling yields 5 Mbdps baud base,
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* which can be well divided by 5/4 to achieve 4 Mbdps,
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* which is exactly the maximum rate supported by muRata
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* 2AE bluetooth UART.
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*/
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assigned-clocks = <&clk IMX8MP_CLK_UART2>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
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assigned-clock-rates = <80000000>;
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bluetooth {
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compatible = "cypress,cyw4373a0-bt";
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shutdown-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>;
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max-speed = <4000000>;
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};
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};
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&uart3 {
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@ -451,8 +491,6 @@
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};
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&usb_dwc3_0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb0_vbus>;
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dr_mode = "otg";
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status = "okay";
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};
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@ -496,7 +534,7 @@
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* connected to the SoC, but can be connected on to
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* SoC pin on the carrier board.
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*/
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reset-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
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reset-gpios = <&ioexp 1 GPIO_ACTIVE_LOW>;
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};
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};
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@ -538,8 +576,9 @@
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&pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
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&pinctrl_dhcom_g &pinctrl_dhcom_h &pinctrl_dhcom_i
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&pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
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/* GPIO_M is connected to CLKOUT2 */
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&pinctrl_dhcom_int>;
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&pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
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&pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
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&pinctrl_dhcom_s &pinctrl_dhcom_int>;
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pinctrl-names = "default";
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pinctrl_dhcom_a: dhcom-a-grp {
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@ -626,6 +665,55 @@
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>;
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};
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pinctrl_dhcom_m: dhcom-m-grp {
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fsl,pins = <
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/* CSIx_MCLK */
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MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05 0x2
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>;
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};
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pinctrl_dhcom_n: dhcom-n-grp {
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fsl,pins = <
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/* CSI2_D3- */
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MX8MP_IOMUXC_SD1_DATA7__GPIO2_IO09 0x2
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>;
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};
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pinctrl_dhcom_o: dhcom-o-grp {
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fsl,pins = <
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/* CSI2_D3+ */
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MX8MP_IOMUXC_SD1_DATA6__GPIO2_IO08 0x2
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>;
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};
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pinctrl_dhcom_p: dhcom-p-grp {
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fsl,pins = <
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/* CSI2_D2- */
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MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10 0x2
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>;
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};
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pinctrl_dhcom_q: dhcom-q-grp {
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fsl,pins = <
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/* CSI2_D2+ */
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MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x2
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>;
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};
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pinctrl_dhcom_r: dhcom-r-grp {
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fsl,pins = <
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/* CSI2_D1- */
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MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x2
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>;
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};
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pinctrl_dhcom_s: dhcom-s-grp {
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fsl,pins = <
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/* CSI2_D1+ */
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MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x2
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>;
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};
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pinctrl_dhcom_int: dhcom-int-grp {
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fsl,pins = <
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/* INT_HIGHEST_PRIO */
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@ -699,17 +787,9 @@
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>;
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};
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pinctrl_enet_vio: dhcom-enet-vio-grp {
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fsl,pins = <
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MX8MP_IOMUXC_SD1_RESET_B__GPIO2_IO10 0x22
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>;
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};
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pinctrl_ethphy0: dhcom-ethphy0-grp {
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fsl,pins = <
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/* ENET1_#RST Reset */
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MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20 0x22
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/* ENET1_#INT Interrupt */
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/* ENET_QOS_#INT Interrupt */
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MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19 0x22
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>;
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};
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@ -834,6 +914,13 @@
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>;
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};
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pinctrl_ioexp: dhcom-ioexp-grp {
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fsl,pins = <
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/* #GPIO_EXP_INT */
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MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20 0x22
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>;
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};
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pinctrl_pmic: dhcom-pmic-grp {
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fsl,pins = <
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/* PMIC_nINT */
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@ -847,10 +934,21 @@
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>;
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};
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pinctrl_rtc: dhcom-rtc-grp {
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pinctrl_tc9595: dhcom-tc9595-grp {
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fsl,pins = <
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/* RTC_#INT Interrupt */
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MX8MP_IOMUXC_SPDIF_EXT_CLK__GPIO5_IO05 0x40000080
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/* RESET_DSIBRIDGE */
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MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x40000146
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/* DSI-CONV_INT Interrupt */
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MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x141
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>;
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};
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pinctrl_sai3: dhcom-sai3-grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6
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MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6
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MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6
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MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6
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>;
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};
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@ -897,12 +995,6 @@
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>;
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};
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pinctrl_usb0_vbus: dhcom-usb0-grp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID 0x0
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>;
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};
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pinctrl_usb1_vbus: dhcom-usb1-grp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO14__USB2_OTG_PWR 0x6
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@ -918,10 +1010,6 @@
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MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
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MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
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MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
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/* BT_REG_EN */
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MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x144
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/* WL_REG_EN */
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MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x144
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>;
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};
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@ -933,10 +1021,6 @@
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MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d4
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MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d4
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MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d4
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/* BT_REG_EN */
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MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x144
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/* WL_REG_EN */
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MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x144
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>;
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};
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@ -948,10 +1032,6 @@
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MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d6
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MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d6
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MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d6
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/* BT_REG_EN */
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MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x144
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/* WL_REG_EN */
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MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x144
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>;
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};
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@ -167,6 +167,26 @@
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filename = "imx8mp-dhcom-pdk-overlay-eth2xfast.dtbo";
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};
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};
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fdt-dto-imx8mp-dhcom-som-overlay-rev100 {
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description = "imx8mp-dhcom-som-overlay-rev100";
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type = "flat_dt";
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compression = "none";
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blob-ext {
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filename = "imx8mp-dhcom-som-overlay-rev100.dtbo";
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};
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};
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fdt-dto-imx8mp-dhcom-pdk-overlay-rev100 {
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description = "imx8mp-dhcom-pdk-overlay-rev100";
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type = "flat_dt";
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compression = "none";
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blob-ext {
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filename = "imx8mp-dhcom-pdk-overlay-rev100.dtbo";
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};
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};
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};
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configurations {
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@ -176,7 +196,9 @@
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fdt = "fdt-1",
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"fdt-dto-imx8mp-dhcom-som-overlay-eth1xfast",
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"fdt-dto-imx8mp-dhcom-som-overlay-eth2xfast",
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"fdt-dto-imx8mp-dhcom-pdk-overlay-eth2xfast";
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"fdt-dto-imx8mp-dhcom-pdk-overlay-eth2xfast",
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"fdt-dto-imx8mp-dhcom-som-overlay-rev100",
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"fdt-dto-imx8mp-dhcom-pdk-overlay-rev100";
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};
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};
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};
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@ -262,3 +262,4 @@ CONFIG_USB_FUNCTION_ACM=y
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CONFIG_USB_ETHER=y
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CONFIG_USB_ETH_CDC=y
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CONFIG_IMX_WATCHDOG=y
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CONFIG_DM_PCA953X=y
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