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dm: pci: Add a function to write a BAR
Add a driver-model version of the pci_write_bar32 function so that this is supported in the new API. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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2 changed files with 23 additions and 2 deletions
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@ -1053,6 +1053,14 @@ u32 dm_pci_read_bar32(struct udevice *dev, int barnum)
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return addr & PCI_BASE_ADDRESS_MEM_MASK;
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}
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void dm_pci_write_bar32(struct udevice *dev, int barnum, u32 addr)
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{
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int bar;
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bar = PCI_BASE_ADDRESS_0 + barnum * 4;
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dm_pci_write_config32(dev, bar, addr);
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}
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static int _dm_pci_bus_to_phys(struct udevice *ctlr,
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pci_addr_t bus_addr, unsigned long flags,
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unsigned long skip_mask, phys_addr_t *pa)
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@ -757,7 +757,9 @@ extern void pci_mpc85xx_init (struct pci_controller *hose);
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/**
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* pci_write_bar32() - Write the address of a BAR including control bits
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*
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* This writes a raw address (with control bits) to a bar
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* This writes a raw address (with control bits) to a bar. This can be used
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* with devices which require hard-coded addresses, not part of the normal
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* PCI enumeration process.
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*
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* @hose: PCI hose to use
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* @dev: PCI device to update
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@ -765,7 +767,7 @@ extern void pci_mpc85xx_init (struct pci_controller *hose);
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* @addr: BAR address with control bits
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*/
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void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum,
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u32 addr_and_ctrl);
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u32 addr);
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/**
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* pci_read_bar32() - read the address of a bar
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@ -1166,6 +1168,17 @@ struct udevice *pci_get_controller(struct udevice *dev);
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int pci_get_regions(struct udevice *dev, struct pci_region **iop,
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struct pci_region **memp, struct pci_region **prefp);
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/**
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* dm_pci_write_bar32() - Write the address of a BAR
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*
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* This writes a raw address to a bar
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*
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* @dev: PCI device to update
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* @barnum: BAR number (0-5)
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* @addr: BAR address
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*/
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void dm_pci_write_bar32(struct udevice *dev, int barnum, u32 addr);
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/**
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* dm_pci_read_bar32() - read a base address register from a device
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*
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