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OMAP3: Fix CKE1 MUX setting to allow self-refresh
The Beagle rev Cx and Overo boards are using both SDRC CSes. The MUX setting is needed for the second CS clock signal to allow the 2 RAM parts to be put in self-refresh correctly. This also works on rev B Beagle boards with 128M of RAM. From: Steve Sakoman <steve@sakoman.com> From: Jean Pihet <jpihet@mvista.com> Signed-off-by: Jean Pihet <jpihet@mvista.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
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2 changed files with 2 additions and 2 deletions
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@ -371,7 +371,7 @@ const omap3_sysinfo sysinfo = {
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MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\
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MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\
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MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\
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MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1*/
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MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/
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#define MUX_BEAGLE_C() \
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MUX_VAL(CP(MCBSP3_DX), (IEN | PTD | DIS | M4)) /*GPIO_140*/\
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@ -376,6 +376,6 @@ const omap3_sysinfo sysinfo = {
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MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/\
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MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/\
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MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)) /*sdrc_cke0*/\
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MUX_VAL(CP(SDRC_CKE1), (IDIS | PTD | DIS | M7)) /*sdrc_cke1*/
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MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /*sdrc_cke1*/
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#endif
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