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imx7: SPI: add suport for SPI flash in mikroBUS slot

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Enable the escpi3 nets attached to the mikroBUS slot
on the i.MX7 Sabre evalution board. Also enble the SPI flash
commands to work with the "flash click" board.

This is V2 of this patch with changes recommended by the maintainer

CC: Jagan Teki <jteki@openedev.com>
This commit is contained in:
Angus Ainslie 2016-11-11 11:31:39 -07:00 committed by Stefano Babic
parent 0405092bd2
commit 9cd37b02a0
3 changed files with 30 additions and 0 deletions
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24
board/freescale/mx7dsabresd/mx7dsabresd.c
View file

@ -50,6 +50,9 @@ DECLARE_GLOBAL_DATA_PTR;
#define NAND_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
#define SPI_PAD_CTRL \
(PAD_CTL_HYS | PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_FAST)
#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM)
#ifdef CONFIG_SYS_I2C_MXC
#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
@ -68,6 +71,23 @@ static struct i2c_pads_info i2c_pad_info1 = {
};
#endif
static iomux_v3_cfg_t const ecspi3_pads[] = {
MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
int board_spi_cs_gpio(unsigned bus, unsigned cs)
{
return (bus == 2 && cs == 0) ? (IMX_GPIO_NR(6, 22)) : -1;
}
static void setup_spi(void)
{
imx_iomux_v3_setup_multiple_pads(ecspi3_pads, ARRAY_SIZE(ecspi3_pads));
}
int dram_init(void)
{
gd->ram_size = PHYS_SDRAM_SIZE;
@ -553,6 +573,10 @@ int board_init(void)
board_qspi_init();
#endif
#ifdef CONFIG_MXC_SPI
setup_spi();
#endif
return 0;
}

3
configs/mx7dsabresd_secure_defconfig
View file

@ -45,3 +45,6 @@ CONFIG_G_DNL_MANUFACTURER="FSL"
CONFIG_G_DNL_VENDOR_NUM=0x0525
CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
CONFIG_OF_LIBFDT=y
CONFIG_SPI_FLASH=y
CONFIG_CMD_SF=y
CONFIG_SPI_FLASH_EON=y

3
include/configs/mx7dsabresd.h
View file

@ -201,6 +201,9 @@
#define CONFIG_ENV_SIZE SZ_8K
#define CONFIG_ENV_IS_IN_MMC
/* MXC SPI driver support */
#define CONFIG_MXC_SPI
/*
* If want to use nand, define CONFIG_NAND_MXS and rework board
* to support nand, since emmc has pin conflicts with nand