mpc83xx: Migrate LBLAW_* to Kconfig

The LBLAW_* values determine the window configuration of the memory
controller. Hence, they must be known at compile time, and cannot be
implemented in the DT mechanism.

Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
This commit is contained in:
Mario Six 2019-01-21 09:17:58 +01:00
parent 30915ab95d
commit 9c5df7a2a9
85 changed files with 1125 additions and 316 deletions

View file

@ -284,6 +284,7 @@ config ARCH_MPC837X
source "arch/powerpc/cpu/mpc83xx/hrcw/Kconfig" source "arch/powerpc/cpu/mpc83xx/hrcw/Kconfig"
source "arch/powerpc/cpu/mpc83xx/bats/Kconfig" source "arch/powerpc/cpu/mpc83xx/bats/Kconfig"
source "arch/powerpc/cpu/mpc83xx/lblaw/Kconfig"
menu "Legacy options" menu "Legacy options"

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@ -12,6 +12,8 @@
#include <usb/ehci-ci.h> #include <usb/ehci-ci.h>
#endif #endif
#include "lblaw/lblaw.h"
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_QE #ifdef CONFIG_QE

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@ -0,0 +1,519 @@
menu "LBLAW setup"
choice
prompt "NAND LAWBAR for NAND SPL"
config NAND_LBLAWBAR_PRELIM_NONE
bool "None"
config NAND_LBLAWBAR_PRELIM_0
bool "0"
depends on LBLAW0
config NAND_LBLAWBAR_PRELIM_1
bool "1"
depends on LBLAW1
config NAND_LBLAWBAR_PRELIM_2
bool "2"
depends on LBLAW2
config NAND_LBLAWBAR_PRELIM_3
bool "3"
depends on LBLAW3
endchoice
menuconfig LBLAW0
bool "LBLAW0"
if LBLAW0
config LBLAW0_ENABLE
bool "Window enable"
default "y"
if !LBLAW0_ENABLE
config LBLAW0_BASE
hex
default 0x0
endif
if LBLAW0_ENABLE
config LBLAW0_NAME
string "Identifier"
config LBLAW0_BASE
hex "Window base"
choice
prompt "Window size"
config LBLAW0_LENGTH_4_KBYTES
bool "4 kb"
config LBLAW0_LENGTH_8_KBYTES
bool "8 kb"
config LBLAW0_LENGTH_16_KBYTES
bool "16 kb"
config LBLAW0_LENGTH_32_KBYTES
bool "32 kb"
config LBLAW0_LENGTH_64_KBYTES
bool "64 kb"
config LBLAW0_LENGTH_128_KBYTES
bool "128 kb"
config LBLAW0_LENGTH_256_KBYTES
bool "256 kb"
config LBLAW0_LENGTH_512_KBYTES
bool "512 kb"
config LBLAW0_LENGTH_1_MBYTES
bool "1 mb"
config LBLAW0_LENGTH_2_MBYTES
bool "2 mb"
config LBLAW0_LENGTH_4_MBYTES
bool "4 mb"
config LBLAW0_LENGTH_8_MBYTES
bool "8 mb"
config LBLAW0_LENGTH_16_MBYTES
bool "16 mb"
config LBLAW0_LENGTH_32_MBYTES
bool "32 mb"
config LBLAW0_LENGTH_64_MBYTES
bool "64 mb"
config LBLAW0_LENGTH_128_MBYTES
bool "128 mb"
config LBLAW0_LENGTH_256_MBYTES
bool "256 mb"
config LBLAW0_LENGTH_512_MBYTES
bool "512 mb"
config LBLAW0_LENGTH_1_GBYTES
bool "1 gb"
config LBLAW0_LENGTH_2_GBYTES
bool "2 gb"
endchoice
endif # LBLAW0_ENABLE
endif # LBLAW0
config LBLAW0_ENABLE_BIT
hex
default 0x0 if !LBLAW0_ENABLE
default 0x80000000 if LBLAW0_ENABLE
config LBLAW0_LENGTH
hex
default 0x0 if !LBLAW0_ENABLE
default 0x0000000B if LBLAW0_LENGTH_4_KBYTES
default 0x0000000C if LBLAW0_LENGTH_8_KBYTES
default 0x0000000D if LBLAW0_LENGTH_16_KBYTES
default 0x0000000E if LBLAW0_LENGTH_32_KBYTES
default 0x0000000F if LBLAW0_LENGTH_64_KBYTES
default 0x00000010 if LBLAW0_LENGTH_128_KBYTES
default 0x00000011 if LBLAW0_LENGTH_256_KBYTES
default 0x00000012 if LBLAW0_LENGTH_512_KBYTES
default 0x00000013 if LBLAW0_LENGTH_1_MBYTES
default 0x00000014 if LBLAW0_LENGTH_2_MBYTES
default 0x00000015 if LBLAW0_LENGTH_4_MBYTES
default 0x00000016 if LBLAW0_LENGTH_8_MBYTES
default 0x00000017 if LBLAW0_LENGTH_16_MBYTES
default 0x00000018 if LBLAW0_LENGTH_32_MBYTES
default 0x00000019 if LBLAW0_LENGTH_64_MBYTES
default 0x0000001A if LBLAW0_LENGTH_128_MBYTES
default 0x0000001B if LBLAW0_LENGTH_256_MBYTES
default 0x0000001C if LBLAW0_LENGTH_512_MBYTES
default 0x0000001D if LBLAW0_LENGTH_1_GBYTES
default 0x0000001E if LBLAW0_LENGTH_2_GBYTES
menuconfig LBLAW1
bool "LBLAW1"
if LBLAW1
config LBLAW1_ENABLE
bool "Window enable"
default "y"
if !LBLAW1_ENABLE
config LBLAW1_BASE
hex
default 0x0
endif
if LBLAW1_ENABLE
config LBLAW1_NAME
string "Identifier"
config LBLAW1_BASE
hex "Window base"
choice
prompt "Window size"
config LBLAW1_LENGTH_4_KBYTES
bool "4 kb"
config LBLAW1_LENGTH_8_KBYTES
bool "8 kb"
config LBLAW1_LENGTH_16_KBYTES
bool "16 kb"
config LBLAW1_LENGTH_32_KBYTES
bool "32 kb"
config LBLAW1_LENGTH_64_KBYTES
bool "64 kb"
config LBLAW1_LENGTH_128_KBYTES
bool "128 kb"
config LBLAW1_LENGTH_256_KBYTES
bool "256 kb"
config LBLAW1_LENGTH_512_KBYTES
bool "512 kb"
config LBLAW1_LENGTH_1_MBYTES
bool "1 mb"
config LBLAW1_LENGTH_2_MBYTES
bool "2 mb"
config LBLAW1_LENGTH_4_MBYTES
bool "4 mb"
config LBLAW1_LENGTH_8_MBYTES
bool "8 mb"
config LBLAW1_LENGTH_16_MBYTES
bool "16 mb"
config LBLAW1_LENGTH_32_MBYTES
bool "32 mb"
config LBLAW1_LENGTH_64_MBYTES
bool "64 mb"
config LBLAW1_LENGTH_128_MBYTES
bool "128 mb"
config LBLAW1_LENGTH_256_MBYTES
bool "256 mb"
config LBLAW1_LENGTH_512_MBYTES
bool "512 mb"
config LBLAW1_LENGTH_1_GBYTES
bool "1 gb"
config LBLAW1_LENGTH_2_GBYTES
bool "2 gb"
endchoice
endif # LBLAW1_ENABLE
endif # LBLAW1
config LBLAW1_ENABLE_BIT
hex
default 0x0 if !LBLAW1_ENABLE
default 0x80000000 if LBLAW1_ENABLE
config LBLAW1_LENGTH
hex
default 0x0 if !LBLAW1_ENABLE
default 0x0000000B if LBLAW1_LENGTH_4_KBYTES
default 0x0000000C if LBLAW1_LENGTH_8_KBYTES
default 0x0000000D if LBLAW1_LENGTH_16_KBYTES
default 0x0000000E if LBLAW1_LENGTH_32_KBYTES
default 0x0000000F if LBLAW1_LENGTH_64_KBYTES
default 0x00000010 if LBLAW1_LENGTH_128_KBYTES
default 0x00000011 if LBLAW1_LENGTH_256_KBYTES
default 0x00000012 if LBLAW1_LENGTH_512_KBYTES
default 0x00000013 if LBLAW1_LENGTH_1_MBYTES
default 0x00000014 if LBLAW1_LENGTH_2_MBYTES
default 0x00000015 if LBLAW1_LENGTH_4_MBYTES
default 0x00000016 if LBLAW1_LENGTH_8_MBYTES
default 0x00000017 if LBLAW1_LENGTH_16_MBYTES
default 0x00000018 if LBLAW1_LENGTH_32_MBYTES
default 0x00000019 if LBLAW1_LENGTH_64_MBYTES
default 0x0000001A if LBLAW1_LENGTH_128_MBYTES
default 0x0000001B if LBLAW1_LENGTH_256_MBYTES
default 0x0000001C if LBLAW1_LENGTH_512_MBYTES
default 0x0000001D if LBLAW1_LENGTH_1_GBYTES
default 0x0000001E if LBLAW1_LENGTH_2_GBYTES
menuconfig LBLAW2
bool "LBLAW2"
if LBLAW2
config LBLAW2_ENABLE
bool "Window enable"
default "y"
if !LBLAW2_ENABLE
config LBLAW2_BASE
hex
default 0x0
endif
if LBLAW2_ENABLE
config LBLAW2_NAME
string "Identifier"
config LBLAW2_BASE
hex "Window base"
choice
prompt "Window size"
config LBLAW2_LENGTH_4_KBYTES
bool "4 kb"
config LBLAW2_LENGTH_8_KBYTES
bool "8 kb"
config LBLAW2_LENGTH_16_KBYTES
bool "16 kb"
config LBLAW2_LENGTH_32_KBYTES
bool "32 kb"
config LBLAW2_LENGTH_64_KBYTES
bool "64 kb"
config LBLAW2_LENGTH_128_KBYTES
bool "128 kb"
config LBLAW2_LENGTH_256_KBYTES
bool "256 kb"
config LBLAW2_LENGTH_512_KBYTES
bool "512 kb"
config LBLAW2_LENGTH_1_MBYTES
bool "1 mb"
config LBLAW2_LENGTH_2_MBYTES
bool "2 mb"
config LBLAW2_LENGTH_4_MBYTES
bool "4 mb"
config LBLAW2_LENGTH_8_MBYTES
bool "8 mb"
config LBLAW2_LENGTH_16_MBYTES
bool "16 mb"
config LBLAW2_LENGTH_32_MBYTES
bool "32 mb"
config LBLAW2_LENGTH_64_MBYTES
bool "64 mb"
config LBLAW2_LENGTH_128_MBYTES
bool "128 mb"
config LBLAW2_LENGTH_256_MBYTES
bool "256 mb"
config LBLAW2_LENGTH_512_MBYTES
bool "512 mb"
config LBLAW2_LENGTH_1_GBYTES
bool "1 gb"
config LBLAW2_LENGTH_2_GBYTES
bool "2 gb"
endchoice
endif # LBLAW2_ENABLE
endif # LBLAW2
config LBLAW2_ENABLE_BIT
hex
default 0x0 if !LBLAW2_ENABLE
default 0x80000000 if LBLAW2_ENABLE
config LBLAW2_LENGTH
hex
default 0x0 if !LBLAW2_ENABLE
default 0x0000000B if LBLAW2_LENGTH_4_KBYTES
default 0x0000000C if LBLAW2_LENGTH_8_KBYTES
default 0x0000000D if LBLAW2_LENGTH_16_KBYTES
default 0x0000000E if LBLAW2_LENGTH_32_KBYTES
default 0x0000000F if LBLAW2_LENGTH_64_KBYTES
default 0x00000010 if LBLAW2_LENGTH_128_KBYTES
default 0x00000011 if LBLAW2_LENGTH_256_KBYTES
default 0x00000012 if LBLAW2_LENGTH_512_KBYTES
default 0x00000013 if LBLAW2_LENGTH_1_MBYTES
default 0x00000014 if LBLAW2_LENGTH_2_MBYTES
default 0x00000015 if LBLAW2_LENGTH_4_MBYTES
default 0x00000016 if LBLAW2_LENGTH_8_MBYTES
default 0x00000017 if LBLAW2_LENGTH_16_MBYTES
default 0x00000018 if LBLAW2_LENGTH_32_MBYTES
default 0x00000019 if LBLAW2_LENGTH_64_MBYTES
default 0x0000001A if LBLAW2_LENGTH_128_MBYTES
default 0x0000001B if LBLAW2_LENGTH_256_MBYTES
default 0x0000001C if LBLAW2_LENGTH_512_MBYTES
default 0x0000001D if LBLAW2_LENGTH_1_GBYTES
default 0x0000001E if LBLAW2_LENGTH_2_GBYTES
menuconfig LBLAW3
bool "LBLAW3"
if LBLAW3
config LBLAW3_ENABLE
bool "Window enable"
default "y"
if !LBLAW3_ENABLE
config LBLAW3_BASE
hex
default 0x0
endif
if LBLAW3_ENABLE
config LBLAW3_NAME
string "Identifier"
config LBLAW3_BASE
hex "Window base"
choice
prompt "Window size"
config LBLAW3_LENGTH_4_KBYTES
bool "4 kb"
config LBLAW3_LENGTH_8_KBYTES
bool "8 kb"
config LBLAW3_LENGTH_16_KBYTES
bool "16 kb"
config LBLAW3_LENGTH_32_KBYTES
bool "32 kb"
config LBLAW3_LENGTH_64_KBYTES
bool "64 kb"
config LBLAW3_LENGTH_128_KBYTES
bool "128 kb"
config LBLAW3_LENGTH_256_KBYTES
bool "256 kb"
config LBLAW3_LENGTH_512_KBYTES
bool "512 kb"
config LBLAW3_LENGTH_1_MBYTES
bool "1 mb"
config LBLAW3_LENGTH_2_MBYTES
bool "2 mb"
config LBLAW3_LENGTH_4_MBYTES
bool "4 mb"
config LBLAW3_LENGTH_8_MBYTES
bool "8 mb"
config LBLAW3_LENGTH_16_MBYTES
bool "16 mb"
config LBLAW3_LENGTH_32_MBYTES
bool "32 mb"
config LBLAW3_LENGTH_64_MBYTES
bool "64 mb"
config LBLAW3_LENGTH_128_MBYTES
bool "128 mb"
config LBLAW3_LENGTH_256_MBYTES
bool "256 mb"
config LBLAW3_LENGTH_512_MBYTES
bool "512 mb"
config LBLAW3_LENGTH_1_GBYTES
bool "1 gb"
config LBLAW3_LENGTH_2_GBYTES
bool "2 gb"
endchoice
endif # LBLAW3_ENABLE
endif # LBLAW3
config LBLAW3_ENABLE_BIT
hex
default 0x0 if !LBLAW3_ENABLE
default 0x80000000 if LBLAW3_ENABLE
config LBLAW3_LENGTH
hex
default 0x0 if !LBLAW3_ENABLE
default 0x0000000B if LBLAW3_LENGTH_4_KBYTES
default 0x0000000C if LBLAW3_LENGTH_8_KBYTES
default 0x0000000D if LBLAW3_LENGTH_16_KBYTES
default 0x0000000E if LBLAW3_LENGTH_32_KBYTES
default 0x0000000F if LBLAW3_LENGTH_64_KBYTES
default 0x00000010 if LBLAW3_LENGTH_128_KBYTES
default 0x00000011 if LBLAW3_LENGTH_256_KBYTES
default 0x00000012 if LBLAW3_LENGTH_512_KBYTES
default 0x00000013 if LBLAW3_LENGTH_1_MBYTES
default 0x00000014 if LBLAW3_LENGTH_2_MBYTES
default 0x00000015 if LBLAW3_LENGTH_4_MBYTES
default 0x00000016 if LBLAW3_LENGTH_8_MBYTES
default 0x00000017 if LBLAW3_LENGTH_16_MBYTES
default 0x00000018 if LBLAW3_LENGTH_32_MBYTES
default 0x00000019 if LBLAW3_LENGTH_64_MBYTES
default 0x0000001A if LBLAW3_LENGTH_128_MBYTES
default 0x0000001B if LBLAW3_LENGTH_256_MBYTES
default 0x0000001C if LBLAW3_LENGTH_512_MBYTES
default 0x0000001D if LBLAW3_LENGTH_1_GBYTES
default 0x0000001E if LBLAW3_LENGTH_2_GBYTES
endmenu

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@ -0,0 +1,55 @@
#if defined(CONFIG_LBLAW0)
#define CONFIG_SYS_LBLAWBAR0_PRELIM \
CONFIG_LBLAW0_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (\
CONFIG_LBLAW0_ENABLE_BIT |\
CONFIG_LBLAW0_LENGTH \
)
#endif
#if defined(CONFIG_LBLAW1)
#define CONFIG_SYS_LBLAWBAR1_PRELIM \
CONFIG_LBLAW1_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (\
CONFIG_LBLAW1_ENABLE_BIT |\
CONFIG_LBLAW1_LENGTH \
)
#endif
#if defined(CONFIG_LBLAW2)
#define CONFIG_SYS_LBLAWBAR2_PRELIM \
CONFIG_LBLAW2_BASE
#define CONFIG_SYS_LBLAWAR2_PRELIM (\
CONFIG_LBLAW2_ENABLE_BIT |\
CONFIG_LBLAW2_LENGTH \
)
#endif
#if defined(CONFIG_LBLAW3)
#define CONFIG_SYS_LBLAWBAR3_PRELIM \
CONFIG_LBLAW3_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM (\
CONFIG_LBLAW3_ENABLE_BIT |\
CONFIG_LBLAW3_LENGTH \
)
#endif
#ifdef CONFIG_NAND_LBLAWBAR_PRELIM_0
#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR0_PRELIM
#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR0_PRELIM
#endif
#ifdef CONFIG_NAND_LBLAWBAR_PRELIM_1
#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR1_PRELIM
#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR1_PRELIM
#endif
#ifdef CONFIG_NAND_LBLAWBAR_PRELIM_2
#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR2_PRELIM
#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR2_PRELIM
#endif
#ifdef CONFIG_NAND_LBLAWBAR_PRELIM_3
#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR3_PRELIM
#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR3_PRELIM
#endif

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@ -6,6 +6,8 @@
#include <common.h> #include <common.h>
#include <mpc83xx.h> #include <mpc83xx.h>
#include "lblaw/lblaw.h"
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
/* /*

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@ -46,6 +46,18 @@ CONFIG_BAT3_BASE=0xE6000000
CONFIG_BAT3_ACCESS_RW=y CONFIG_BAT3_ACCESS_RW=y
CONFIG_BAT3_USER_MODE_VALID=y CONFIG_BAT3_USER_MODE_VALID=y
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="NAND"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xF0000000
CONFIG_LBLAW2_NAME="VSC7385"
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y

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@ -57,6 +57,22 @@ CONFIG_BAT6_ICACHE_GUARDED=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_16_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE2800000
CONFIG_LBLAW1_NAME="NAND"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xF0000000
CONFIG_LBLAW2_NAME="VSC7385"
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xFA000000
CONFIG_LBLAW3_NAME="BCSR"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ" CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"

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@ -56,6 +56,22 @@ CONFIG_BAT6_ICACHE_GUARDED=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_16_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE2800000
CONFIG_LBLAW1_NAME="NAND"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xF0000000
CONFIG_LBLAW2_NAME="VSC7385"
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xFA000000
CONFIG_LBLAW3_NAME="BCSR"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ" CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"

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@ -58,6 +58,23 @@ CONFIG_BAT6_ICACHE_GUARDED=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_NAND_LBLAWBAR_PRELIM_1=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_16_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE2800000
CONFIG_LBLAW1_NAME="NAND"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xF0000000
CONFIG_LBLAW2_NAME="VSC7385"
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xFA000000
CONFIG_LBLAW3_NAME="BCSR"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ" CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"

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@ -57,6 +57,23 @@ CONFIG_BAT6_ICACHE_GUARDED=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_NAND_LBLAWBAR_PRELIM_1=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_16_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE2800000
CONFIG_LBLAW1_NAME="NAND"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xF0000000
CONFIG_LBLAW2_NAME="VSC7385"
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xFA000000
CONFIG_LBLAW3_NAME="BCSR"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ" CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"

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@ -68,6 +68,14 @@ CONFIG_BAT5_DCACHE_INHIBITED=y
CONFIG_BAT5_DCACHE_GUARDED=y CONFIG_BAT5_DCACHE_GUARDED=y
CONFIG_BAT5_USER_MODE_VALID=y CONFIG_BAT5_USER_MODE_VALID=y
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="NAND"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6 CONFIG_BOOTDELAY=6

View file

@ -66,6 +66,10 @@ CONFIG_BAT6_DCACHE_INHIBITED=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6 CONFIG_BOOTDELAY=6

View file

@ -56,6 +56,18 @@ CONFIG_BAT5_BASE=0xE6000000
CONFIG_BAT5_ACCESS_RW=y CONFIG_BAT5_ACCESS_RW=y
CONFIG_BAT5_USER_MODE_VALID=y CONFIG_BAT5_USER_MODE_VALID=y
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF8000000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF8008000
CONFIG_LBLAW3_NAME="PIB"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1" CONFIG_SYS_EXTRA_OPTIONS="PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1"

View file

@ -76,6 +76,18 @@ CONFIG_BAT7_DCACHE_INHIBITED=y
CONFIG_BAT7_DCACHE_GUARDED=y CONFIG_BAT7_DCACHE_GUARDED=y
CONFIG_BAT7_USER_MODE_VALID=y CONFIG_BAT7_USER_MODE_VALID=y
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF8000000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF8008000
CONFIG_LBLAW3_NAME="PIB"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI_33M,PQ_MDS_PIB=1" CONFIG_SYS_EXTRA_OPTIONS="PCI_33M,PQ_MDS_PIB=1"

View file

@ -76,6 +76,18 @@ CONFIG_BAT7_DCACHE_INHIBITED=y
CONFIG_BAT7_DCACHE_GUARDED=y CONFIG_BAT7_DCACHE_GUARDED=y
CONFIG_BAT7_USER_MODE_VALID=y CONFIG_BAT7_USER_MODE_VALID=y
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF8000000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF8008000
CONFIG_LBLAW3_NAME="PIB"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI_66M,PQ_MDS_PIB=1" CONFIG_SYS_EXTRA_OPTIONS="PCI_66M,PQ_MDS_PIB=1"

View file

@ -73,6 +73,18 @@ CONFIG_BAT7_DCACHE_INHIBITED=y
CONFIG_BAT7_DCACHE_GUARDED=y CONFIG_BAT7_DCACHE_GUARDED=y
CONFIG_BAT7_USER_MODE_VALID=y CONFIG_BAT7_USER_MODE_VALID=y
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF8000000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF8008000
CONFIG_LBLAW3_NAME="PIB"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE" CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"

View file

@ -56,6 +56,18 @@ CONFIG_BAT5_BASE=0xE6000000
CONFIG_BAT5_ACCESS_RW=y CONFIG_BAT5_ACCESS_RW=y
CONFIG_BAT5_USER_MODE_VALID=y CONFIG_BAT5_USER_MODE_VALID=y
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF8000000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF8008000
CONFIG_LBLAW3_NAME="PIB"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6 CONFIG_BOOTDELAY=6

View file

@ -45,6 +45,14 @@ CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE2400000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6 CONFIG_BOOTDELAY=6

View file

@ -45,6 +45,18 @@ CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE2400000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xF0000000
CONFIG_LBLAW2_NAME="SDRAM"
CONFIG_LBLAW2_LENGTH_64_MBYTES=y
CONFIG_PCI_ONE_PCI1=y CONFIG_PCI_ONE_PCI1=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y

View file

@ -43,6 +43,14 @@ CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE2400000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_PCI_ONE_PCI1=y CONFIG_PCI_ONE_PCI1=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y

View file

@ -45,6 +45,14 @@ CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE2400000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_PCI_ONE_PCI1=y CONFIG_PCI_ONE_PCI1=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y

View file

@ -85,6 +85,18 @@ CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_16_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF8000000
CONFIG_LBLAW1_NAME="VSC7385"
CONFIG_LBLAW1_LENGTH_128_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF0000000
CONFIG_LBLAW3_NAME="CF"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFE000000" CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFE000000"

View file

@ -85,6 +85,18 @@ CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_16_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF8000000
CONFIG_LBLAW1_NAME="VSC7385"
CONFIG_LBLAW1_LENGTH_128_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF0000000
CONFIG_LBLAW3_NAME="CF"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6 CONFIG_BOOTDELAY=6

View file

@ -84,6 +84,18 @@ CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_16_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF8000000
CONFIG_LBLAW1_NAME="VSC7385"
CONFIG_LBLAW1_LENGTH_128_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xF0000000
CONFIG_LBLAW3_NAME="CF"
CONFIG_LBLAW3_LENGTH_64_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6 CONFIG_BOOTDELAY=6

View file

@ -89,6 +89,18 @@ CONFIG_BAT7_DCACHE_INHIBITED=y
CONFIG_BAT7_DCACHE_GUARDED=y CONFIG_BAT7_DCACHE_GUARDED=y
CONFIG_BAT7_USER_MODE_VALID=y CONFIG_BAT7_USER_MODE_VALID=y
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF8000000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xE0600000
CONFIG_LBLAW3_NAME="NAND"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6 CONFIG_BOOTDELAY=6

View file

@ -49,6 +49,18 @@ CONFIG_BAT3_DCACHE_INHIBITED=y
CONFIG_BAT3_DCACHE_GUARDED=y CONFIG_BAT3_DCACHE_GUARDED=y
CONFIG_BAT3_USER_MODE_VALID=y CONFIG_BAT3_USER_MODE_VALID=y
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF8000000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xE0600000
CONFIG_LBLAW3_NAME="NAND"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE" CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"

View file

@ -69,6 +69,18 @@ CONFIG_BAT5_BASE=0xE6000000
CONFIG_BAT5_ACCESS_RW=y CONFIG_BAT5_ACCESS_RW=y
CONFIG_BAT5_USER_MODE_VALID=y CONFIG_BAT5_USER_MODE_VALID=y
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF8000000
CONFIG_LBLAW1_NAME="BCSR"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xE0600000
CONFIG_LBLAW3_NAME="NAND"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6 CONFIG_BOOTDELAY=6

View file

@ -49,6 +49,18 @@ CONFIG_BAT3_DCACHE_INHIBITED=y
CONFIG_BAT3_DCACHE_GUARDED=y CONFIG_BAT3_DCACHE_GUARDED=y
CONFIG_BAT3_USER_MODE_VALID=y CONFIG_BAT3_USER_MODE_VALID=y
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="NAND"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xF0000000
CONFIG_LBLAW2_NAME="VSC7385"
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE,PCIE" CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE,PCIE"

View file

@ -89,6 +89,18 @@ CONFIG_BAT7_DCACHE_INHIBITED=y
CONFIG_BAT7_DCACHE_GUARDED=y CONFIG_BAT7_DCACHE_GUARDED=y
CONFIG_BAT7_USER_MODE_VALID=y CONFIG_BAT7_USER_MODE_VALID=y
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="NAND"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xF0000000
CONFIG_LBLAW2_NAME="VSC7385"
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCIE" CONFIG_SYS_EXTRA_OPTIONS="PCIE"

View file

@ -92,6 +92,16 @@ CONFIG_BAT7_DCACHE_INHIBITED=y
CONFIG_BAT7_DCACHE_GUARDED=y CONFIG_BAT7_DCACHE_GUARDED=y
CONFIG_BAT7_USER_MODE_VALID=y CONFIG_BAT7_USER_MODE_VALID=y
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0x80000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_1_GBYTES=y
CONFIG_LBLAW1=y
# CONFIG_LBLAW1_ENABLE is not set
CONFIG_LBLAW2=y
# CONFIG_LBLAW2_ENABLE is not set
CONFIG_LBLAW3=y
# CONFIG_LBLAW3_ENABLE is not set
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6 CONFIG_BOOTDELAY=6

View file

@ -63,6 +63,14 @@ CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFFC00000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_4_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF0000000
CONFIG_LBLAW1_NAME="WINDOW1"
CONFIG_LBLAW1_LENGTH_256_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6 CONFIG_BOOTDELAY=6

View file

@ -46,6 +46,14 @@ CONFIG_BAT3_BASE=0xE6000000
CONFIG_BAT3_ACCESS_RW=y CONFIG_BAT3_ACCESS_RW=y
CONFIG_BAT3_USER_MODE_VALID=y CONFIG_BAT3_USER_MODE_VALID=y
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="FPGA0"
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
CONFIG_CMD_IOLOOP=y CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y

View file

@ -46,6 +46,14 @@ CONFIG_BAT3_BASE=0xE6000000
CONFIG_BAT3_ACCESS_RW=y CONFIG_BAT3_ACCESS_RW=y
CONFIG_BAT3_USER_MODE_VALID=y CONFIG_BAT3_USER_MODE_VALID=y
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="FPGA0"
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
CONFIG_CMD_IOLOOP=y CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y

View file

@ -53,6 +53,23 @@ CONFIG_BAT6_ICACHE_GUARDED=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_NAND_LBLAWBAR_PRELIM_1=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFF800000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE1000000
CONFIG_LBLAW1_NAME="NAND"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xE2000000
CONFIG_LBLAW2_NAME="MRAM"
CONFIG_LBLAW2_LENGTH_128_KBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xE3000000
CONFIG_LBLAW3_NAME="CPLD"
CONFIG_LBLAW3_LENGTH_32_KBYTES=y
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y CONFIG_FIT_SIGNATURE=y
CONFIG_IMAGE_FORMAT_LEGACY=y CONFIG_IMAGE_FORMAT_LEGACY=y

View file

@ -92,6 +92,18 @@ CONFIG_BAT7_DCACHE_INHIBITED=y
CONFIG_BAT7_DCACHE_GUARDED=y CONFIG_BAT7_DCACHE_GUARDED=y
CONFIG_BAT7_USER_MODE_VALID=y CONFIG_BAT7_USER_MODE_VALID=y
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xF0000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE8000000
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xA0000000
CONFIG_LBLAW3_NAME="PAXE"
CONFIG_LBLAW3_LENGTH_512_MBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y CONFIG_MISC_INIT_R=y

View file

@ -65,6 +65,18 @@ CONFIG_BAT5_DCACHE_INHIBITED=y
CONFIG_BAT5_DCACHE_GUARDED=y CONFIG_BAT5_DCACHE_GUARDED=y
CONFIG_BAT5_USER_MODE_VALID=y CONFIG_BAT5_USER_MODE_VALID=y
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xF0000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE8000000
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xA0000000
CONFIG_LBLAW3_NAME="PAXE"
CONFIG_LBLAW3_LENGTH_512_MBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y CONFIG_MISC_INIT_R=y

View file

@ -76,6 +76,22 @@ CONFIG_BAT6_DCACHE_INHIBITED=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xF0000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE8000000
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xA0000000
CONFIG_LBLAW2_NAME="APP1"
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xB0000000
CONFIG_LBLAW3_NAME="APP2"
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y CONFIG_MISC_INIT_R=y

View file

@ -66,6 +66,18 @@ CONFIG_BAT5_DCACHE_INHIBITED=y
CONFIG_BAT5_DCACHE_GUARDED=y CONFIG_BAT5_DCACHE_GUARDED=y
CONFIG_BAT5_USER_MODE_VALID=y CONFIG_BAT5_USER_MODE_VALID=y
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xF0000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE8000000
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xA0000000
CONFIG_LBLAW2_NAME="APP1"
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y CONFIG_MISC_INIT_R=y

View file

@ -67,6 +67,18 @@ CONFIG_BAT6_DCACHE_INHIBITED=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xF0000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE8000000
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xB0000000
CONFIG_LBLAW3_NAME="APP2"
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1" CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1"

View file

@ -76,6 +76,22 @@ CONFIG_BAT6_DCACHE_INHIBITED=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xF0000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE8000000
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xA0000000
CONFIG_LBLAW2_NAME="APP1"
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xB0000000
CONFIG_LBLAW3_NAME="APP2"
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y CONFIG_MISC_INIT_R=y

View file

@ -77,6 +77,22 @@ CONFIG_BAT6_DCACHE_INHIBITED=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xF0000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE8000000
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xA0000000
CONFIG_LBLAW2_NAME="APP1"
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xB0000000
CONFIG_LBLAW3_NAME="APP2"
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMVECT1" CONFIG_SYS_EXTRA_OPTIONS="KMVECT1"

View file

@ -44,6 +44,18 @@ CONFIG_BAT3_BASE=0xE6000000
CONFIG_BAT3_ACCESS_RW=y CONFIG_BAT3_ACCESS_RW=y
CONFIG_BAT3_USER_MODE_VALID=y CONFIG_BAT3_USER_MODE_VALID=y
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFC000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_64_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xFBFF0000
CONFIG_LBLAW1_NAME="SJA1000"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xFBFF8000
CONFIG_LBLAW2_NAME="CPLD"
CONFIG_LBLAW2_LENGTH_32_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=5 CONFIG_BOOTDELAY=5

View file

@ -65,6 +65,10 @@ CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFF800000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_PCI_64BIT=y CONFIG_PCI_64BIT=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y

View file

@ -65,6 +65,10 @@ CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFF800000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_PCI_64BIT=y CONFIG_PCI_64BIT=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y

View file

@ -45,6 +45,10 @@ CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFF800000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6 CONFIG_BOOTDELAY=6

View file

@ -45,6 +45,14 @@ CONFIG_BAT3_BASE=0xE6000000
CONFIG_BAT3_ACCESS_RW=y CONFIG_BAT3_ACCESS_RW=y
CONFIG_BAT3_USER_MODE_VALID=y CONFIG_BAT3_USER_MODE_VALID=y
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="FPGA0"
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
CONFIG_CMD_IOLOOP=y CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y

View file

@ -45,6 +45,14 @@ CONFIG_BAT3_BASE=0xE6000000
CONFIG_BAT3_ACCESS_RW=y CONFIG_BAT3_ACCESS_RW=y
CONFIG_BAT3_USER_MODE_VALID=y CONFIG_BAT3_USER_MODE_VALID=y
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="FPGA0"
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
CONFIG_CMD_IOLOOP=y CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y

View file

@ -45,6 +45,14 @@ CONFIG_BAT3_BASE=0xE6000000
CONFIG_BAT3_ACCESS_RW=y CONFIG_BAT3_ACCESS_RW=y
CONFIG_BAT3_USER_MODE_VALID=y CONFIG_BAT3_USER_MODE_VALID=y
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="FPGA0"
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
CONFIG_CMD_IOLOOP=y CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y

View file

@ -45,6 +45,14 @@ CONFIG_BAT3_BASE=0xE6000000
CONFIG_BAT3_ACCESS_RW=y CONFIG_BAT3_ACCESS_RW=y
CONFIG_BAT3_USER_MODE_VALID=y CONFIG_BAT3_USER_MODE_VALID=y
CONFIG_BAT3_SUPERVISOR_MODE_VALID=y CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_8_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE0600000
CONFIG_LBLAW1_NAME="FPGA0"
CONFIG_LBLAW1_LENGTH_1_MBYTES=y
CONFIG_CMD_IOLOOP=y CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y CONFIG_FIT_VERBOSE=y

View file

@ -76,6 +76,22 @@ CONFIG_BAT6_DCACHE_INHIBITED=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xF0000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE8000000
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xA0000000
CONFIG_LBLAW2_NAME="APP1"
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xB0000000
CONFIG_LBLAW3_NAME="APP2"
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SUVD3" CONFIG_SYS_EXTRA_OPTIONS="SUVD3"

View file

@ -66,6 +66,18 @@ CONFIG_BAT5_DCACHE_INHIBITED=y
CONFIG_BAT5_DCACHE_GUARDED=y CONFIG_BAT5_DCACHE_GUARDED=y
CONFIG_BAT5_USER_MODE_VALID=y CONFIG_BAT5_USER_MODE_VALID=y
CONFIG_BAT5_SUPERVISOR_MODE_VALID=y CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xF0000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE8000000
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xA0000000
CONFIG_LBLAW2_NAME="APP1"
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y CONFIG_MISC_INIT_R=y

View file

@ -76,6 +76,22 @@ CONFIG_BAT6_DCACHE_INHIBITED=y
CONFIG_BAT6_DCACHE_GUARDED=y CONFIG_BAT6_DCACHE_GUARDED=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xF0000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_256_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xE8000000
CONFIG_LBLAW1_NAME="KMBEC_FPGA"
CONFIG_LBLAW1_LENGTH_128_MBYTES=y
CONFIG_LBLAW2=y
CONFIG_LBLAW2_BASE=0xA0000000
CONFIG_LBLAW2_NAME="APP1"
CONFIG_LBLAW2_LENGTH_256_MBYTES=y
CONFIG_LBLAW3=y
CONFIG_LBLAW3_BASE=0xB0000000
CONFIG_LBLAW3_NAME="APP2"
CONFIG_LBLAW3_LENGTH_256_MBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y CONFIG_MISC_INIT_R=y

View file

@ -65,6 +65,15 @@ CONFIG_BAT7_ICACHE_GUARDED=y
CONFIG_BAT7_DCACHE_GUARDED=y CONFIG_BAT7_DCACHE_GUARDED=y
CONFIG_BAT7_USER_MODE_VALID=y CONFIG_BAT7_USER_MODE_VALID=y
CONFIG_BAT7_SUPERVISOR_MODE_VALID=y CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_NAND_LBLAWBAR_PRELIM_1=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xFE000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_32_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0x61000000
CONFIG_LBLAW1_NAME="NAND"
CONFIG_LBLAW1_LENGTH_32_KBYTES=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6 CONFIG_BOOTDELAY=6

View file

@ -63,6 +63,14 @@ CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
CONFIG_BAT6_USER_MODE_VALID=y CONFIG_BAT6_USER_MODE_VALID=y
CONFIG_BAT6_SUPERVISOR_MODE_VALID=y CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_LBLAW0=y
CONFIG_LBLAW0_BASE=0xF8000000
CONFIG_LBLAW0_NAME="FLASH"
CONFIG_LBLAW0_LENGTH_128_MBYTES=y
CONFIG_LBLAW1=y
CONFIG_LBLAW1_BASE=0xF0000000
CONFIG_LBLAW1_NAME="WINDOW1"
CONFIG_LBLAW1_LENGTH_256_KBYTES=y
CONFIG_PCI_64BIT=y CONFIG_PCI_64BIT=y
CONFIG_OF_BOARD_SETUP=y CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_OF_STDOUT_VIA_ALIAS=y

View file

@ -176,9 +176,6 @@
#define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is 8M */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is 8M */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_8MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \
| BR_PS_16 /* 16 bit port */ \ | BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \ | BR_MS_GPCM /* MSEL = GPCM */ \
@ -218,9 +215,6 @@
| OR_FCM_EHTR) | OR_FCM_EHTR)
/* 0xFFFF8396 */ /* 0xFFFF8396 */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
#ifdef CONFIG_VSC7385_ENET #ifdef CONFIG_VSC7385_ENET
#define CONFIG_TSEC2 #define CONFIG_TSEC2
/* VSC7385 Base address on CS2 */ /* VSC7385 Base address on CS2 */
@ -239,10 +233,6 @@
| OR_GPCM_TRLX_SET \ | OR_GPCM_TRLX_SET \
| OR_GPCM_EHTR_SET) | OR_GPCM_EHTR_SET)
/* 0xFFFE09FF */ /* 0xFFFE09FF */
/* Access window base at VSC7385 base */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_VSC7385_BASE
/* Access window size 128K */
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_128KB)
/* The flash address and size of the VSC7385 firmware image */ /* The flash address and size of the VSC7385 firmware image */
#define CONFIG_VSC7385_IMAGE 0xFE7FE000 #define CONFIG_VSC7385_IMAGE 0xFE7FE000
#define CONFIG_VSC7385_IMAGE_SIZE 8192 #define CONFIG_VSC7385_IMAGE_SIZE 8192

View file

@ -180,10 +180,6 @@
| OR_GPCM_EHTR \ | OR_GPCM_EHTR \
| OR_GPCM_EAD) | OR_GPCM_EAD)
/* 0xFF006FF7 TODO SLOW 16 MB flash size */ /* 0xFF006FF7 TODO SLOW 16 MB flash size */
/* window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
/* 16 MB window size */
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_16MB)
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 135 /* sectors per device */ #define CONFIG_SYS_MAX_FLASH_SECT 135 /* sectors per device */
@ -253,12 +249,6 @@
#define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR0_PRELIM #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR0_PRELIM
#define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR0_PRELIM #define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR0_PRELIM
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR1_PRELIM
#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR1_PRELIM
/* local bus write LED / read status buffer (BCSR) mapping */ /* local bus write LED / read status buffer (BCSR) mapping */
#define CONFIG_SYS_BCSR_ADDR 0xFA000000 #define CONFIG_SYS_BCSR_ADDR 0xFA000000
#define CONFIG_SYS_BCSR_SIZE (32 * 1024) /* 0x00008000 */ #define CONFIG_SYS_BCSR_SIZE (32 * 1024) /* 0x00008000 */
@ -277,9 +267,6 @@
| OR_GPCM_EHTR_SET \ | OR_GPCM_EHTR_SET \
| OR_GPCM_EAD) | OR_GPCM_EAD)
/* 0xFFFF8FF7 */ /* 0xFFFF8FF7 */
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_BCSR_ADDR
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
/* Vitesse 7385 */ /* Vitesse 7385 */
#ifdef CONFIG_VSC7385_ENET #ifdef CONFIG_VSC7385_ENET
@ -301,11 +288,6 @@
| OR_GPCM_EHTR_SET \ | OR_GPCM_EHTR_SET \
| OR_GPCM_EAD) | OR_GPCM_EAD)
/* 0xFFFE09FF */ /* 0xFFFE09FF */
/* Access window base at VSC7385 base */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_VSC7385_BASE
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_128KB)
#endif #endif
#define CONFIG_MPC83XX_GPIO 1 #define CONFIG_MPC83XX_GPIO 1

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@ -153,10 +153,6 @@
| OR_GPCM_EHTR \ | OR_GPCM_EHTR \
| OR_GPCM_EAD) | OR_GPCM_EAD)
/* 0xFF006FF7 TODO SLOW 16 MB flash size */ /* 0xFF006FF7 TODO SLOW 16 MB flash size */
/* window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
/* 16 MB window size */
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_16MB)
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 135 /* sectors per device */ #define CONFIG_SYS_MAX_FLASH_SECT 135 /* sectors per device */
@ -222,12 +218,6 @@
#define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR1_PRELIM #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR1_PRELIM
#define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR1_PRELIM #define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR1_PRELIM
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR1_PRELIM
#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR1_PRELIM
/* local bus write LED / read status buffer (BCSR) mapping */ /* local bus write LED / read status buffer (BCSR) mapping */
#define CONFIG_SYS_BCSR_ADDR 0xFA000000 #define CONFIG_SYS_BCSR_ADDR 0xFA000000
#define CONFIG_SYS_BCSR_SIZE (32 * 1024) /* 0x00008000 */ #define CONFIG_SYS_BCSR_SIZE (32 * 1024) /* 0x00008000 */
@ -246,9 +236,6 @@
| OR_GPCM_EHTR_SET \ | OR_GPCM_EHTR_SET \
| OR_GPCM_EAD) | OR_GPCM_EAD)
/* 0xFFFF8FF7 */ /* 0xFFFF8FF7 */
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_BCSR_ADDR
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
/* Vitesse 7385 */ /* Vitesse 7385 */
#ifdef CONFIG_VSC7385_ENET #ifdef CONFIG_VSC7385_ENET
@ -270,11 +257,6 @@
| OR_GPCM_EHTR_SET \ | OR_GPCM_EHTR_SET \
| OR_GPCM_EAD) | OR_GPCM_EAD)
/* 0xFFFE09FF */ /* 0xFFFE09FF */
/* Access window base at VSC7385 base */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_VSC7385_BASE
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_128KB)
#endif #endif
#define CONFIG_MPC83XX_GPIO 1 #define CONFIG_MPC83XX_GPIO 1

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@ -146,10 +146,6 @@
#define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */
#define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is 8M */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is 8M */
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_8MB)
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
/* 127 64KB sectors and 8 8KB top sectors per device */ /* 127 64KB sectors and 8 8KB top sectors per device */
#define CONFIG_SYS_MAX_FLASH_SECT 135 #define CONFIG_SYS_MAX_FLASH_SECT 135
@ -213,12 +209,6 @@
#define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR1_PRELIM #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR1_PRELIM
#define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR1_PRELIM #define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR1_PRELIM
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR1_PRELIM
#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR1_PRELIM
#if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE && \ #if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE && \
!defined(CONFIG_NAND_SPL) !defined(CONFIG_NAND_SPL)
#define CONFIG_SYS_RAMBOOT #define CONFIG_SYS_RAMBOOT

View file

@ -141,9 +141,6 @@
#define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */
#define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size is 16M */ #define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size is 16M */
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_32MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \
| BR_PS_16 /* 16 bit port */ \ | BR_PS_16 /* 16 bit port */ \

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@ -133,10 +133,6 @@
#define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */
#define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size is 16M */ #define CONFIG_SYS_FLASH_SIZE 16 /* FLASH size is 16M */
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_32MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \
| BR_PS_16 /* 16 bit port */ \ | BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \ | BR_MS_GPCM /* MSEL = GPCM */ \
@ -162,8 +158,6 @@
*/ */
#define CONFIG_SYS_BCSR 0xF8000000 #define CONFIG_SYS_BCSR 0xF8000000
/* Access window base at BCSR base */ /* Access window base at BCSR base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_BCSR
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR \
| BR_PS_8 \ | BR_PS_8 \
@ -185,8 +179,6 @@
/* PIB window base 0xF8008000 */ /* PIB window base 0xF8008000 */
#define CONFIG_SYS_PIB_BASE 0xF8008000 #define CONFIG_SYS_PIB_BASE 0xF8008000
#define CONFIG_SYS_PIB_WINDOW_SIZE (32 * 1024) #define CONFIG_SYS_PIB_WINDOW_SIZE (32 * 1024)
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_PIB_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_64KB)
/* /*
* CS2 on Local Bus, to PIB * CS2 on Local Bus, to PIB

View file

@ -137,10 +137,6 @@
| OR_GPCM_EHTR_SET \ | OR_GPCM_EHTR_SET \
| OR_GPCM_EAD) | OR_GPCM_EAD)
/* window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_32MB)
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max sectors per device */ #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max sectors per device */
@ -161,8 +157,6 @@
*/ */
#define CONFIG_SYS_BCSR 0xE2400000 #define CONFIG_SYS_BCSR 0xE2400000
/* Access window base at BCSR base */ /* Access window base at BCSR base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_BCSR
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR \
| BR_PS_8 \ | BR_PS_8 \
| BR_MS_GPCM \ | BR_MS_GPCM \

View file

@ -137,10 +137,6 @@
| OR_GPCM_EHTR_SET \ | OR_GPCM_EHTR_SET \
| OR_GPCM_EAD) | OR_GPCM_EAD)
/* window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_32MB)
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max sectors per device */ #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max sectors per device */
@ -161,8 +157,6 @@
*/ */
#define CONFIG_SYS_BCSR 0xE2400000 #define CONFIG_SYS_BCSR 0xE2400000
/* Access window base at BCSR base */ /* Access window base at BCSR base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_BCSR
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR \
| BR_PS_8 \ | BR_PS_8 \
| BR_MS_GPCM \ | BR_MS_GPCM \
@ -222,8 +216,6 @@
| BR_MS_SDRAM /* MSEL = SDRAM */ \ | BR_MS_SDRAM /* MSEL = SDRAM */ \
| BR_V) /* Valid */ | BR_V) /* Valid */
/* 0xF0001861 */ /* 0xF0001861 */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_LBC_SDRAM_BASE
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_64MB)
/* /*
* The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64. * The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64.

View file

@ -226,9 +226,6 @@ boards, we say we have two, but don't display a message if we find only one. */
| OR_GPCM_TRLX_SET \ | OR_GPCM_TRLX_SET \
| OR_GPCM_EHTR_SET \ | OR_GPCM_EHTR_SET \
| OR_GPCM_EAD) | OR_GPCM_EAD)
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_16MB)
/* Vitesse 7385 */ /* Vitesse 7385 */
#define CONFIG_SYS_VSC7385_BASE 0xF8000000 #define CONFIG_SYS_VSC7385_BASE 0xF8000000
@ -247,10 +244,6 @@ boards, we say we have two, but don't display a message if we find only one. */
| OR_GPCM_TRLX_SET \ | OR_GPCM_TRLX_SET \
| OR_GPCM_EHTR_SET \ | OR_GPCM_EHTR_SET \
| OR_GPCM_EAD) | OR_GPCM_EAD)
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_VSC7385_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_128KB)
#endif #endif
/* LED */ /* LED */
@ -281,9 +274,6 @@ boards, we say we have two, but don't display a message if we find only one. */
| BR_V) | BR_V)
#define CONFIG_SYS_OR3_PRELIM (OR_UPM_AM | OR_UPM_BI) #define CONFIG_SYS_OR3_PRELIM (OR_UPM_AM | OR_UPM_BI)
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_CF_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_64KB)
#endif #endif
/* /*

View file

@ -162,10 +162,6 @@
#define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */
#define CONFIG_SYS_FLASH_SIZE 32 /* max FLASH size is 32M */ #define CONFIG_SYS_FLASH_SIZE 32 /* max FLASH size is 32M */
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_32MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \
| BR_PS_16 /* 16 bit port */ \ | BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \ | BR_MS_GPCM /* MSEL = GPCM */ \
@ -193,9 +189,6 @@
*/ */
#define CONFIG_SYS_BCSR 0xF8000000 #define CONFIG_SYS_BCSR 0xF8000000
/* Access window base at BCSR base */ /* Access window base at BCSR base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_BCSR
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR \
| BR_PS_8 \ | BR_PS_8 \
| BR_MS_GPCM \ | BR_MS_GPCM \
@ -233,9 +226,6 @@
| OR_FCM_EHTR) | OR_FCM_EHTR)
/* 0xFFFF919E */ /* 0xFFFF919E */
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_NAND_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
/* /*
* Serial Port * Serial Port
*/ */

View file

@ -188,10 +188,6 @@
#define CONFIG_SYS_FLASH_EMPTY_INFO /* display empty sectors */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* display empty sectors */
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM 0x80000016 /* 8 MB window size */
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \
| BR_PS_16 /* 16 bit port */ \ | BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \ | BR_MS_GPCM /* MSEL = GPCM */ \
@ -226,9 +222,6 @@
| OR_FCM_SCY_1 \ | OR_FCM_SCY_1 \
| OR_FCM_TRLX \ | OR_FCM_TRLX \
| OR_FCM_EHTR) | OR_FCM_EHTR)
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
/* Vitesse 7385 */ /* Vitesse 7385 */
#define CONFIG_SYS_VSC7385_BASE 0xF0000000 #define CONFIG_SYS_VSC7385_BASE 0xF0000000
@ -249,11 +242,6 @@
| OR_GPCM_EHTR_SET \ | OR_GPCM_EHTR_SET \
| OR_GPCM_EAD) | OR_GPCM_EAD)
/* 0xfffe09ff */ /* 0xfffe09ff */
/* Access Base */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_VSC7385_BASE
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_128KB)
#endif #endif
/* /*

View file

@ -93,26 +93,15 @@
#define CONFIG_SYS_OR0_PRELIM (CONFIG_SYS_PRELIM_OR_AM \ #define CONFIG_SYS_OR0_PRELIM (CONFIG_SYS_PRELIM_OR_AM \
| CONFIG_SYS_OR_TIMING_FLASH) | CONFIG_SYS_OR_TIMING_FLASH)
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_1GB)
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
/* disable remaining mappings */ /* disable remaining mappings */
#define CONFIG_SYS_BR1_PRELIM 0x00000000 #define CONFIG_SYS_BR1_PRELIM 0x00000000
#define CONFIG_SYS_OR1_PRELIM 0x00000000 #define CONFIG_SYS_OR1_PRELIM 0x00000000
#define CONFIG_SYS_LBLAWBAR1_PRELIM 0x00000000
#define CONFIG_SYS_LBLAWAR1_PRELIM 0x00000000
#define CONFIG_SYS_BR2_PRELIM 0x00000000 #define CONFIG_SYS_BR2_PRELIM 0x00000000
#define CONFIG_SYS_OR2_PRELIM 0x00000000 #define CONFIG_SYS_OR2_PRELIM 0x00000000
#define CONFIG_SYS_LBLAWBAR2_PRELIM 0x00000000
#define CONFIG_SYS_LBLAWAR2_PRELIM 0x00000000
#define CONFIG_SYS_BR3_PRELIM 0x00000000 #define CONFIG_SYS_BR3_PRELIM 0x00000000
#define CONFIG_SYS_OR3_PRELIM 0x00000000 #define CONFIG_SYS_OR3_PRELIM 0x00000000
#define CONFIG_SYS_LBLAWBAR3_PRELIM 0x00000000
#define CONFIG_SYS_LBLAWAR3_PRELIM 0x00000000
/* /*
* Monitor config * Monitor config

View file

@ -84,8 +84,6 @@
| OR_GPCM_EHTR_SET \ | OR_GPCM_EHTR_SET \
| OR_GPCM_EAD) | OR_GPCM_EAD)
/* 0xffc06ff7 */ /* 0xffc06ff7 */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_4MB)
#define CONFIG_SYS_WINDOW1_BASE 0xf0000000 #define CONFIG_SYS_WINDOW1_BASE 0xf0000000
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_WINDOW1_BASE \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_WINDOW1_BASE \
@ -96,8 +94,6 @@
#define CONFIG_SYS_OR1_PRELIM (OR_AM_256KB \ #define CONFIG_SYS_OR1_PRELIM (OR_AM_256KB \
| OR_GPCM_SETA) | OR_GPCM_SETA)
/* 0xfffc0208 */ /* 0xfffc0208 */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_WINDOW1_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_256KB)
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device*/ #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device*/

View file

@ -170,9 +170,6 @@
#define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_8MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \
| BR_PS_16 /* 16 bit port */ \ | BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \ | BR_MS_GPCM /* MSEL = GPCM */ \
@ -199,9 +196,6 @@
#define CONFIG_SYS_FPGA0_SIZE 1 /* FPGA size is 1M */ #define CONFIG_SYS_FPGA0_SIZE 1 /* FPGA size is 1M */
/* Window base at FPGA base */ /* Window base at FPGA base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_FPGA0_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_1MB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FPGA0_BASE \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FPGA0_BASE \
| BR_PS_16 /* 16 bit port */ \ | BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \ | BR_MS_GPCM /* MSEL = GPCM */ \

View file

@ -142,9 +142,6 @@
#define CONFIG_SYS_FLASH_BASE 0xFF800000 #define CONFIG_SYS_FLASH_BASE 0xFF800000
#define CONFIG_SYS_FLASH_SIZE 8 #define CONFIG_SYS_FLASH_SIZE 8
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM 0x80000016
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE |\ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE |\
BR_PS_8 |\ BR_PS_8 |\
BR_MS_GPCM |\ BR_MS_GPCM |\
@ -173,11 +170,6 @@
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10) #define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
#define NAND_CACHE_PAGES 64 #define NAND_CACHE_PAGES 64
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM 0x8000000E
#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR1_PRELIM
#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR1_PRELIM
#define CONFIG_SYS_BR1_PRELIM ((CONFIG_SYS_NAND_BASE) |\ #define CONFIG_SYS_BR1_PRELIM ((CONFIG_SYS_NAND_BASE) |\
(2<<BR_DECC_SHIFT) |\ (2<<BR_DECC_SHIFT) |\
BR_PS_8 |\ BR_PS_8 |\
@ -199,8 +191,6 @@
*/ */
#define CONFIG_SYS_MRAM_BASE 0xE2000000 #define CONFIG_SYS_MRAM_BASE 0xE2000000
#define CONFIG_SYS_MRAM_SIZE 0x20000 /* 128 Kb */ #define CONFIG_SYS_MRAM_SIZE 0x20000 /* 128 Kb */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_MRAM_BASE
#define CONFIG_SYS_LBLAWAR2_PRELIM 0x80000010 /* 128 Kb */
#define CONFIG_SYS_OR_TIMING_MRAM #define CONFIG_SYS_OR_TIMING_MRAM
@ -216,8 +206,6 @@
*/ */
#define CONFIG_SYS_CPLD_BASE 0xE3000000 #define CONFIG_SYS_CPLD_BASE 0xE3000000
#define CONFIG_SYS_CPLD_SIZE 0x8000 #define CONFIG_SYS_CPLD_SIZE 0x8000
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_CPLD_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM 0x8000000E
#define CONFIG_SYS_OR_TIMING_MRAM #define CONFIG_SYS_OR_TIMING_MRAM

View file

@ -108,9 +108,6 @@
*/ */
#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
BR_PS_16 | /* 16 bit port size */ \ BR_PS_16 | /* 16 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -129,9 +126,6 @@
* PRIO1/PIGGY on the local bus CS1 * PRIO1/PIGGY on the local bus CS1
*/ */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_KMBEC_FPGA_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_128MB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \
BR_PS_8 | /* 8 bit port size */ \ BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -353,10 +347,6 @@
#define CONFIG_SYS_PAXE_BASE 0xA0000000 #define CONFIG_SYS_PAXE_BASE 0xA0000000
#define CONFIG_SYS_PAXE_SIZE 256 #define CONFIG_SYS_PAXE_SIZE 256
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_PAXE_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM 0x8000001C /* 512MB window size */
#define CONFIG_SYS_BR3_PRELIM (\ #define CONFIG_SYS_BR3_PRELIM (\
CONFIG_SYS_PAXE_BASE | \ CONFIG_SYS_PAXE_BASE | \
(1 << BR_PS_SHIFT) | \ (1 << BR_PS_SHIFT) | \

View file

@ -93,9 +93,6 @@
*/ */
#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
BR_PS_16 | /* 16 bit port size */ \ BR_PS_16 | /* 16 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -114,9 +111,6 @@
* PRIO1/PIGGY on the local bus CS1 * PRIO1/PIGGY on the local bus CS1
*/ */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_KMBEC_FPGA_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_128MB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \
BR_PS_8 | /* 8 bit port size */ \ BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -333,10 +327,6 @@
#define CONFIG_SYS_PAXE_BASE 0xA0000000 #define CONFIG_SYS_PAXE_BASE 0xA0000000
#define CONFIG_SYS_PAXE_SIZE 256 #define CONFIG_SYS_PAXE_SIZE 256
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_PAXE_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM 0x8000001C /* 512MB window size */
#define CONFIG_SYS_BR3_PRELIM (\ #define CONFIG_SYS_BR3_PRELIM (\
CONFIG_SYS_PAXE_BASE | \ CONFIG_SYS_PAXE_BASE | \
(1 << BR_PS_SHIFT) | \ (1 << BR_PS_SHIFT) | \

View file

@ -113,9 +113,6 @@
*/ */
#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
BR_PS_16 | /* 16 bit port size */ \ BR_PS_16 | /* 16 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -134,9 +131,6 @@
* PRIO1/PIGGY on the local bus CS1 * PRIO1/PIGGY on the local bus CS1
*/ */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_KMBEC_FPGA_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_128MB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \
BR_PS_8 | /* 8 bit port size */ \ BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -367,11 +361,6 @@
/* /*
* Configuration for C2 on the local bus * Configuration for C2 on the local bus
*/ */
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_APP1_BASE
/* Window size: 256 MB */
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \ #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \
BR_PS_8 | \ BR_PS_8 | \
BR_MS_GPCM | \ BR_MS_GPCM | \
@ -388,8 +377,6 @@
/* /*
* Configuration for C3 on the local bus * Configuration for C3 on the local bus
*/ */
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \ #define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \
BR_PS_16 | \ BR_PS_16 | \
BR_MS_GPCM | \ BR_MS_GPCM | \

View file

@ -113,9 +113,6 @@
*/ */
#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
BR_PS_16 | /* 16 bit port size */ \ BR_PS_16 | /* 16 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -134,9 +131,6 @@
* PRIO1/PIGGY on the local bus CS1 * PRIO1/PIGGY on the local bus CS1
*/ */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_KMBEC_FPGA_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_128MB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \
BR_PS_8 | /* 8 bit port size */ \ BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -365,11 +359,6 @@
/* /*
* Configuration for C2 on the local bus * Configuration for C2 on the local bus
*/ */
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_APP1_BASE
/* Window size: 256 MB */
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \ #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \
BR_PS_8 | \ BR_PS_8 | \
BR_MS_GPCM | \ BR_MS_GPCM | \

View file

@ -120,9 +120,6 @@
*/ */
#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
BR_PS_16 | /* 16 bit port size */ \ BR_PS_16 | /* 16 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -141,9 +138,6 @@
* PRIO1/PIGGY on the local bus CS1 * PRIO1/PIGGY on the local bus CS1
*/ */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_KMBEC_FPGA_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_128MB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \
BR_PS_8 | /* 8 bit port size */ \ BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -427,9 +421,6 @@
OR_GPCM_TRLX_CLEAR | \ OR_GPCM_TRLX_CLEAR | \
OR_GPCM_EHTR_CLEAR) OR_GPCM_EHTR_CLEAR)
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
/* ethernet port connected to piggy (UEC2) */ /* ethernet port connected to piggy (UEC2) */
#define CONFIG_HAS_ETH1 #define CONFIG_HAS_ETH1
#define CONFIG_UEC_ETH2 #define CONFIG_UEC_ETH2

View file

@ -113,9 +113,6 @@
*/ */
#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
BR_PS_16 | /* 16 bit port size */ \ BR_PS_16 | /* 16 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -134,9 +131,6 @@
* PRIO1/PIGGY on the local bus CS1 * PRIO1/PIGGY on the local bus CS1
*/ */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_KMBEC_FPGA_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_128MB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \
BR_PS_8 | /* 8 bit port size */ \ BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -367,11 +361,6 @@
/* /*
* Configuration for C2 on the local bus * Configuration for C2 on the local bus
*/ */
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_APP1_BASE
/* Window size: 256 MB */
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \ #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \
BR_PS_8 | \ BR_PS_8 | \
BR_MS_GPCM | \ BR_MS_GPCM | \
@ -388,8 +377,6 @@
/* /*
* Configuration for C3 on the local bus * Configuration for C3 on the local bus
*/ */
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \ #define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \
BR_PS_16 | \ BR_PS_16 | \
BR_MS_GPCM | \ BR_MS_GPCM | \

View file

@ -112,9 +112,6 @@
*/ */
#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
BR_PS_16 | /* 16 bit port size */ \ BR_PS_16 | /* 16 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -133,9 +130,6 @@
* PRIO1/PIGGY on the local bus CS1 * PRIO1/PIGGY on the local bus CS1
*/ */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_KMBEC_FPGA_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_128MB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \
BR_PS_8 | /* 8 bit port size */ \ BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -409,9 +403,6 @@
/* /*
* APP1 on the local bus CS2 * APP1 on the local bus CS2
*/ */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_APP1_BASE
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \ #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \
BR_PS_16 | \ BR_PS_16 | \
BR_MS_UPMA | \ BR_MS_UPMA | \
@ -431,10 +422,6 @@
#define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \ #define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \
0x0000c000 | \ 0x0000c000 | \
MxMR_WLFx_2X) MxMR_WLFx_2X)
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
/* /*
* QE UEC ethernet configuration * QE UEC ethernet configuration
*/ */

View file

@ -180,9 +180,6 @@
#define CONFIG_SYS_FLASH_SIZE 64 /* FLASH size is 64M */ #define CONFIG_SYS_FLASH_SIZE 64 /* FLASH size is 64M */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_64MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \
| BR_PS_16 /* 16 bit port */ \ | BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \ | BR_MS_GPCM /* MSEL = GPCM */ \
@ -217,9 +214,6 @@
| OR_GPCM_EHTR_SET) | OR_GPCM_EHTR_SET)
/* 0xFFFF8052 */ /* 0xFFFF8052 */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_SJA1000_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
/* /*
* CPLD on Local Bus * CPLD on Local Bus
*/ */
@ -233,9 +227,6 @@
| OR_GPCM_EHTR_SET) | OR_GPCM_EHTR_SET)
/* 0xFFFF8042 */ /* 0xFFFF8042 */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_CPLD_BASE
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
/* /*
* Serial Port * Serial Port
*/ */

View file

@ -114,10 +114,6 @@
| OR_GPCM_EAD) | OR_GPCM_EAD)
/* 0xFF806FF7 */ /* 0xFF806FF7 */
/* window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_8MB)
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 64 /* sectors per device */ #define CONFIG_SYS_MAX_FLASH_SECT 64 /* sectors per device */
@ -180,9 +176,6 @@
| BR_MS_SDRAM \ | BR_MS_SDRAM \
| BR_V) | BR_V)
/* 0xF0001861 */ /* 0xF0001861 */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_LBC_SDRAM_BASE
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_64MB)
/* /*
* The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64. * The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64.
* *

View file

@ -168,9 +168,6 @@
#define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */ #define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_8MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \
| BR_PS_16 /* 16 bit port */ \ | BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \ | BR_MS_GPCM /* MSEL = GPCM */ \
@ -197,9 +194,6 @@
#define CONFIG_SYS_FPGA0_SIZE 1 /* FPGA size is 1M */ #define CONFIG_SYS_FPGA0_SIZE 1 /* FPGA size is 1M */
/* Window base at FPGA base */ /* Window base at FPGA base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_FPGA0_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_1MB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FPGA0_BASE \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FPGA0_BASE \
| BR_PS_16 /* 16 bit port */ \ | BR_PS_16 /* 16 bit port */ \
| BR_MS_GPCM /* MSEL = GPCM */ \ | BR_MS_GPCM /* MSEL = GPCM */ \

View file

@ -110,9 +110,6 @@
*/ */
#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
BR_PS_16 | /* 16 bit port size */ \ BR_PS_16 | /* 16 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -131,9 +128,6 @@
* PRIO1/PIGGY on the local bus CS1 * PRIO1/PIGGY on the local bus CS1
*/ */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_KMBEC_FPGA_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_128MB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \
BR_PS_8 | /* 8 bit port size */ \ BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -362,9 +356,6 @@
/* /*
* APP1 on the local bus CS2 * APP1 on the local bus CS2
*/ */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_APP1_BASE
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \ #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \
BR_PS_16 | \ BR_PS_16 | \
BR_MS_UPMA | \ BR_MS_UPMA | \
@ -384,8 +375,4 @@
#define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \ #define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \
0x0000c000 | \ 0x0000c000 | \
MxMR_WLFx_2X) MxMR_WLFx_2X)
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#endif /* __CONFIG_H */ #endif /* __CONFIG_H */

View file

@ -113,9 +113,6 @@
*/ */
#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
BR_PS_16 | /* 16 bit port size */ \ BR_PS_16 | /* 16 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -134,9 +131,6 @@
* PRIO1/PIGGY on the local bus CS1 * PRIO1/PIGGY on the local bus CS1
*/ */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_KMBEC_FPGA_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_128MB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \
BR_PS_8 | /* 8 bit port size */ \ BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -365,11 +359,6 @@
/* /*
* Configuration for C2 on the local bus * Configuration for C2 on the local bus
*/ */
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_APP1_BASE
/* Window size: 256 MB */
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \ #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \
BR_PS_8 | \ BR_PS_8 | \
BR_MS_GPCM | \ BR_MS_GPCM | \

View file

@ -113,9 +113,6 @@
*/ */
#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
BR_PS_16 | /* 16 bit port size */ \ BR_PS_16 | /* 16 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -134,9 +131,6 @@
* PRIO1/PIGGY on the local bus CS1 * PRIO1/PIGGY on the local bus CS1
*/ */
/* Window base at flash base */ /* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_KMBEC_FPGA_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_128MB)
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_KMBEC_FPGA_BASE | \
BR_PS_8 | /* 8 bit port size */ \ BR_PS_8 | /* 8 bit port size */ \
BR_MS_GPCM | /* MSEL = GPCM */ \ BR_MS_GPCM | /* MSEL = GPCM */ \
@ -367,11 +361,6 @@
/* /*
* Configuration for C2 on the local bus * Configuration for C2 on the local bus
*/ */
/* Window base at flash base */
#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_APP1_BASE
/* Window size: 256 MB */
#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \ #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \
BR_PS_8 | \ BR_PS_8 | \
BR_MS_GPCM | \ BR_MS_GPCM | \
@ -388,11 +377,6 @@
/* /*
* Configuration for C3 on the local bus * Configuration for C3 on the local bus
*/ */
/* Access window base at PINC3 base */
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
/* Window size: 256 MB */
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \ #define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \
BR_PS_8 | \ BR_PS_8 | \
BR_MS_GPCM | \ BR_MS_GPCM | \

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@ -111,9 +111,6 @@
#define CONFIG_SYS_FLASH_SIZE 32 /* size in MB */ #define CONFIG_SYS_FLASH_SIZE 32 /* size in MB */
#define CONFIG_SYS_FLASH_EMPTY_INFO /* display empty sectors */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* display empty sectors */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_32MB)
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 256 /* sectors per dev */ #define CONFIG_SYS_MAX_FLASH_SECT 256 /* sectors per dev */
@ -186,12 +183,6 @@
#define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR1_PRELIM #define CONFIG_SYS_NAND_BR_PRELIM CONFIG_SYS_BR1_PRELIM
#define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR1_PRELIM #define CONFIG_SYS_NAND_OR_PRELIM CONFIG_SYS_OR1_PRELIM
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB)
#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR1_PRELIM
#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR1_PRELIM
/* CS2 NvRAM */ /* CS2 NvRAM */
#define CONFIG_SYS_BR2_PRELIM (0x60000000 \ #define CONFIG_SYS_BR2_PRELIM (0x60000000 \
| BR_PS_8 \ | BR_PS_8 \

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@ -84,8 +84,6 @@
| OR_GPCM_EHTR_SET \ | OR_GPCM_EHTR_SET \
| OR_GPCM_EAD) | OR_GPCM_EAD)
/* 0xf8006ff7 */ /* 0xf8006ff7 */
#define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_128MB)
#define CONFIG_SYS_WINDOW1_BASE 0xf0000000 #define CONFIG_SYS_WINDOW1_BASE 0xf0000000
#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_WINDOW1_BASE \ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_WINDOW1_BASE \
@ -96,8 +94,6 @@
#define CONFIG_SYS_OR1_PRELIM (OR_AM_256KB \ #define CONFIG_SYS_OR1_PRELIM (OR_AM_256KB \
| OR_GPCM_SETA) | OR_GPCM_SETA)
/* 0xfffc0208 */ /* 0xfffc0208 */
#define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_WINDOW1_BASE
#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_256KB)
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device*/ #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device*/

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@ -3208,22 +3208,6 @@ CONFIG_SYS_LBC_NONCACHE_BASE
CONFIG_SYS_LBC_SDRAM_BASE CONFIG_SYS_LBC_SDRAM_BASE
CONFIG_SYS_LBC_SDRAM_BASE_PHYS CONFIG_SYS_LBC_SDRAM_BASE_PHYS
CONFIG_SYS_LBC_SDRAM_SIZE CONFIG_SYS_LBC_SDRAM_SIZE
CONFIG_SYS_LBLAWAR0_PRELIM
CONFIG_SYS_LBLAWAR1_PRELIM
CONFIG_SYS_LBLAWAR2_PRELIM
CONFIG_SYS_LBLAWAR3_PRELIM
CONFIG_SYS_LBLAWAR4_PRELIM
CONFIG_SYS_LBLAWAR5_PRELIM
CONFIG_SYS_LBLAWAR6_PRELIM
CONFIG_SYS_LBLAWAR7_PRELIM
CONFIG_SYS_LBLAWBAR0_PRELIM
CONFIG_SYS_LBLAWBAR1_PRELIM
CONFIG_SYS_LBLAWBAR2_PRELIM
CONFIG_SYS_LBLAWBAR3_PRELIM
CONFIG_SYS_LBLAWBAR4_PRELIM
CONFIG_SYS_LBLAWBAR5_PRELIM
CONFIG_SYS_LBLAWBAR6_PRELIM
CONFIG_SYS_LBLAWBAR7_PRELIM
CONFIG_SYS_LB_SDRAM CONFIG_SYS_LB_SDRAM
CONFIG_SYS_LCD_BASE CONFIG_SYS_LCD_BASE
CONFIG_SYS_LCRR_CLKDIV CONFIG_SYS_LCRR_CLKDIV