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riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B

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The difference between 1.2A and 1.3B is dynamically configured according
to the PCB version, and there is no difference on the board device tree,
so the same DT file can be used.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This commit is contained in:
Yanhong Wang 2023-06-15 17:36:45 +08:00 • committed by Leo Yu-Chi Liang
parent 55a2b82690
commit 9b7060bd15
6 changed files with 28 additions and 88 deletions
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3
arch/riscv/dts/Makefile
View file

@ -7,8 +7,7 @@ dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2-v1.3b.dtb
dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2-v1.2a.dtb
dtb-$(CONFIG_TARGET_STARFIVE_VISIONFIVE2) += jh7110-starfive-visionfive-2.dtb
include $(srctree)/scripts/Makefile.dts
targets += $(dtb-y)

25
arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a-u-boot.dtsi → arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
View file

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright (C) 2022 StarFive Technology Co., Ltd.
* Copyright (C) 2023 StarFive Technology Co., Ltd.
*/
#include "binman.dtsi"
@ -67,3 +67,26 @@
};
};
&binman {
itb {
fit {
images {
fdt-1 {
description = "NAME";
load = <0x40400000>;
compression = "none";
uboot_fdt_blob: blob-ext {
filename = "u-boot.dtb";
};
};
};
configurations {
conf-1 {
fdt = "fdt-1";
};
};
};
};
};

12
arch/riscv/dts/jh7110-starfive-visionfive-2-v1.2a.dts
View file

@ -1,12 +0,0 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright (C) 2022 StarFive Technology Co., Ltd.
*/
/dts-v1/;
#include "jh7110-starfive-visionfive-2.dtsi"
/ {
model = "StarFive VisionFive 2 v1.2A";
compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
};

69
arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi
View file

@ -1,69 +0,0 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright (C) 2022 StarFive Technology Co., Ltd.
*/
#include "binman.dtsi"
#include "jh7110-u-boot.dtsi"
/ {
chosen {
bootph-pre-ram;
};
firmware {
spi0 = &qspi;
bootph-pre-ram;
};
config {
bootph-pre-ram;
u-boot,spl-payload-offset = <0x100000>;
};
memory@40000000 {
bootph-pre-ram;
};
};
&uart0 {
bootph-pre-ram;
};
&mmc0 {
bootph-pre-ram;
};
&mmc1 {
bootph-pre-ram;
};
&qspi {
bootph-pre-ram;
nor-flash@0 {
bootph-pre-ram;
};
};
&sysgpio {
bootph-pre-ram;
};
&mmc0_pins {
bootph-pre-ram;
mmc0-pins-rest {
bootph-pre-ram;
};
};
&mmc1_pins {
bootph-pre-ram;
mmc1-pins0 {
bootph-pre-ram;
};
mmc1-pins1 {
bootph-pre-ram;
};
};

3
arch/riscv/dts/jh7110-starfive-visionfive-2-v1.3b.dts → arch/riscv/dts/jh7110-starfive-visionfive-2.dts
View file

@ -1,12 +1,11 @@
// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
* Copyright (C) 2022 StarFive Technology Co., Ltd.
* Copyright (C) 2023 StarFive Technology Co., Ltd.
*/
/dts-v1/;
#include "jh7110-starfive-visionfive-2.dtsi"
/ {
model = "StarFive VisionFive 2 v1.3B";
compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110";
};

4
configs/starfive_visionfive2_defconfig
View file

@ -7,7 +7,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000000
CONFIG_SF_DEFAULT_SPEED=100000000
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="jh7110-starfive-visionfive-2-v1.3b"
CONFIG_DEFAULT_DEVICE_TREE="jh7110-starfive-visionfive-2"
CONFIG_SPL_TEXT_BASE=0x8000000
CONFIG_SYS_PROMPT="StarFive #"
CONFIG_OF_LIBFDT_OVERLAY=y
@ -31,7 +31,7 @@ CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 debug rootwait earlycon=sbi"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};"
CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2-v1.3b.dtb"
CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2.dtb"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_SPL_MAX_SIZE=0x40000