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powerpc/85xx: Add workaround for errata USB-14 (enable on P204x/P3041/P50x0)

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On P204x/P304x/P50x0 Rev1.0, USB transmit will result in false internal
multi-bit ECC errors, which has impact on performance, so software should
disable all ECC reporting from USB1 and USB2.

In formal release document, the errata number should be USB14 instead of USB138.

Signed-off-by: xulei <Lei.Xu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: xulei <B33228@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
Xulei 2013-03-11 17:56:34 +00:00 committed by Andy Fleming
parent 57966101c8
commit 99d7b0a43d
4 changed files with 30 additions and 1 deletions
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3
arch/powerpc/cpu/mpc85xx/cmd_errata.c
View file

@ -254,6 +254,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
#endif
#ifdef CONFIG_SYS_P4080_ERRATUM_PCIE_A003
puts("Work-around for Erratum PCIe-A003 enabled\n");
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_USB14
puts("Work-around for Erratum USB14 enabled\n");
#endif
return 0;
}

14
arch/powerpc/cpu/mpc85xx/cpu_init.c
View file

@ -623,6 +623,20 @@ skip_l2:
}
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_USB14
/* On P204x/P304x/P50x0 Rev1.0, USB transmit will result internal
* multi-bit ECC errors which has impact on performance, so software
* should disable all ECC reporting from USB1 and USB2.
*/
if (IS_SVR_REV(get_svr(), 1, 0)) {
struct dcsr_dcfg_regs *dcfg = (struct dcsr_dcfg_regs *)
(CONFIG_SYS_DCSRBAR + CONFIG_SYS_DCSR_DCFG_OFFSET);
setbits_be32(&dcfg->ecccr1,
(DCSR_DCFG_ECC_DISABLE_USB1 |
DCSR_DCFG_ECC_DISABLE_USB2));
}
#endif
#ifdef CONFIG_FMAN_ENET
fman_enet_init();
#endif

5
arch/powerpc/include/asm/config_mpc85xx.h
View file

@ -333,6 +333,7 @@
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
#define CONFIG_SYS_FSL_ERRATUM_USB14
#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
@ -365,6 +366,7 @@
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
#define CONFIG_SYS_FSL_ERRATUM_USB14
#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
@ -442,6 +444,7 @@
#define CONFIG_SYS_FSL_USB2_PHY_ENABLE
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_SYS_FSL_ERRATUM_USB14
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
@ -473,7 +476,7 @@
#define CONFIG_SYS_FSL_USB2_PHY_ENABLE
#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_SYS_FSL_ERRATUM_USB138
#define CONFIG_SYS_FSL_ERRATUM_USB14
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
#define CONFIG_SYS_FSL_ERRATUM_A004699

9
arch/powerpc/include/asm/immap_85xx.h
View file

@ -3161,4 +3161,13 @@ struct ccsr_cluster_l2 {
#define CONFIG_SYS_FSL_CLUSTER_1_L2 \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CLUSTER_1_L2_OFFSET)
#endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
#define CONFIG_SYS_DCSR_DCFG_OFFSET 0X20000
struct dcsr_dcfg_regs {
u8 res_0[0x520];
u32 ecccr1;
#define DCSR_DCFG_ECC_DISABLE_USB1 0x00008000
#define DCSR_DCFG_ECC_DISABLE_USB2 0x00004000
u8 res_524[0x1000 - 0x524]; /* 0x524 - 0x1000 */
};
#endif /*__IMMAP_85xx__*/