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powerpc: MPC8560: Remove macro CONFIG_MPC8560
Replace CONFIG_MPC8560 with ARCH_MPC8560 in Kconfig and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
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7 changed files with 9 additions and 7 deletions
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@ -80,6 +80,7 @@ config TARGET_MPC8555CDS
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config TARGET_MPC8560ADS
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bool "Support MPC8560ADS"
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select ARCH_MPC8560
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config TARGET_MPC8568MDS
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bool "Support MPC8568MDS"
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@ -211,6 +212,9 @@ config ARCH_MPC8548
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config ARCH_MPC8555
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bool
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config ARCH_MPC8560
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bool
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source "board/freescale/b4860qds/Kconfig"
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source "board/freescale/bsc9131rdb/Kconfig"
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source "board/freescale/bsc9132qds/Kconfig"
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@ -294,7 +294,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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/* Everything after the first generation of PQ3 parts has RSTCR */
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#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
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defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_MPC8560)
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defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_ARCH_MPC8560)
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unsigned long val, msr;
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/*
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@ -626,7 +626,7 @@ void get_sys_info(sys_info_t *sys_info)
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*/
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lcrr_div *= 4;
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#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_ARCH_MPC8541) && \
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!defined(CONFIG_ARCH_MPC8555) && !defined(CONFIG_MPC8560)
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!defined(CONFIG_ARCH_MPC8555) && !defined(CONFIG_ARCH_MPC8560)
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/*
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* Yes, the entire PQ38 family use the same
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* bit-representation for twice the clock divider values.
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@ -682,7 +682,7 @@ int get_clocks (void)
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* AN2919.
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*/
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#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
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defined(CONFIG_MPC8560) || defined(CONFIG_ARCH_MPC8555) || \
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defined(CONFIG_ARCH_MPC8560) || defined(CONFIG_ARCH_MPC8555) || \
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defined(CONFIG_P1022)
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gd->arch.i2c1_clk = sys_info.freq_systembus;
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#elif defined(CONFIG_ARCH_MPC8544)
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@ -92,7 +92,7 @@
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#define CONFIG_SYS_FSL_SEC_COMPAT 2
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#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
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#elif defined(CONFIG_MPC8560)
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#elif defined(CONFIG_ARCH_MPC8560)
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#define CONFIG_MAX_CPUS 1
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#define CONFIG_SYS_FSL_NUM_LAWS 8
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#define CONFIG_SYS_FSL_DDRC_GEN1
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@ -327,7 +327,7 @@ void lbc_sdram_init(void);
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#define LCRR_CLKDIV_SHIFT 0
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#if defined(CONFIG_MPC83xx) || defined(CONFIG_ARCH_MPC8540) || \
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defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555) || \
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defined(CONFIG_MPC8560)
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defined(CONFIG_ARCH_MPC8560)
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#define LCRR_CLKDIV_2 0x00000002
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#define LCRR_CLKDIV_4 0x00000004
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#define LCRR_CLKDIV_8 0x00000008
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@ -23,7 +23,6 @@
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#define CONFIG_E500 1 /* BOOKE e500 family */
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#define CONFIG_CPM2 1 /* has CPM2 */
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#define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific */
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#define CONFIG_MPC8560 1
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/*
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* default CCARBAR is at 0xff700000
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@ -3141,7 +3141,6 @@ CONFIG_MPC83XX_GPIO_1_INIT_VALUE
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CONFIG_MPC83XX_PCI2
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CONFIG_MPC850
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CONFIG_MPC855
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CONFIG_MPC8560
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CONFIG_MPC8560ADS
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CONFIG_MPC8568
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CONFIG_MPC8568MDS
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