powerpc: MPC8560: Remove macro CONFIG_MPC8560

Replace CONFIG_MPC8560 with ARCH_MPC8560 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
York Sun 2016-11-16 11:26:45 -08:00
parent 2f2d54b7cd
commit 99d0a3123e
7 changed files with 9 additions and 7 deletions

View file

@ -80,6 +80,7 @@ config TARGET_MPC8555CDS
config TARGET_MPC8560ADS
bool "Support MPC8560ADS"
select ARCH_MPC8560
config TARGET_MPC8568MDS
bool "Support MPC8568MDS"
@ -211,6 +212,9 @@ config ARCH_MPC8548
config ARCH_MPC8555
bool
config ARCH_MPC8560
bool
source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig"

View file

@ -294,7 +294,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
/* Everything after the first generation of PQ3 parts has RSTCR */
#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_MPC8560)
defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_ARCH_MPC8560)
unsigned long val, msr;
/*

View file

@ -626,7 +626,7 @@ void get_sys_info(sys_info_t *sys_info)
*/
lcrr_div *= 4;
#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_ARCH_MPC8541) && \
!defined(CONFIG_ARCH_MPC8555) && !defined(CONFIG_MPC8560)
!defined(CONFIG_ARCH_MPC8555) && !defined(CONFIG_ARCH_MPC8560)
/*
* Yes, the entire PQ38 family use the same
* bit-representation for twice the clock divider values.
@ -682,7 +682,7 @@ int get_clocks (void)
* AN2919.
*/
#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
defined(CONFIG_MPC8560) || defined(CONFIG_ARCH_MPC8555) || \
defined(CONFIG_ARCH_MPC8560) || defined(CONFIG_ARCH_MPC8555) || \
defined(CONFIG_P1022)
gd->arch.i2c1_clk = sys_info.freq_systembus;
#elif defined(CONFIG_ARCH_MPC8544)

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@ -92,7 +92,7 @@
#define CONFIG_SYS_FSL_SEC_COMPAT 2
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#elif defined(CONFIG_MPC8560)
#elif defined(CONFIG_ARCH_MPC8560)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 8
#define CONFIG_SYS_FSL_DDRC_GEN1

View file

@ -327,7 +327,7 @@ void lbc_sdram_init(void);
#define LCRR_CLKDIV_SHIFT 0
#if defined(CONFIG_MPC83xx) || defined(CONFIG_ARCH_MPC8540) || \
defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555) || \
defined(CONFIG_MPC8560)
defined(CONFIG_ARCH_MPC8560)
#define LCRR_CLKDIV_2 0x00000002
#define LCRR_CLKDIV_4 0x00000004
#define LCRR_CLKDIV_8 0x00000008

View file

@ -23,7 +23,6 @@
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific */
#define CONFIG_MPC8560 1
/*
* default CCARBAR is at 0xff700000

View file

@ -3141,7 +3141,6 @@ CONFIG_MPC83XX_GPIO_1_INIT_VALUE
CONFIG_MPC83XX_PCI2
CONFIG_MPC850
CONFIG_MPC855
CONFIG_MPC8560
CONFIG_MPC8560ADS
CONFIG_MPC8568
CONFIG_MPC8568MDS