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sun50i: a64: Add Olimex A64-Teres-I board initial support
Olimex A64-Teres-I board is a mainboard (the only one so far) for Olimex Teres-I DIY laptop kit. Key features: - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 2GB DDR3 RAM - MicroSD Slot - 16GB eMMC Flash - eDP LCD display - HDMI - USB Host - Battery management - 5V DC power supply - Certified Open Source Hardware (OSHW) Works: - i2C - MMC/SD - PWM backlight Known broken: - Internal keyboard (seems to be because the keyboard firmware loads a bootloader first, and then disconnects bootloader and connect real keyboard). External ones connected to the USB port work fine. This patch enables support for the A64-Teres-I board to u-boot, including enabling screen backlight (lacking from Linux device-tree). Linux commit details about the sun50i-a64-teres-i.dts sync: "arm64: dts: allwinner: a64: Rename uart0_pins_a label to uart0_pb_pins" (sha1: d91ebb95b96c8840932dc3a10c9f243712555467) Cosmetic warnings regarding whitespace and placement of SPDX notice for dts file was ignored. config and .dtsi file are adapted from pinebook files. Tested-by: Jonas Smedegaard <dr@jones.dk> Signed-off-by: Jonas Smedegaard <dr@jones.dk> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> [jagan: move board entry in MAINTAINERS file at proper position] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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5 changed files with 341 additions and 1 deletions
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@ -484,7 +484,8 @@ dtb-$(CONFIG_MACH_SUN50I) += \
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sun50i-a64-pine64-plus.dtb \
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sun50i-a64-pine64.dtb \
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sun50i-a64-pinebook.dtb \
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sun50i-a64-sopine-baseboard.dtb
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sun50i-a64-sopine-baseboard.dtb \
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sun50i-a64-teres-i.dtb
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dtb-$(CONFIG_MACH_SUN9I) += \
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sun9i-a80-optimus.dtb \
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sun9i-a80-cubieboard4.dtb \
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41
arch/arm/dts/sun50i-a64-teres-i-u-boot.dtsi
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arch/arm/dts/sun50i-a64-teres-i-u-boot.dtsi
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@ -0,0 +1,41 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2019 Vasily Khoruzhick <anarsoul@gmail.com>
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*
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*/
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#include "sunxi-u-boot.dtsi"
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/ {
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vdd_bl: regulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "bl-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
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enable-active-high;
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm 0 50000 0>;
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brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>;
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default-brightness-level = <2>;
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enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
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power-supply = <&vdd_bl>;
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};
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};
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/* The ANX6345 eDP-bridge is on i2c */
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&i2c0 {
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anx6345: edp-bridge@38 {
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compatible = "analogix,anx6345";
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reg = <0x38>;
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reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
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status = "okay";
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};
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};
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&pwm {
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status = "okay";
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};
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270
arch/arm/dts/sun50i-a64-teres-i.dts
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270
arch/arm/dts/sun50i-a64-teres-i.dts
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@ -0,0 +1,270 @@
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/*
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* Copyright (C) Harald Geyer <harald@ccbib.org>
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* based on sun50i-a64-olinuxino.dts by Jagan Teki <jteki@openedev.com>
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*
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* SPDX-License-Identifier: (GPL-2.0 OR MIT)
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*/
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/dts-v1/;
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#include "sun50i-a64.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/pwm/pwm.h>
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/ {
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model = "Olimex A64 Teres-I";
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compatible = "olimex,a64-teres-i", "allwinner,sun50i-a64";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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framebuffer-lcd {
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eDP25-supply = <®_dldo2>;
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eDP12-supply = <®_dldo3>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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lid-switch {
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label = "Lid Switch";
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gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */
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linux,input-type = <EV_SW>;
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linux,code = <SW_LID>;
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wakeup-source;
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};
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};
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leds {
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compatible = "gpio-leds";
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capslock {
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label = "teres-i:green:capslock";
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gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */
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};
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numlock {
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label = "teres-i:green:numlock";
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gpios = <&pio 2 4 GPIO_ACTIVE_HIGH>; /* PC4 */
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};
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};
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reg_usb1_vbus: usb1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb1-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
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status = "okay";
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};
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wifi_pwrseq: wifi_pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
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};
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};
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&ehci1 {
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status = "okay";
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};
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/* The ANX6345 eDP-bridge is on i2c0. There is no linux (mainline)
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* driver for this chip at the moment, the bootloader initializes it.
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* However it can be accessed with the i2c-dev driver from user space.
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*/
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&i2c0 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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};
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>;
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vmmc-supply = <®_dcdc1>;
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
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disable-wp;
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bus-width = <4>;
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status = "okay";
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};
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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vmmc-supply = <®_aldo2>;
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vqmmc-supply = <®_dldo4>;
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mmc-pwrseq = <&wifi_pwrseq>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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rtl8723bs: wifi@1 {
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reg = <1>;
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interrupt-parent = <&r_pio>;
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interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
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interrupt-names = "host-wake";
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};
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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vmmc-supply = <®_dcdc1>;
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vqmmc-supply = <®_dcdc1>;
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bus-width = <8>;
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non-removable;
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cap-mmc-hw-reset;
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status = "okay";
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};
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&ohci1 {
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status = "okay";
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};
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&r_rsb {
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status = "okay";
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axp803: pmic@3a3 {
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compatible = "x-powers,axp803";
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reg = <0x3a3>;
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interrupt-parent = <&r_intc>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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wakeup-source;
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};
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};
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#include "axp803.dtsi"
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®_aldo1 {
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regulator-always-on;
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-name = "vcc-pe";
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};
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®_aldo2 {
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-pl";
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};
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®_aldo3 {
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regulator-always-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "vcc-pll-avcc";
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};
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®_dcdc1 {
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-3v3";
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};
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®_dcdc2 {
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regulator-always-on;
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regulator-min-microvolt = <1040000>;
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regulator-max-microvolt = <1300000>;
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regulator-name = "vdd-cpux";
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};
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/* DCDC3 is polyphased with DCDC2 */
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®_dcdc5 {
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regulator-always-on;
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-name = "vcc-ddr3";
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};
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®_dcdc6 {
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regulator-always-on;
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-sys";
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};
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®_dldo1 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-hdmi";
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};
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®_dldo2 {
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-name = "vcc-pd";
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};
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®_dldo3 {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-name = "vdd-edp";
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};
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®_dldo4 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc-wifi-io";
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};
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®_eldo1 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "cpvdd";
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};
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®_eldo2 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc-dvdd-csi";
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};
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®_fldo1 {
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-name = "vcc-1v2-hsic";
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};
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/*
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* The A64 chip cannot work without this regulator off, although
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* it seems to be only driving the AR100 core.
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* Maybe we don't still know well about CPUs domain.
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*/
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®_fldo2 {
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regulator-always-on;
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-cpus";
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};
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®_rtc_ldo {
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regulator-name = "vcc-rtc";
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};
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&simplefb_hdmi {
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vcc-hdmi-supply = <®_dldo1>;
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pb_pins>;
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status = "okay";
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};
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&usbphy {
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usb1_vbus-supply = <®_usb1_vbus>;
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status = "okay";
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};
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@ -358,6 +358,12 @@ S: Maintained
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F: configs/A20-Olimex-SOM204-EVB_defconfig
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F: configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
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OLIMEX TERES-I BOARD
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M: Jonas Smedegaard <dr@jones.dk>
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M: Icenowy Zheng <icenowy@aosc.io>
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S: Maintained
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F: configs/teres_i_defconfig
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ORANGEPI LITE2 BOARD
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M: Jagan Teki <jagan@amarulasolutions.com>
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S: Maintained
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22
configs/teres_i_defconfig
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22
configs/teres_i_defconfig
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CONFIG_ARM=y
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CONFIG_ARCH_SUNXI=y
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CONFIG_SPL=y
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CONFIG_MACH_SUN50I=y
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CONFIG_DRAM_CLK=552
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CONFIG_DRAM_ZQ=3881949
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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CONFIG_USB1_VBUS_PIN="PL7"
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CONFIG_I2C0_ENABLE=y
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# CONFIG_CMD_FLASH is not set
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# CONFIG_SPL_DOS_PARTITION is not set
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-teres-i"
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_PWM=y
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CONFIG_PWM_SUNXI=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
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# CONFIG_USB_GADGET is not set
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CONFIG_VIDEO_BRIDGE=y
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CONFIG_VIDEO_BRIDGE_ANALOGIX_ANX6345=y
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