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arm: arm64 32bit address relocation
Current relocation code is limited to 21bit PC-relative addressing which might not be enough for bigger code sizes. The following patch increases the addressing to 32bit PC-relative. This feature is specially interesting if U-Boot is build without optimiation (-O0) as the text section is increased significativelly. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
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1 changed files with 12 additions and 7 deletions
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@ -26,9 +26,10 @@ ENTRY(relocate_code)
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/*
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* Copy u-boot from flash to RAM
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*/
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adr x1, __image_copy_start /* x1 <- Run &__image_copy_start */
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subs x9, x0, x1 /* x8 <- Run to copy offset */
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b.eq relocate_done /* skip relocation */
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adrp x1, __image_copy_start /* x1 <- address bits [31:12] */
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add x1, x1, :lo12:__image_copy_start/* x1 <- address bits [11:00] */
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subs x9, x0, x1 /* x9 <- Run to copy offset */
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b.eq relocate_done /* skip relocation */
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/*
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* Don't ldr x1, __image_copy_start here, since if the code is already
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* running at an address other than it was linked to, that instruction
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@ -42,8 +43,10 @@ ENTRY(relocate_code)
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ldr x1, _TEXT_BASE /* x1 <- Linked &__image_copy_start */
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subs x9, x0, x1 /* x9 <- Link to copy offset */
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adr x1, __image_copy_start /* x1 <- Run &__image_copy_start */
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adr x2, __image_copy_end /* x2 <- Run &__image_copy_end */
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adrp x1, __image_copy_start /* x1 <- address bits [31:12] */
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add x1, x1, :lo12:__image_copy_start/* x1 <- address bits [11:00] */
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adrp x2, __image_copy_end /* x2 <- address bits [31:12] */
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add x2, x2, :lo12:__image_copy_end /* x2 <- address bits [11:00] */
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copy_loop:
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ldp x10, x11, [x1], #16 /* copy from source address [x1] */
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stp x10, x11, [x0], #16 /* copy to target address [x0] */
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@ -54,8 +57,10 @@ copy_loop:
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/*
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* Fix .rela.dyn relocations
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*/
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adr x2, __rel_dyn_start /* x2 <- Run &__rel_dyn_start */
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adr x3, __rel_dyn_end /* x3 <- Run &__rel_dyn_end */
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adrp x2, __rel_dyn_start /* x2 <- address bits [31:12] */
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add x2, x2, :lo12:__rel_dyn_start /* x2 <- address bits [11:00] */
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adrp x3, __rel_dyn_end /* x3 <- address bits [31:12] */
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add x3, x3, :lo12:__rel_dyn_end /* x3 <- address bits [11:00] */
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fixloop:
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ldp x0, x1, [x2], #16 /* (x0,x1) <- (SRC location, fixup) */
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ldr x4, [x2], #8 /* x4 <- addend */
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