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PPC: Enable Job ring driver model.

Browse source 
removed sec_init() call from board files.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Gaurav Jain 2022-03-24 11:50:37 +05:30 committed by Stefano Babic
parent 5e2ff13357
commit 98281e6d49
41 changed files with 73 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

19
arch/powerpc/cpu/mpc85xx/cpu_init.c
View file

@ -56,6 +56,7 @@
#ifdef CONFIG_U_QE #ifdef CONFIG_U_QE
#include <fsl_qe.h> #include <fsl_qe.h>
#endif #endif
#include <dm.h>
#ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK #ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
/* /*
@ -902,8 +903,6 @@ int cpu_init_r(void)
#endif #endif
#ifdef CONFIG_FSL_CAAM #ifdef CONFIG_FSL_CAAM
sec_init();
#if defined(CONFIG_ARCH_C29X) #if defined(CONFIG_ARCH_C29X)
if ((SVR_SOC_VER(svr) == SVR_C292) || if ((SVR_SOC_VER(svr) == SVR_C292) ||
(SVR_SOC_VER(svr) == SVR_C293)) (SVR_SOC_VER(svr) == SVR_C293))
@ -942,6 +941,22 @@ int cpu_init_r(void)
return 0; return 0;
} }
#ifdef CONFIG_ARCH_MISC_INIT
int arch_misc_init(void)
{
if (IS_ENABLED(CONFIG_FSL_CAAM)) {
struct udevice *dev;
int ret;
ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev);
if (ret)
printf("Failed to initialize %s: %d\n", dev->name, ret);
}
return 0;
}
#endif
void arch_preboot_os(void) void arch_preboot_os(void)
{ {
u32 msr; u32 msr;

17
arch/powerpc/include/asm/u-boot-ppc.h Normal file
View file

@ -0,0 +1,17 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2021 NXP
*
* Gaurav Jain <gaurav.jain@nxp.com>
*/
#ifndef _U_BOOT_PPC_H_
#define _U_BOOT_PPC_H_
#ifndef __ASSEMBLY__
int arch_misc_init(void);
#endif /* __ASSEMBLY__ */
#endif /* _U_BOOT_PPC_H_ */

1
arch/powerpc/include/asm/u-boot.h
View file

@ -21,5 +21,6 @@
/* Use the generic board which requires a unified bd_info */ /* Use the generic board which requires a unified bd_info */
#include <asm-generic/u-boot.h> #include <asm-generic/u-boot.h>
#include <asm/ppc.h> #include <asm/ppc.h>
#include <asm/u-boot-ppc.h>
#endif /* __U_BOOT_H__ */ #endif /* __U_BOOT_H__ */

1
configs/P2041RDB_NAND_defconfig
View file

@ -46,6 +46,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xFFA00C21 CONFIG_SYS_BR0_PRELIM=0xFFA00C21
CONFIG_SYS_OR0_PRELIM=0xFFFC0796 CONFIG_SYS_OR0_PRELIM=0xFFFC0796

1
configs/P2041RDB_SDCARD_defconfig
View file

@ -46,6 +46,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xE8001001 CONFIG_SYS_BR0_PRELIM=0xE8001001
CONFIG_SYS_OR0_PRELIM=0xF8000F85 CONFIG_SYS_OR0_PRELIM=0xF8000F85

1
configs/P2041RDB_SPIFLASH_defconfig
View file

@ -48,6 +48,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xE8001001 CONFIG_SYS_BR0_PRELIM=0xE8001001
CONFIG_SYS_OR0_PRELIM=0xF8000F85 CONFIG_SYS_OR0_PRELIM=0xF8000F85

1
configs/P2041RDB_defconfig
View file

@ -43,6 +43,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xE8001001 CONFIG_SYS_BR0_PRELIM=0xE8001001
CONFIG_SYS_OR0_PRELIM=0xF8000F85 CONFIG_SYS_OR0_PRELIM=0xF8000F85

1
configs/P3041DS_NAND_defconfig
View file

@ -44,6 +44,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y

1
configs/P3041DS_SDCARD_defconfig
View file

@ -44,6 +44,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y

1
configs/P3041DS_SPIFLASH_defconfig
View file

@ -46,6 +46,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y

1
configs/P3041DS_defconfig
View file

@ -41,6 +41,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y

1
configs/P4080DS_SDCARD_defconfig
View file

@ -43,6 +43,7 @@ CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y

1
configs/P4080DS_SPIFLASH_defconfig
View file

@ -45,6 +45,7 @@ CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y

1
configs/P4080DS_defconfig
View file

@ -40,6 +40,7 @@ CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y

1
configs/P5040DS_NAND_defconfig
View file

@ -45,6 +45,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y

1
configs/P5040DS_SDCARD_defconfig
View file

@ -44,6 +44,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y

1
configs/P5040DS_SPIFLASH_defconfig
View file

@ -46,6 +46,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y

1
configs/P5040DS_defconfig
View file

@ -41,6 +41,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM_BOOL=y

1
configs/T1024RDB_NAND_defconfig
View file

@ -67,6 +67,7 @@ CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_ETHPRIME="FM1@DTSEC4"
CONFIG_DM=y CONFIG_DM=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_FSL_DDR3=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/T1024RDB_SDCARD_defconfig
View file

@ -65,6 +65,7 @@ CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_ETHPRIME="FM1@DTSEC4"
CONFIG_DM=y CONFIG_DM=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_FSL_DDR3=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/T1024RDB_SPIFLASH_defconfig
View file

@ -68,6 +68,7 @@ CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_ETHPRIME="FM1@DTSEC4"
CONFIG_DM=y CONFIG_DM=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_FSL_DDR3=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/T1024RDB_defconfig
View file

@ -51,6 +51,7 @@ CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_ETHPRIME="FM1@DTSEC4"
CONFIG_DM=y CONFIG_DM=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_FSL_DDR3=y
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/T1042D4RDB_NAND_defconfig
View file

@ -58,6 +58,7 @@ CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_ETHPRIME="FM1@DTSEC4"
CONFIG_DM=y CONFIG_DM=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=66666666 CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y

1
configs/T1042D4RDB_SDCARD_defconfig
View file

@ -56,6 +56,7 @@ CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_ETHPRIME="FM1@DTSEC4"
CONFIG_DM=y CONFIG_DM=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=66666666 CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y

1
configs/T1042D4RDB_SPIFLASH_defconfig
View file

@ -59,6 +59,7 @@ CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_ETHPRIME="FM1@DTSEC4"
CONFIG_DM=y CONFIG_DM=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=66666666 CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y

1
configs/T1042D4RDB_defconfig
View file

@ -42,6 +42,7 @@ CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_ETHPRIME="FM1@DTSEC4"
CONFIG_DM=y CONFIG_DM=y
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=66666666 CONFIG_DDR_CLK_FREQ=66666666
CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_CHIP_SELECTS_PER_CTRL=2
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y

1
configs/T2080QDS_NAND_defconfig
View file

@ -64,6 +64,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DIMM_SLOTS_PER_CTLR=2 CONFIG_DIMM_SLOTS_PER_CTLR=2
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y

1
configs/T2080QDS_SDCARD_defconfig
View file

@ -62,6 +62,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DIMM_SLOTS_PER_CTLR=2 CONFIG_DIMM_SLOTS_PER_CTLR=2
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y

1
configs/T2080QDS_SPIFLASH_defconfig
View file

@ -65,6 +65,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DIMM_SLOTS_PER_CTLR=2 CONFIG_DIMM_SLOTS_PER_CTLR=2
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y

1
configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
View file

@ -45,6 +45,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DIMM_SLOTS_PER_CTLR=2 CONFIG_DIMM_SLOTS_PER_CTLR=2
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y

1
configs/T2080QDS_defconfig
View file

@ -48,6 +48,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DIMM_SLOTS_PER_CTLR=2 CONFIG_DIMM_SLOTS_PER_CTLR=2
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y

1
configs/T2080RDB_NAND_defconfig
View file

@ -66,6 +66,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=133330000 CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/T2080RDB_SDCARD_defconfig
View file

@ -64,6 +64,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=133330000 CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/T2080RDB_SPIFLASH_defconfig
View file

@ -67,6 +67,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=133330000 CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/T2080RDB_defconfig
View file

@ -50,6 +50,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=133330000 CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/T2080RDB_revD_NAND_defconfig
View file

@ -67,6 +67,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=133330000 CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/T2080RDB_revD_SDCARD_defconfig
View file

@ -65,6 +65,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=133330000 CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/T2080RDB_revD_SPIFLASH_defconfig
View file

@ -68,6 +68,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=133330000 CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/T2080RDB_revD_defconfig
View file

@ -51,6 +51,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=133330000 CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/T4240RDB_SDCARD_defconfig
View file

@ -56,6 +56,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=133333333 CONFIG_DDR_CLK_FREQ=133333333
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/T4240RDB_defconfig
View file

@ -42,6 +42,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1"
CONFIG_DM=y CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y CONFIG_FSL_CAAM=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_DDR_CLK_FREQ=133333333 CONFIG_DDR_CLK_FREQ=133333333
CONFIG_DDR_ECC=y CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y