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https://github.com/AsahiLinux/u-boot
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imx: tx25: Convert to iomux-v3
There is no change of behavior, even if some pad control values could probably be simplified. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
This commit is contained in:
parent
1b1c526751
commit
97549cb546
1 changed files with 68 additions and 39 deletions
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@ -27,9 +27,8 @@
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/imx25-pinmux.h>
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#include <asm/arch/iomux-mx25.h>
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#include <asm/gpio.h>
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#include <asm/arch/sys_proto.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -42,36 +41,44 @@ void board_init_f(ulong bootflag)
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#endif
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#ifdef CONFIG_FEC_MXC
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/*
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* FIXME: need to revisit this
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* The original code enabled PUE and 100-k pull-down without PKE, so the right
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* value here is likely:
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* 0 for no pull
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* or:
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* PAD_CTL_PUS_100K_DOWN for 100-k pull-down
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*/
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#define FEC_OUT_PAD_CTRL 0
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#define GPIO_FEC_RESET_B IMX_GPIO_NR(4, 7)
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#define GPIO_FEC_ENABLE_B IMX_GPIO_NR(4, 9)
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void tx25_fec_init(void)
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{
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struct iomuxc_mux_ctl *muxctl;
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struct iomuxc_pad_ctl *padctl;
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u32 gpio_mux_mode = MX25_PIN_MUX_MODE(5);
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u32 saved_rdata0_mode, saved_rdata1_mode, saved_rx_dv_mode;
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static const iomux_v3_cfg_t fec_pads[] = {
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MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
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MX25_PAD_FEC_RX_DV__FEC_RX_DV,
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MX25_PAD_FEC_RDATA0__FEC_RDATA0,
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NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
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MX25_PAD_FEC_MDIO__FEC_MDIO,
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MX25_PAD_FEC_RDATA1__FEC_RDATA1,
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NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_D13__GPIO_4_7, 0), /* FEC_RESET_B */
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NEW_PAD_CTRL(MX25_PAD_D11__GPIO_4_9, 0), /* FEC_ENABLE_B */
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};
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static const iomux_v3_cfg_t fec_cfg_pads[] = {
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MX25_PAD_FEC_RDATA0__GPIO_3_10,
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MX25_PAD_FEC_RDATA1__GPIO_3_11,
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MX25_PAD_FEC_RX_DV__GPIO_3_12,
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};
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debug("tx25_fec_init\n");
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/*
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* fec pin init is generic
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*/
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mx25_fec_init_pins();
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/*
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* Set up the FEC_RESET_B and FEC_ENABLE GPIO pins.
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*
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* FEC_RESET_B: gpio4[7] is ALT 5 mode of pin D13
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* FEC_ENABLE_B: gpio4[9] is ALT 5 mode of pin D11
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*/
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muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
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padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
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writel(gpio_mux_mode, &muxctl->pad_d13);
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writel(gpio_mux_mode, &muxctl->pad_d11);
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writel(0x0, &padctl->pad_d13);
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writel(0x0, &padctl->pad_d11);
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imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
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/* drop PHY power and assert reset (low) */
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gpio_direction_output(GPIO_FEC_RESET_B, 0);
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@ -99,15 +106,10 @@ void tx25_fec_init(void)
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* RMII mode is selected by FEC_RX_DV which is GPIO 3_12 in mux mode
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*/
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/*
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* save three current mux modes and set each to gpio mode
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* set each mux mode to gpio mode
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*/
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saved_rdata0_mode = readl(&muxctl->pad_fec_rdata0);
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saved_rdata1_mode = readl(&muxctl->pad_fec_rdata1);
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saved_rx_dv_mode = readl(&muxctl->pad_fec_rx_dv);
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writel(gpio_mux_mode, &muxctl->pad_fec_rdata0);
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writel(gpio_mux_mode, &muxctl->pad_fec_rdata1);
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writel(gpio_mux_mode, &muxctl->pad_fec_rx_dv);
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imx_iomux_v3_setup_multiple_pads(fec_cfg_pads,
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ARRAY_SIZE(fec_cfg_pads));
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/*
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* set each to 1 and make each an output
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@ -128,19 +130,46 @@ void tx25_fec_init(void)
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/*
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* set FEC pins back
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*/
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writel(saved_rdata0_mode, &muxctl->pad_fec_rdata0);
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writel(saved_rdata1_mode, &muxctl->pad_fec_rdata1);
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writel(saved_rx_dv_mode, &muxctl->pad_fec_rx_dv);
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imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
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}
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#else
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#define tx25_fec_init()
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#endif
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#ifdef CONFIG_MXC_UART
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/*
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* Set up input pins with hysteresis and 100-k pull-ups
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*/
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#define UART1_IN_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP)
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/*
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* FIXME: need to revisit this
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* The original code enabled PUE and 100-k pull-down without PKE, so the right
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* value here is likely:
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* 0 for no pull
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* or:
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* PAD_CTL_PUS_100K_DOWN for 100-k pull-down
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*/
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#define UART1_OUT_PAD_CTRL 0
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static void tx25_uart1_init(void)
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{
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static const iomux_v3_cfg_t uart1_pads[] = {
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NEW_PAD_CTRL(MX25_PAD_UART1_RXD__UART1_RXD, UART1_IN_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_UART1_TXD__UART1_TXD, UART1_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_UART1_RTS__UART1_RTS, UART1_OUT_PAD_CTRL),
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NEW_PAD_CTRL(MX25_PAD_UART1_CTS__UART1_CTS, UART1_IN_PAD_CTRL),
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};
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imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
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}
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#else
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#define tx25_uart1_init()
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#endif
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int board_init()
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{
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#ifdef CONFIG_MXC_UART
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mx25_uart1_init_pins();
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#endif
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tx25_uart1_init();
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/* board id for linux */
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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return 0;
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