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powerpc/t4240qds: Update IFC timing for NOR flash

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Relax parameters to give address latching more time to setup.
Tighten parameters to make it overall faster.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
York Sun 2012-12-19 17:23:05 +00:00 committed by Andy Fleming
parent 9427ba5c27
commit 9730b7bc11
1 changed files with 5 additions and 5 deletions
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10
include/configs/t4qds.h
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@ -213,14 +213,14 @@ unsigned long get_board_ddr_clk(void);
/* NOR Flash Timing Params */ /* NOR Flash Timing Params */
#define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80 #define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80
#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x01) | \ #define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \
FTIM0_NOR_TEADC(0x01) | \ FTIM0_NOR_TEADC(0x5) | \
FTIM0_NOR_TEAHC(0x20)) FTIM0_NOR_TEAHC(0x5))
#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \ #define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \
FTIM1_NOR_TRAD_NOR(0x1A) |\ FTIM1_NOR_TRAD_NOR(0x1A) |\
FTIM1_NOR_TSEQRAD_NOR(0x13)) FTIM1_NOR_TSEQRAD_NOR(0x13))
#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x01) | \ #define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \
FTIM2_NOR_TCH(0x0E) | \ FTIM2_NOR_TCH(0x4) | \
FTIM2_NOR_TWPH(0x0E) | \ FTIM2_NOR_TWPH(0x0E) | \
FTIM2_NOR_TWP(0x1c)) FTIM2_NOR_TWP(0x1c))
#define CONFIG_SYS_NOR_FTIM3 0x0 #define CONFIG_SYS_NOR_FTIM3 0x0