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musb: sunxi: Add fifo config
Unlike other Allwinner SOC's H3/H5/V3s OTG support 4 endpoints with relevant fifo configs, rest all have 5 endpoints. So add the fifo configs and defer them based on driver_data. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
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parent
98424b7031
commit
97202dd6ec
1 changed files with 65 additions and 5 deletions
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@ -75,9 +75,14 @@
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* From usbc/usbc.c
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******************************************************************************/
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struct sunxi_musb_config {
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struct musb_hdrc_config *config;
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};
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struct sunxi_glue {
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struct musb_host_data mdata;
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struct sunxi_ccm_reg *ccm;
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struct sunxi_musb_config *cfg;
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struct device dev;
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};
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#define to_sunxi_glue(d) container_of(d, struct sunxi_glue, dev)
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@ -300,13 +305,52 @@ static const struct musb_platform_ops sunxi_musb_ops = {
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#define SUNXI_MUSB_MAX_EP_NUM 6
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#define SUNXI_MUSB_RAM_BITS 11
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static struct musb_fifo_cfg sunxi_musb_mode_cfg[] = {
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MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
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MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
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MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
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MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
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MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
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MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
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MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
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MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
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MUSB_EP_FIFO_SINGLE(5, FIFO_TX, 512),
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MUSB_EP_FIFO_SINGLE(5, FIFO_RX, 512),
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};
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/* H3/V3s OTG supports only 4 endpoints */
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#define SUNXI_MUSB_MAX_EP_NUM_H3 5
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static struct musb_fifo_cfg sunxi_musb_mode_cfg_h3[] = {
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MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
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MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
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MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
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MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
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MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
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MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
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MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
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MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
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};
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static struct musb_hdrc_config musb_config = {
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.fifo_cfg = sunxi_musb_mode_cfg,
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.fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg),
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.multipoint = true,
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.dyn_fifo = true,
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.num_eps = SUNXI_MUSB_MAX_EP_NUM,
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.ram_bits = SUNXI_MUSB_RAM_BITS,
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};
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static struct musb_hdrc_config musb_config_h3 = {
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.fifo_cfg = sunxi_musb_mode_cfg_h3,
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.fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg_h3),
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.multipoint = true,
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.dyn_fifo = true,
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.soft_con = true,
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.num_eps = SUNXI_MUSB_MAX_EP_NUM_H3,
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.ram_bits = SUNXI_MUSB_RAM_BITS,
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};
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static int musb_usb_probe(struct udevice *dev)
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{
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struct sunxi_glue *glue = dev_get_priv(dev);
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@ -319,6 +363,10 @@ static int musb_usb_probe(struct udevice *dev)
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if (!base)
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return -EINVAL;
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glue->cfg = (struct sunxi_musb_config *)dev_get_driver_data(dev);
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if (!glue->cfg)
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return -EINVAL;
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glue->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
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if (IS_ERR(glue->ccm))
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return PTR_ERR(glue->ccm);
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@ -328,7 +376,7 @@ static int musb_usb_probe(struct udevice *dev)
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memset(&pdata, 0, sizeof(pdata));
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pdata.power = 250;
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pdata.platform_ops = &sunxi_musb_ops;
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pdata.config = &musb_config;
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pdata.config = glue->cfg->config;
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#ifdef CONFIG_USB_MUSB_HOST
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pdata.mode = MUSB_HOST;
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@ -368,11 +416,23 @@ static int musb_usb_remove(struct udevice *dev)
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return 0;
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}
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static const struct sunxi_musb_config sun4i_a10_cfg = {
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.config = &musb_config,
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};
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static const struct sunxi_musb_config sun8i_h3_cfg = {
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.config = &musb_config_h3,
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};
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static const struct udevice_id sunxi_musb_ids[] = {
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{ .compatible = "allwinner,sun4i-a10-musb" },
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{ .compatible = "allwinner,sun6i-a31-musb" },
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{ .compatible = "allwinner,sun8i-a33-musb" },
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{ .compatible = "allwinner,sun8i-h3-musb" },
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{ .compatible = "allwinner,sun4i-a10-musb",
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.data = (ulong)&sun4i_a10_cfg },
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{ .compatible = "allwinner,sun6i-a31-musb",
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.data = (ulong)&sun4i_a10_cfg },
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{ .compatible = "allwinner,sun8i-a33-musb",
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.data = (ulong)&sun4i_a10_cfg },
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{ .compatible = "allwinner,sun8i-h3-musb",
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.data = (ulong)&sun8i_h3_cfg },
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{ }
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};
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