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tegra: define CONFIG_SYS_CACHELINE_SIZE for tegra
Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Tom Warren <twarren.nvidia@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Change-Id: I5c4bcfc0bfe59158ff249fe3be6640eec6d3cc76 Acked-by: Mike Frysinger <vapier@gentoo.org>
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#define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */
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#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
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#define CONFIG_SYS_CACHELINE_SIZE 32
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#define CONFIG_ENABLE_CORTEXA9 /* enable CPU (A9 complex) */
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#include <asm/arch/tegra2.h> /* get chip and board defs */
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