mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-25 06:00:43 +00:00
Merge branch '2023-10-11-assorted-fixes-and-updates'
- Assorted TI K3 updates, use ".dtso" for device tree overlays to match general usage, mkimage fixes/improvements, assorted platform updates/fixes, other assorted driver/platform fixes.
This commit is contained in:
Tom Rini
commit
9598cf43f9
72 changed files with 724 additions and 543 deletions
|
|
@ -1548,7 +1548,6 @@ F: arch/arm/mach-omap2/omap5/sec_entry_cpu1.S
|
|||
F: arch/arm/mach-omap2/sec-common.c
|
||||
F: arch/arm/mach-omap2/config_secure.mk
|
||||
F: arch/arm/mach-k3/security.c
|
||||
F: arch/arm/mach-k3/config_secure.mk
|
||||
F: configs/am335x_hs_evm_defconfig
|
||||
F: configs/am335x_hs_evm_uart_defconfig
|
||||
F: configs/am43xx_hs_evm_defconfig
|
||||
|
|
@ -1561,8 +1560,6 @@ F: configs/k2hk_hs_evm_defconfig
|
|||
F: configs/k2e_hs_evm_defconfig
|
||||
F: configs/k2g_hs_evm_defconfig
|
||||
F: configs/k2l_hs_evm_defconfig
|
||||
F: configs/am65x_hs_evm_r5_defconfig
|
||||
F: configs/am65x_hs_evm_a53_defconfig
|
||||
|
||||
TPM DRIVERS
|
||||
M: Ilias Apalodimas <ilias.apalodimas@linaro.org>
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -2447,7 +2447,7 @@ cmd_genenv = \
|
|||
sed -e '/^\s*$$/d' | \
|
||||
sort -t '=' -k 1,1 -s -o $@
|
||||
|
||||
u-boot-initial-env: $(env_h) FORCE
|
||||
u-boot-initial-env: scripts_basic $(env_h) FORCE
|
||||
$(Q)$(MAKE) $(build)=tools $(objtree)/tools/printinitialenv
|
||||
$(call if_changed,genenv)
|
||||
|
||||
|
|
|
|||
|
|
@ -787,6 +787,7 @@ config ARCH_K3
|
|||
select FIT
|
||||
select REGEX
|
||||
select FIT_SIGNATURE if ARM64
|
||||
imply TI_SECURE_DEVICE
|
||||
|
||||
config ARCH_OMAP2PLUS
|
||||
bool "TI OMAP2+"
|
||||
|
|
|
|||
|
|
@ -58,6 +58,16 @@ config ARMV7_SECURE_MAX_SIZE
|
|||
default 0x3c00 if MACH_SUN8I && MACH_SUN8I_H3
|
||||
default 0x10000
|
||||
|
||||
config ARM_GIC_BASE_ADDRESS
|
||||
hex
|
||||
depends on ARMV7_NONSEC
|
||||
depends on ARCH_EXYNOS5
|
||||
default 0x10480000 if ARCH_EXYNOS5
|
||||
help
|
||||
Override the GIC base address if the Arm Cortex defined
|
||||
CBAR/PERIPHBASE system register holds the wrong value.
|
||||
Used by the PSCI code to configure the secure side of the GIC.
|
||||
|
||||
config ARMV7_VIRT
|
||||
bool "Enable support for hardware virtualization" if EXPERT
|
||||
depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
|
||||
|
|
|
|||
|
|
@ -112,8 +112,8 @@ ENTRY(_do_nonsec_entry)
|
|||
ENDPROC(_do_nonsec_entry)
|
||||
|
||||
.macro get_cbar_addr addr
|
||||
#ifdef CFG_ARM_GIC_BASE_ADDRESS
|
||||
ldr \addr, =CFG_ARM_GIC_BASE_ADDRESS
|
||||
#ifdef CONFIG_ARM_GIC_BASE_ADDRESS
|
||||
ldr \addr, =CONFIG_ARM_GIC_BASE_ADDRESS
|
||||
#else
|
||||
mrc p15, 4, \addr, c15, c0, 0 @ read CBAR
|
||||
bfc \addr, #0, #15 @ clear reserved bits
|
||||
|
|
|
|||
|
|
@ -26,8 +26,8 @@ static unsigned int read_id_pfr1(void)
|
|||
|
||||
static unsigned long get_gicd_base_address(void)
|
||||
{
|
||||
#ifdef CFG_ARM_GIC_BASE_ADDRESS
|
||||
return CFG_ARM_GIC_BASE_ADDRESS + GIC_DIST_OFFSET;
|
||||
#ifdef CONFIG_ARM_GIC_BASE_ADDRESS
|
||||
return CONFIG_ARM_GIC_BASE_ADDRESS + GIC_DIST_OFFSET;
|
||||
#else
|
||||
unsigned periphbase;
|
||||
|
||||
|
|
|
|||
|
|
@ -17,49 +17,49 @@
|
|||
};
|
||||
|
||||
memory@80000000 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&cbass_main {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
|
||||
timer@2400000 {
|
||||
clock-frequency = <25000000>;
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&cbass_mcu {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cbass_wakeup {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&chipid {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cpsw3g {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cpsw3g_phy0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cpsw3g_phy1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cpsw_port1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cpsw_port2 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
/* MDIO, shared by Verdin ETH_1 (On-module PHY) and Verdin ETH_2_RGMII */
|
||||
|
|
@ -67,40 +67,40 @@
|
|||
/delete-property/ assigned-clocks;
|
||||
/delete-property/ assigned-clock-parents;
|
||||
/delete-property/ assigned-clock-rates;
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&dmsc {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
|
||||
k3_sysreset: sysreset-controller {
|
||||
compatible = "ti,sci-sysreset";
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&dmss {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&fss {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&k3_clks {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&k3_pds {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&k3_reset {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
/* On-module I2C - PMIC_I2C */
|
||||
|
|
@ -130,53 +130,53 @@
|
|||
};
|
||||
|
||||
&main_pmx0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
/* Verdin UART_3, used as the Linux console */
|
||||
&main_uart0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
/* Verdin UART_1 */
|
||||
&main_uart1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&mcu_pmx0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&pinctrl_ctrl_sleep_moci {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&pinctrl_i2c0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&pinctrl_i2c1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&pinctrl_sdhci0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&pinctrl_uart0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&pinctrl_uart1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&pinctrl_wkup_uart0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&sdhci2 {
|
||||
|
|
@ -184,18 +184,18 @@
|
|||
};
|
||||
|
||||
&secure_proxy_main {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&verdin_ctrl_sleep_moci {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&wkup_conf {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
/* Verdin UART_2 */
|
||||
&wkup_uart0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -15,18 +15,18 @@
|
|||
};
|
||||
|
||||
leds {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
status-led-red {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
status-led-green {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cbass_mcu {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
|
||||
mcu_navss: bus@28380000 {
|
||||
ringacc@2b800000 {
|
||||
|
|
@ -53,70 +53,70 @@
|
|||
};
|
||||
|
||||
&cbass_wakeup {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cbass_main {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
main_navss: bus@30800000 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_pmx0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
mcu-fss0-ospi0-pins-default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
main-uart1-pins-default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&main_uart1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
&wkup_gpio0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&ospi0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
flash@0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&secure_proxy_main {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&dmsc {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
k3_sysreset: sysreset-controller {
|
||||
compatible = "ti,sci-sysreset";
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&k3_pds {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&k3_clks {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&k3_reset {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&fss {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -6,27 +6,27 @@
|
|||
#include "k3-j721e-binman.dtsi"
|
||||
|
||||
&cbass_main {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_navss {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cbass_mcu_wakeup {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
|
||||
chipid@43000014 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_navss {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&mcu_ringacc {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&mcu_udmap {
|
||||
|
|
@ -38,144 +38,144 @@
|
|||
<0x0 0x28400000 0x0 0x2000>;
|
||||
reg-names = "gcfg", "rchan", "rchanrt", "tchan",
|
||||
"tchanrt", "rflow";
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&secure_proxy_main {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&dmsc {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
k3_sysreset: sysreset-controller {
|
||||
compatible = "ti,sci-sysreset";
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&k3_pds {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&k3_clks {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&k3_reset {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&wkup_pmx0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_uart0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&mcu_uart0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_sdhci0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_sdhci1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_uart0_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_usbss0_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&usbss0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "peripheral";
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_mmc1_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&wkup_i2c0_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&wkup_uart0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wkup_i2c0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_i2c0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_i2c0_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_esm {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&exp2 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&mcu_fss0_ospi0_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&fss {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&wkup_gpio0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&ospi0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
|
||||
flash@0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&ospi1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
|
||||
flash@0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_fss0_hpb0_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&wkup_gpio_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&mcu_fss0_ospi1_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -6,27 +6,27 @@
|
|||
#include "k3-j721e-binman.dtsi"
|
||||
|
||||
&cbass_main {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_navss {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cbass_mcu_wakeup {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
|
||||
chipid@43000014 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_navss {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&mcu_ringacc {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&mcu_udmap {
|
||||
|
|
@ -38,120 +38,120 @@
|
|||
<0x0 0x28400000 0x0 0x2000>;
|
||||
reg-names = "gcfg", "rchan", "rchanrt", "tchan",
|
||||
"tchanrt", "rflow";
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&secure_proxy_main {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&dmsc {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
k3_sysreset: sysreset-controller {
|
||||
compatible = "ti,sci-sysreset";
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&k3_pds {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&k3_clks {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&k3_reset {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&wkup_pmx0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_uart0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&mcu_uart0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_sdhci1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_uart0_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_usbss0_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&usbss0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "host";
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_usbss1_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&usbss1 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_mmc1_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&wkup_i2c0_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&wkup_i2c0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&wkup_uart0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_fss0_ospi0_pins_default {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&fss {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_esm {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&ospi0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
|
||||
flash@0 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
|
||||
partition@3fc0000 {
|
||||
bootph-pre-ram;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -84,6 +84,7 @@
|
|||
#define HCR_EL2_HCD_DIS (1 << 29) /* Hypervisor Call disabled */
|
||||
#define HCR_EL2_AMO_EL2 (1 << 5) /* Route SErrors to EL2 */
|
||||
|
||||
#define ID_AA64ISAR0_EL1_RNDR (0xFUL << 60) /* RNDR random registers */
|
||||
/*
|
||||
* ID_AA64ISAR1_EL1 bits definitions
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -444,6 +444,187 @@ static struct mm_region t6020_mem_map[] = {
|
|||
}
|
||||
};
|
||||
|
||||
/* Apple M2 Ultra */
|
||||
|
||||
static struct mm_region t6022_mem_map[] = {
|
||||
{
|
||||
/* I/O */
|
||||
.virt = 0x280000000,
|
||||
.phys = 0x280000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0x340000000,
|
||||
.phys = 0x340000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0x380000000,
|
||||
.phys = 0x380000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0x580000000,
|
||||
.phys = 0x580000000,
|
||||
.size = SZ_512M,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* PCIE */
|
||||
.virt = 0x5a0000000,
|
||||
.phys = 0x5a0000000,
|
||||
.size = SZ_512M,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
|
||||
PTE_BLOCK_INNER_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* PCIE */
|
||||
.virt = 0x5c0000000,
|
||||
.phys = 0x5c0000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
|
||||
PTE_BLOCK_INNER_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0x700000000,
|
||||
.phys = 0x700000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0xb00000000,
|
||||
.phys = 0xb00000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0xf00000000,
|
||||
.phys = 0xf00000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0x1300000000,
|
||||
.phys = 0x1300000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0x2280000000,
|
||||
.phys = 0x2280000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0x2340000000,
|
||||
.phys = 0x2340000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0x2380000000,
|
||||
.phys = 0x2380000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0x2580000000,
|
||||
.phys = 0x2580000000,
|
||||
.size = SZ_512M,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* PCIE */
|
||||
.virt = 0x25a0000000,
|
||||
.phys = 0x25a0000000,
|
||||
.size = SZ_512M,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
|
||||
PTE_BLOCK_INNER_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* PCIE */
|
||||
.virt = 0x25c0000000,
|
||||
.phys = 0x25c0000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
|
||||
PTE_BLOCK_INNER_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0x2700000000,
|
||||
.phys = 0x2700000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0x2b00000000,
|
||||
.phys = 0x2b00000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0x2f00000000,
|
||||
.phys = 0x2f00000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* I/O */
|
||||
.virt = 0x3300000000,
|
||||
.phys = 0x3300000000,
|
||||
.size = SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
|
||||
PTE_BLOCK_NON_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* RAM */
|
||||
.virt = 0x10000000000,
|
||||
.phys = 0x10000000000,
|
||||
.size = 16UL * SZ_1G,
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
|
||||
PTE_BLOCK_INNER_SHARE
|
||||
}, {
|
||||
/* Framebuffer */
|
||||
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
|
||||
PTE_BLOCK_INNER_SHARE |
|
||||
PTE_BLOCK_PXN | PTE_BLOCK_UXN
|
||||
}, {
|
||||
/* List terminator */
|
||||
0,
|
||||
}
|
||||
};
|
||||
|
||||
struct mm_region *mem_map;
|
||||
|
||||
int board_init(void)
|
||||
|
|
@ -488,6 +669,8 @@ void build_mem_map(void)
|
|||
else if (of_machine_is_compatible("apple,t6020") ||
|
||||
of_machine_is_compatible("apple,t6021"))
|
||||
mem_map = t6020_mem_map;
|
||||
else if (of_machine_is_compatible("apple,t6022"))
|
||||
mem_map = t6022_mem_map;
|
||||
else
|
||||
panic("Unsupported SoC\n");
|
||||
|
||||
|
|
|
|||
|
|
@ -1,44 +0,0 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
#
|
||||
# Copyright (C) 2018 Texas Instruments, Incorporated - http://www.ti.com/
|
||||
# Andrew F. Davis <afd@ti.com>
|
||||
|
||||
quiet_cmd_k3secureimg = SECURE $@
|
||||
ifneq ($(TI_SECURE_DEV_PKG),)
|
||||
ifneq ($(wildcard $(TI_SECURE_DEV_PKG)/scripts/secure-binary-image.sh),)
|
||||
cmd_k3secureimg = $(TI_SECURE_DEV_PKG)/scripts/secure-binary-image.sh \
|
||||
$< $@ \
|
||||
$(if $(KBUILD_VERBOSE:1=), >/dev/null)
|
||||
else
|
||||
cmd_k3secureimg = echo "WARNING:" \
|
||||
"$(TI_SECURE_DEV_PKG)/scripts/secure-binary-image.sh not found." \
|
||||
"$@ was NOT secured!"; cp $< $@
|
||||
endif
|
||||
else
|
||||
cmd_k3secureimg = echo "WARNING: TI_SECURE_DEV_PKG environment" \
|
||||
"variable must be defined for TI secure devices." \
|
||||
"$@ was NOT secured!"; cp $< $@
|
||||
endif
|
||||
|
||||
%.dtb_HS: %.dtb FORCE
|
||||
$(call if_changed,k3secureimg)
|
||||
|
||||
$(obj)/u-boot-spl-nodtb.bin_HS: $(obj)/u-boot-spl-nodtb.bin FORCE
|
||||
$(call if_changed,k3secureimg)
|
||||
|
||||
tispl.bin_HS: $(obj)/u-boot-spl-nodtb.bin_HS $(patsubst %,$(obj)/dts/%.dtb_HS,$(subst ",,$(CONFIG_SPL_OF_LIST))) $(SPL_ITS) FORCE
|
||||
$(call if_changed,mkfitimage)
|
||||
|
||||
MKIMAGEFLAGS_u-boot.img_HS = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
|
||||
-a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
|
||||
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board" -E \
|
||||
$(patsubst %,-b arch/$(ARCH)/dts/%.dtb_HS,$(subst ",,$(CONFIG_OF_LIST)))
|
||||
|
||||
OF_LIST_TARGETS = $(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST)))
|
||||
$(OF_LIST_TARGETS): dtbs
|
||||
|
||||
u-boot-nodtb.bin_HS: u-boot-nodtb.bin FORCE
|
||||
$(call if_changed,k3secureimg)
|
||||
|
||||
u-boot.img_HS: u-boot-nodtb.bin_HS u-boot.img $(patsubst %.dtb,%.dtb_HS,$(OF_LIST_TARGETS)) FORCE
|
||||
$(call if_changed,mkimage)
|
||||
|
|
@ -160,7 +160,7 @@ static bool board_is_sr1(void)
|
|||
struct iot2050_info *info = IOT2050_INFO_DATA;
|
||||
|
||||
return info->magic == IOT2050_INFO_MAGIC &&
|
||||
strstr((char *)info->name, "-PG2") != NULL;
|
||||
strstr((char *)info->name, "-PG2") == NULL;
|
||||
}
|
||||
|
||||
static bool board_is_m2(void)
|
||||
|
|
|
|||
|
|
@ -145,13 +145,27 @@ int dram_init(void)
|
|||
{
|
||||
struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE;
|
||||
struct draminfo_entry *ent = synquacer_draminfo->entry;
|
||||
unsigned long size = 0;
|
||||
int i;
|
||||
|
||||
gd->ram_size = ent[0].size;
|
||||
for (i = 0; i < synquacer_draminfo->nr_regions; i++)
|
||||
size += ent[i].size;
|
||||
|
||||
gd->ram_size = size;
|
||||
gd->ram_base = ent[0].base;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
|
||||
{
|
||||
struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE;
|
||||
struct draminfo_entry *ent = synquacer_draminfo->entry;
|
||||
|
||||
return ent[synquacer_draminfo->nr_regions - 1].base +
|
||||
ent[synquacer_draminfo->nr_regions - 1].size;
|
||||
}
|
||||
|
||||
int dram_init_banksize(void)
|
||||
{
|
||||
struct draminfo *synquacer_draminfo = (void *)SQ_DRAMINFO_BASE;
|
||||
|
|
|
|||
|
|
@ -6,3 +6,4 @@ F: board/xen/xenguest_arm64/
|
|||
F: doc/board/xen/
|
||||
F: include/configs/xenguest_arm64.h
|
||||
F: configs/xenguest_arm64_defconfig
|
||||
F: configs/xenguest_arm64_virtio_defconfig
|
||||
|
|
|
|||
|
|
@ -8,12 +8,15 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <log.h>
|
||||
#include <cpu_func.h>
|
||||
#include <dm.h>
|
||||
#include <errno.h>
|
||||
#include <malloc.h>
|
||||
#include <xen.h>
|
||||
#include <asm/global_data.h>
|
||||
#include <virtio_types.h>
|
||||
#include <virtio.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/armv8/mmu.h>
|
||||
|
|
@ -49,7 +52,14 @@ void *board_fdt_blob_setup(int *err)
|
|||
return (void *)rom_pointer[0];
|
||||
}
|
||||
|
||||
#define MAX_MEM_MAP_REGIONS 5
|
||||
/*
|
||||
* MAX_MEM_MAP_REGIONS should respect to:
|
||||
* 3 Xen related regions
|
||||
* 6 regions for 2 PCI Host bridges
|
||||
* 10 regions for MMIO devices
|
||||
* 2 memory regions
|
||||
*/
|
||||
#define MAX_MEM_MAP_REGIONS 22
|
||||
static struct mm_region xen_mem_map[MAX_MEM_MAP_REGIONS];
|
||||
struct mm_region *mem_map = xen_mem_map;
|
||||
|
||||
|
|
@ -63,6 +73,93 @@ static int get_next_memory_node(const void *blob, int mem)
|
|||
return mem;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_VIRTIO_BLK
|
||||
#ifdef CONFIG_VIRTIO_PCI
|
||||
static void add_pci_mem_map(const void *blob, int *cnt)
|
||||
{
|
||||
struct fdt_resource reg_res;
|
||||
int node = -1, len = 0, cells_per_record = 0, max_regions = 0;
|
||||
int pci_addr_cells = 0, addr_cells = 0, size_cells = 0;
|
||||
|
||||
while ((node = fdt_node_offset_by_prop_value(blob, node, "compatible",
|
||||
"pci-host-ecam-generic",
|
||||
sizeof("pci-host-ecam-generic"))) >= 0) {
|
||||
if ((*cnt) >= MAX_MEM_MAP_REGIONS ||
|
||||
fdt_get_resource(blob, node, "reg", 0, ®_res) < 0)
|
||||
return;
|
||||
|
||||
xen_mem_map[*cnt].virt = reg_res.start;
|
||||
xen_mem_map[*cnt].phys = reg_res.start;
|
||||
xen_mem_map[*cnt].size = fdt_resource_size(®_res);
|
||||
xen_mem_map[*cnt].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) |
|
||||
PTE_BLOCK_INNER_SHARE);
|
||||
(*cnt)++;
|
||||
|
||||
const u32 *prop = fdt_getprop(blob, node, "ranges", &len);
|
||||
|
||||
if (!prop)
|
||||
return;
|
||||
|
||||
pci_addr_cells = fdt_address_cells(blob, node);
|
||||
addr_cells = fdt_address_cells(blob, 0);
|
||||
size_cells = fdt_size_cells(blob, node);
|
||||
|
||||
/* PCI addresses are always 3-cells */
|
||||
len /= sizeof(u32);
|
||||
cells_per_record = pci_addr_cells + addr_cells + size_cells;
|
||||
max_regions = len / cells_per_record + CONFIG_NR_DRAM_BANKS;
|
||||
|
||||
for (int i = 0; i < max_regions; i++, len -= cells_per_record) {
|
||||
u64 pci_addr, addr, size;
|
||||
int space_code;
|
||||
u32 flags;
|
||||
|
||||
if (((*cnt) >= MAX_MEM_MAP_REGIONS) || len < cells_per_record)
|
||||
return;
|
||||
|
||||
flags = fdt32_to_cpu(prop[0]);
|
||||
space_code = (flags >> 24) & 3;
|
||||
pci_addr = fdtdec_get_number(prop + 1, 2);
|
||||
prop += pci_addr_cells;
|
||||
addr = fdtdec_get_number(prop, addr_cells);
|
||||
prop += addr_cells;
|
||||
size = fdtdec_get_number(prop, size_cells);
|
||||
prop += size_cells;
|
||||
|
||||
xen_mem_map[*cnt].virt = addr;
|
||||
xen_mem_map[*cnt].phys = addr;
|
||||
xen_mem_map[*cnt].size = size;
|
||||
xen_mem_map[*cnt].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) |
|
||||
PTE_BLOCK_INNER_SHARE);
|
||||
(*cnt)++;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_VIRTIO_MMIO
|
||||
static void add_mmio_mem_map(const void *blob, int *cnt)
|
||||
{
|
||||
int node = -1;
|
||||
struct fdt_resource reg_res;
|
||||
|
||||
if ((*cnt) >= MAX_MEM_MAP_REGIONS)
|
||||
return;
|
||||
while ((node = fdt_node_offset_by_prop_value(blob, node, "compatible", "virtio,mmio",
|
||||
sizeof("virtio,mmio"))) >= 0) {
|
||||
if (fdt_get_resource(blob, node, "reg", 0, ®_res) < 0)
|
||||
return;
|
||||
xen_mem_map[*cnt].virt = reg_res.start;
|
||||
xen_mem_map[*cnt].phys = reg_res.start;
|
||||
xen_mem_map[*cnt].size = roundup(fdt_resource_size(®_res), PAGE_SIZE);
|
||||
xen_mem_map[*cnt].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) |
|
||||
PTE_BLOCK_INNER_SHARE);
|
||||
(*cnt)++;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
static int setup_mem_map(void)
|
||||
{
|
||||
int i = 0, ret, mem, reg = 0;
|
||||
|
|
@ -72,6 +169,7 @@ static int setup_mem_map(void)
|
|||
phys_addr_t gnttab_base;
|
||||
phys_size_t gnttab_sz;
|
||||
|
||||
memset(xen_mem_map, 0, sizeof(xen_mem_map));
|
||||
/*
|
||||
* Add "magic" region which is used by Xen to provide some essentials
|
||||
* for the guest: we need console and xenstore.
|
||||
|
|
@ -143,6 +241,14 @@ static int setup_mem_map(void)
|
|||
xen_mem_map[i].attrs = (PTE_BLOCK_MEMTYPE(MT_NORMAL) |
|
||||
PTE_BLOCK_INNER_SHARE);
|
||||
}
|
||||
#ifdef CONFIG_VIRTIO_BLK
|
||||
#ifdef CONFIG_VIRTIO_PCI
|
||||
add_pci_mem_map(blob, &i);
|
||||
#endif
|
||||
#ifdef CONFIG_VIRTIO_MMIO
|
||||
add_mmio_mem_map(blob, &i);
|
||||
#endif
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -620,7 +620,7 @@ config EVENT_DYNAMIC
|
|||
bool
|
||||
help
|
||||
Enable this to support adding an event spy at runtime, without adding
|
||||
it to the EVENT_SPY() linker list. This increases code size slightly
|
||||
it to the EVENT_SPY*() linker list. This increases code size slightly
|
||||
but provides more flexibility for boards and subsystems that need it.
|
||||
|
||||
config EVENT_DEBUG
|
||||
|
|
@ -648,7 +648,7 @@ config SPL_EVENT_DYNAMIC
|
|||
depends on SPL_EVENT && EVENT_DYNAMIC
|
||||
help
|
||||
Enable this to support adding an event spy at runtime, without adding
|
||||
it to the EVENT_SPY() linker list. This increases code size slightly
|
||||
it to the EVENT_SPY*() linker list. This increases code size slightly
|
||||
but provides more flexibility for boards and subsystems that need it.
|
||||
|
||||
endif # EVENT
|
||||
|
|
|
|||
|
|
@ -8,14 +8,14 @@
|
|||
* as file malloc-2.6.6.c.
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <log.h>
|
||||
#include <asm/global_data.h>
|
||||
|
||||
#if CONFIG_IS_ENABLED(UNIT_TEST)
|
||||
#define DEBUG
|
||||
#endif
|
||||
|
||||
#include <common.h>
|
||||
#include <log.h>
|
||||
#include <asm/global_data.h>
|
||||
|
||||
#include <malloc.h>
|
||||
#include <asm/io.h>
|
||||
#include <valgrind/memcheck.h>
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x9000
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x08000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x9000
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SKIP_LOWLEVEL_INIT=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_SPL_GPIO=y
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x80000
|
||||
CONFIG_SPL_GPIO=y
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SKIP_LOWLEVEL_INIT=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
|
|
@ -34,7 +35,7 @@ CONFIG_SPL_LOAD_FIT=y
|
|||
CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_OF_SYSTEM_SETUP=y
|
||||
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern"
|
||||
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run boot_rprocs; if test ${boot_fit} -eq 1; then run get_fit_${boot}; run get_overlaystring; run run_fit; else; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern; fi;"
|
||||
CONFIG_LOGLEVEL=7
|
||||
CONFIG_CONSOLE_MUX=y
|
||||
CONFIG_SPL_MAX_SIZE=0x58000
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x55000
|
||||
CONFIG_SPL_GPIO=y
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x55000
|
||||
CONFIG_SPL_GPIO=y
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x55000
|
||||
CONFIG_SPL_GPIO=y
|
||||
|
|
|
|||
|
|
@ -1,158 +0,0 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SKIP_LOWLEVEL_INIT=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_SOC_K3_AM654=y
|
||||
CONFIG_TARGET_AM654_A53_EVM=y
|
||||
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
||||
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_ENV_OFFSET=0x680000
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_SPL_DM_SPI=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board"
|
||||
CONFIG_SPL_TEXT_BASE=0x80080000
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_SPL_MMC=y
|
||||
CONFIG_SPL_SERIAL=y
|
||||
CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x82000000
|
||||
CONFIG_ENV_OFFSET_REDUND=0x6A0000
|
||||
CONFIG_SPL_FS_FAT=y
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI=y
|
||||
# CONFIG_PSCI_RESET is not set
|
||||
CONFIG_PCI=y
|
||||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_OF_SYSTEM_SETUP=y
|
||||
CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_fit_${boot}; run get_overlaystring; run run_fit"
|
||||
CONFIG_LOGLEVEL=7
|
||||
CONFIG_CONSOLE_MUX=y
|
||||
CONFIG_SPL_MAX_SIZE=0x58000
|
||||
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
||||
CONFIG_SPL_BSS_START_ADDR=0x80a00000
|
||||
CONFIG_SPL_BSS_MAX_SIZE=0x80000
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_SYS_MALLOC=y
|
||||
CONFIG_SPL_SYS_MALLOC_SIZE=0x800000
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
|
||||
CONFIG_SPL_DMA=y
|
||||
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_DM_MAILBOX=y
|
||||
CONFIG_SPL_MTD_SUPPORT=y
|
||||
CONFIG_SPL_DM_SPI_FLASH=y
|
||||
CONFIG_SPL_DM_RESET=y
|
||||
CONFIG_SPL_POWER_DOMAIN=y
|
||||
# CONFIG_SPL_SPI_FLASH_TINY is not set
|
||||
CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
|
||||
CONFIG_SPL_SPI_LOAD=y
|
||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
|
||||
CONFIG_SPL_YMODEM_SUPPORT=y
|
||||
CONFIG_SYS_MAXARGS=64
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_CMD_DFU=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_PCI=y
|
||||
CONFIG_CMD_REMOTEPROC=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0"
|
||||
CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),-@8m(ospi.rootfs)"
|
||||
CONFIG_CMD_UBI=y
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_SPL_MULTI_DTB_FIT=y
|
||||
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_SYS_MMC_ENV_PART=1
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SPL_OF_TRANSLATE=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_CLK_TI_SCI=y
|
||||
CONFIG_DFU_MMC=y
|
||||
CONFIG_DFU_RAM=y
|
||||
CONFIG_DFU_SF=y
|
||||
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x20000
|
||||
CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000
|
||||
CONFIG_DMA_CHANNELS=y
|
||||
CONFIG_TI_K3_NAVSS_UDMA=y
|
||||
CONFIG_TI_SCI_PROTOCOL=y
|
||||
CONFIG_DM_PCA953X=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
|
||||
CONFIG_SYS_I2C_OMAP24XX=y
|
||||
CONFIG_DM_MAILBOX=y
|
||||
CONFIG_K3_SEC_PROXY=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_ADMA=y
|
||||
CONFIG_SPL_MMC_SDHCI_ADMA=y
|
||||
CONFIG_MMC_SDHCI_AM654=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_DM_MTD=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_SPI_FLASH_MTD=y
|
||||
CONFIG_PHY_TI_DP83867=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_E1000=y
|
||||
CONFIG_CMD_E1000=y
|
||||
CONFIG_TI_AM65_CPSW_NUSS=y
|
||||
CONFIG_PCI_KEYSTONE=y
|
||||
CONFIG_PHY=y
|
||||
CONFIG_AM654_PHY=y
|
||||
CONFIG_OMAP_USB2_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_GENERIC is not set
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
# CONFIG_SPL_PINCTRL_GENERIC is not set
|
||||
CONFIG_PINCTRL_SINGLE=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_TI_SCI_POWER_DOMAIN=y
|
||||
CONFIG_REMOTEPROC_TI_K3_R5F=y
|
||||
CONFIG_RESET_TI_SCI=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_SOC_DEVICE=y
|
||||
CONFIG_SOC_DEVICE_TI_K3=y
|
||||
CONFIG_SOC_TI=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CADENCE_QSPI=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_SPL_SYSRESET=y
|
||||
CONFIG_SYSRESET_TI_SCI=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB_GADGET=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_GENERIC=y
|
||||
CONFIG_USB_KEYBOARD=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x0451
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x6162
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
|
|
@ -1,135 +0,0 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x55000
|
||||
CONFIG_SPL_GPIO=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_SOC_K3_AM654=y
|
||||
CONFIG_K3_EARLY_CONS=y
|
||||
CONFIG_TARGET_AM654_R5_EVM=y
|
||||
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
||||
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_SPL_DM_SPI=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
|
||||
CONFIG_SPL_TEXT_BASE=0x41c00000
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_SPL_MMC=y
|
||||
CONFIG_SPL_SERIAL=y
|
||||
CONFIG_SPL_DRIVERS_MISC=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x82000000
|
||||
CONFIG_SPL_FS_FAT=y
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI=y
|
||||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_SPL_MAX_SIZE=0x58000
|
||||
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
||||
CONFIG_SPL_BSS_START_ADDR=0x41c7effc
|
||||
CONFIG_SPL_BSS_MAX_SIZE=0xc00
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
CONFIG_SPL_SYS_MALLOC=y
|
||||
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
|
||||
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x84000000
|
||||
CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000
|
||||
CONFIG_SPL_EARLY_BSS=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
|
||||
CONFIG_SPL_DMA=y
|
||||
CONFIG_SPL_I2C=y
|
||||
CONFIG_SPL_DM_MAILBOX=y
|
||||
CONFIG_SPL_DM_SPI_FLASH=y
|
||||
CONFIG_SPL_DM_RESET=y
|
||||
CONFIG_SPL_POWER_DOMAIN=y
|
||||
CONFIG_SPL_RAM_SUPPORT=y
|
||||
CONFIG_SPL_RAM_DEVICE=y
|
||||
CONFIG_SPL_REMOTEPROC=y
|
||||
# CONFIG_SPL_SPI_FLASH_TINY is not set
|
||||
CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
|
||||
CONFIG_SPL_SPI_LOAD=y
|
||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
|
||||
CONFIG_SPL_YMODEM_SUPPORT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_SYS_MAXARGS=64
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_SYS_BOOTM_LEN=0x4000000
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_REMOTEPROC=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_SPL_MULTI_DTB_FIT=y
|
||||
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
CONFIG_ENV_IS_IN_FAT=y
|
||||
CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SPL_OF_TRANSLATE=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_CLK_TI_SCI=y
|
||||
CONFIG_DMA_CHANNELS=y
|
||||
CONFIG_TI_K3_NAVSS_UDMA=y
|
||||
CONFIG_TI_SCI_PROTOCOL=y
|
||||
CONFIG_DA8XX_GPIO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
|
||||
CONFIG_SYS_I2C_OMAP24XX=y
|
||||
CONFIG_DM_MAILBOX=y
|
||||
CONFIG_K3_SEC_PROXY=y
|
||||
CONFIG_K3_AVS0=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_SPL_MMC_SDHCI_ADMA=y
|
||||
CONFIG_MMC_SDHCI_AM654=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_GENERIC is not set
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
# CONFIG_SPL_PINCTRL_GENERIC is not set
|
||||
CONFIG_PINCTRL_SINGLE=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_TI_SCI_POWER_DOMAIN=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_SPL_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_GPIO=y
|
||||
CONFIG_SPL_DM_REGULATOR_GPIO=y
|
||||
CONFIG_DM_REGULATOR_TPS62360=y
|
||||
CONFIG_RAM=y
|
||||
CONFIG_SPL_RAM=y
|
||||
CONFIG_K3_SYSTEM_CONTROLLER=y
|
||||
CONFIG_REMOTEPROC_TI_K3_ARM64=y
|
||||
CONFIG_RESET_TI_SCI=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_SOC_DEVICE=y
|
||||
CONFIG_SOC_DEVICE_TI_K3=y
|
||||
CONFIG_SOC_TI=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CADENCE_QSPI=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_SPL_SYSRESET=y
|
||||
CONFIG_SYSRESET_TI_SCI=y
|
||||
CONFIG_TIMER=y
|
||||
CONFIG_SPL_TIMER=y
|
||||
CONFIG_OMAP_TIMER=y
|
||||
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
|
||||
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SKIP_LOWLEVEL_INIT=y
|
||||
CONFIG_ARCH_K3=y
|
||||
# CONFIG_TI_SECURE_DEVICE is not set
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_SPL_GPIO=y
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_SPL_GPIO=y
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x70000
|
||||
CONFIG_SPL_GPIO=y
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_SPL_GPIO=y
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x70000
|
||||
CONFIG_SPL_GPIO=y
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_SPL_GPIO=y
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x10000
|
||||
CONFIG_SPL_GPIO=y
|
||||
|
|
|
|||
63
configs/xenguest_arm64_virtio_defconfig
Normal file
63
configs/xenguest_arm64_virtio_defconfig
Normal file
|
|
@ -0,0 +1,63 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_POSITION_INDEPENDENT=y
|
||||
CONFIG_TARGET_XENGUEST_ARM64=y
|
||||
CONFIG_TEXT_BASE=0x40080000
|
||||
CONFIG_SYS_MALLOC_LEN=0x2000000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x400
|
||||
CONFIG_NR_DRAM_BANKS=1
|
||||
CONFIG_DEFAULT_DEVICE_TREE="xenguest-arm64"
|
||||
CONFIG_SYS_PROMPT="xenguest# "
|
||||
CONFIG_IDENT_STRING=" xenguest"
|
||||
CONFIG_SYS_LOAD_ADDR=0x40000000
|
||||
CONFIG_OF_SYSTEM_SETUP=y
|
||||
CONFIG_BOOTDELAY=10
|
||||
CONFIG_SYS_MAXARGS=64
|
||||
CONFIG_SYS_PBSIZE=1051
|
||||
#CONFIG_SYS_CBSIZE=512
|
||||
# CONFIG_CMD_BDI is not set
|
||||
# CONFIG_CMD_BOOTD is not set
|
||||
CONFIG_SYS_BOOTM_LEN=0x800000
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_CMD_GO is not set
|
||||
# CONFIG_CMD_IMI is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_EXPORTENV is not set
|
||||
# CONFIG_CMD_IMPORTENV is not set
|
||||
# CONFIG_CMD_EDITENV is not set
|
||||
# CONFIG_CMD_SAVEENV is not set
|
||||
# CONFIG_CMD_ENV_EXISTS is not set
|
||||
# CONFIG_CMD_CRC32 is not set
|
||||
# CONFIG_CMD_LZMADEC is not set
|
||||
# CONFIG_CMD_UNZIP is not set
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
# CONFIG_CMD_ECHO is not set
|
||||
# CONFIG_CMD_ITEST is not set
|
||||
# CONFIG_CMD_SOURCE is not set
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
# CONFIG_CMD_SLEEP is not set
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_FAT=y
|
||||
# CONFIG_NET is not set
|
||||
# CONFIG_MMC is not set
|
||||
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_PHYS_64BIT=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_CMD_PCI=y
|
||||
CONFIG_PCIE_ECAM_GENERIC=y
|
||||
CONFIG_PCI_REGION_MULTI_ENTRY=y
|
||||
CONFIG_PCI_INIT_R=y
|
||||
CONFIG_PCI_PNP=y
|
||||
CONFIG_DM_PCI_COMPAT=y
|
||||
CONFIG_SYS_PCI_64BIT=y
|
||||
CONFIG_VIRTIO=y
|
||||
CONFIG_VIRTIO_MMIO=y
|
||||
CONFIG_VIRTIO_PCI=y
|
||||
CONFIG_VIRTIO_BLK=y
|
||||
CONFIG_CMD_VIRTIO=y
|
||||
# CONFIG_VIRTIO_PCI_LEGACY is not set
|
||||
# CONFIG_VIRTIO_NET is not set
|
||||
# CONFIG_VIRTIO_RNG is not set
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_PARTITION_TYPE_GUID=y
|
||||
|
|
@ -23,6 +23,7 @@ previously done by NXP [4]:
|
|||
- PV block device frontend driver with XenStore based device enumeration and
|
||||
UCLASS_PVBLOCK class;
|
||||
- PV serial console device frontend driver;
|
||||
- Virtio block device support;
|
||||
- Xen hypervisor support with minimal set of the essential headers adapted from
|
||||
the Linux kernel;
|
||||
- Xen grant table support;
|
||||
|
|
@ -34,6 +35,7 @@ previously done by NXP [4]:
|
|||
define any start addresses at compile time which is up to Xen to choose at
|
||||
run-time;
|
||||
- new defconfig introduced: xenguest_arm64_defconfig.
|
||||
- new defconfig introduced: xenguest_arm64_virtio_defconfig.
|
||||
|
||||
|
||||
Board limitations
|
||||
|
|
|
|||
|
|
@ -781,9 +781,7 @@ To do
|
|||
|
||||
Some things that need to be done to completely replace the distro-boot scripts:
|
||||
|
||||
- add bootdev drivers for dhcp, sata, scsi, ide, virtio
|
||||
- PXE boot for EFI
|
||||
- support for loading U-Boot scripts
|
||||
- implement extensions (devicetree overlays with add-on boards)
|
||||
|
||||
Other ideas:
|
||||
|
||||
|
|
|
|||
|
|
@ -594,10 +594,10 @@ To insert the lowest supported version into a dtb
|
|||
|
||||
.. code-block:: console
|
||||
|
||||
$ dtc -@ -I dts -O dtb -o version.dtbo version.dts
|
||||
$ dtc -@ -I dts -O dtb -o version.dtbo version.dtso
|
||||
$ fdtoverlay -i orig.dtb -o new.dtb -v version.dtbo
|
||||
|
||||
where version.dts looks like::
|
||||
where version.dtso looks like::
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
|
|
|||
|
|
@ -281,8 +281,10 @@ properties. A \(oqdata-offset\(cq of 0 indicates that it starts in the first
|
|||
.BI \-B " alignment"
|
||||
.TQ
|
||||
.BI \-\-alignment " alignment"
|
||||
The alignment, in hexadecimal, that external data will be aligned to. This
|
||||
option only has an effect when \-E is specified.
|
||||
The alignment, in hexadecimal, that the FDT structure will be aligned
|
||||
to. With
|
||||
.BR \-E ,
|
||||
also specifies the alignment for the external data.
|
||||
.
|
||||
.TP
|
||||
.BI \-p " external-position"
|
||||
|
|
@ -860,6 +862,25 @@ verify signatures is added to u\-boot.dtb with required = "conf" property.
|
|||
\-K u\-boot.dtb -r kernel.itb
|
||||
.EE
|
||||
.RE
|
||||
.P
|
||||
Convert an existing FIT image from any of the three types of data storage
|
||||
(internal, external data-offset or external data-position) to another type
|
||||
of data storage.
|
||||
.RS
|
||||
.P
|
||||
.EX
|
||||
\fB// convert FIT from internal data to data-position
|
||||
\fBmkimage -p 0x20000 -F internal_data.itb
|
||||
.EE
|
||||
.EX
|
||||
\fB// convert FIT from data-position to data-offset
|
||||
\fBmkimage -E -F external_data-position.itb
|
||||
.EE
|
||||
.EX
|
||||
\fB// convert FIT from data-offset to internal data
|
||||
\fBmkimage -F external_data-offset.itb
|
||||
.EE
|
||||
.RE
|
||||
.
|
||||
.SH SEE ALSO
|
||||
.BR dtc (1),
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@ traditional binary device-tree. For example:
|
|||
|
||||
$ dtc -@ -I dts -O dtb -o base.dtb base.dts
|
||||
|
||||
**overlay.dts**
|
||||
**overlay.dtso**
|
||||
|
||||
::
|
||||
|
||||
|
|
@ -63,7 +63,7 @@ traditional binary device-tree. For example:
|
|||
|
||||
.. code-block:: console
|
||||
|
||||
$ dtc -@ -I dts -O dtb -o overlay.dtbo overlay.dts
|
||||
$ dtc -@ -I dts -O dtb -o overlay.dtbo overlay.dtso
|
||||
|
||||
Ways to Utilize Overlays in U-Boot
|
||||
----------------------------------
|
||||
|
|
|
|||
|
|
@ -669,17 +669,22 @@ int input_stdio_register(struct stdio_dev *dev)
|
|||
int error;
|
||||
|
||||
error = stdio_register(dev);
|
||||
#if !defined(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(ENV_SUPPORT)
|
||||
/* check if this is the standard input device */
|
||||
if (!error && strcmp(env_get("stdin"), dev->name) == 0) {
|
||||
/* reassign the console */
|
||||
if (OVERWRITE_CONSOLE ||
|
||||
console_assign(stdin, dev->name))
|
||||
return -1;
|
||||
|
||||
if (!CONFIG_IS_ENABLED(ENV_SUPPORT))
|
||||
return 0;
|
||||
|
||||
if (!error) {
|
||||
const char *cstdin;
|
||||
|
||||
/* check if this is the standard input device */
|
||||
cstdin = env_get("stdin");
|
||||
if (cstdin && !strcmp(cstdin, dev->name)) {
|
||||
/* reassign the console */
|
||||
if (OVERWRITE_CONSOLE ||
|
||||
console_assign(stdin, dev->name))
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
#else
|
||||
error = error;
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -316,7 +316,7 @@ int get_fs_loader(struct udevice **dev)
|
|||
return ret;
|
||||
|
||||
/* Just create a new device */
|
||||
ret = device_bind(dm_root(), DM_DRIVER_GET(fs_loader), "default-loader",
|
||||
ret = device_bind(dm_root(), DM_DRIVER_REF(fs_loader), "default-loader",
|
||||
&default_plat, ofnode_null(), dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -76,6 +76,12 @@ config RNG_SMCCC_TRNG
|
|||
Enable random number generator for platforms that support Arm
|
||||
SMCCC TRNG interface.
|
||||
|
||||
config RNG_ARM_RNDR
|
||||
bool "Generic ARMv8.5 RNDR register"
|
||||
depends on DM_RNG && ARM64
|
||||
help
|
||||
Use the ARMv8.5 RNDR register to provide random numbers.
|
||||
|
||||
config TPM_RNG
|
||||
bool "Enable random number generator on TPM device"
|
||||
depends on TPM
|
||||
|
|
|
|||
|
|
@ -13,4 +13,5 @@ obj-$(CONFIG_RNG_STM32) += stm32_rng.o
|
|||
obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o
|
||||
obj-$(CONFIG_RNG_IPROC200) += iproc_rng200.o
|
||||
obj-$(CONFIG_RNG_SMCCC_TRNG) += smccc_trng.o
|
||||
obj-$(CONFIG_RNG_ARM_RNDR) += arm_rndr.o
|
||||
obj-$(CONFIG_TPM_RNG) += tpm_rng.o
|
||||
|
|
|
|||
82
drivers/rng/arm_rndr.c
Normal file
82
drivers/rng/arm_rndr.c
Normal file
|
|
@ -0,0 +1,82 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (c) 2023, Arm Ltd.
|
||||
*
|
||||
* Use the (optional) ARMv8.5 RNDR register to provide random numbers to
|
||||
* U-Boot's UCLASS_RNG users.
|
||||
* Detection is done at runtime using the CPU ID registers.
|
||||
*/
|
||||
|
||||
#define LOG_CATEGORY UCLASS_RNG
|
||||
|
||||
#include <common.h>
|
||||
#include <dm.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <rng.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
#define DRIVER_NAME "arm-rndr"
|
||||
|
||||
static bool cpu_has_rndr(void)
|
||||
{
|
||||
uint64_t reg;
|
||||
|
||||
__asm__ volatile("mrs %0, ID_AA64ISAR0_EL1\n" : "=r" (reg));
|
||||
return !!(reg & ID_AA64ISAR0_EL1_RNDR);
|
||||
}
|
||||
|
||||
/*
|
||||
* The system register name is RNDR, but this isn't widely known among older
|
||||
* toolchains, and also triggers errors because of it being an architecture
|
||||
* extension. Since we check the availability of the register before, it's
|
||||
* fine to use here, though.
|
||||
*/
|
||||
#define RNDR "S3_3_C2_C4_0"
|
||||
|
||||
static uint64_t read_rndr(void)
|
||||
{
|
||||
uint64_t reg;
|
||||
|
||||
__asm__ volatile("mrs %0, " RNDR "\n" : "=r" (reg));
|
||||
|
||||
return reg;
|
||||
}
|
||||
|
||||
static int arm_rndr_read(struct udevice *dev, void *data, size_t len)
|
||||
{
|
||||
uint64_t random;
|
||||
|
||||
while (len) {
|
||||
int tocopy = min(sizeof(uint64_t), len);
|
||||
|
||||
random = read_rndr();
|
||||
memcpy(data, &random, tocopy);
|
||||
len -= tocopy;
|
||||
data += tocopy;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dm_rng_ops arm_rndr_ops = {
|
||||
.read = arm_rndr_read,
|
||||
};
|
||||
|
||||
static int arm_rndr_probe(struct udevice *dev)
|
||||
{
|
||||
if (!cpu_has_rndr())
|
||||
return -ENODEV;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
U_BOOT_DRIVER(arm_rndr) = {
|
||||
.name = DRIVER_NAME,
|
||||
.id = UCLASS_RNG,
|
||||
.ops = &arm_rndr_ops,
|
||||
.probe = arm_rndr_probe,
|
||||
};
|
||||
|
||||
U_BOOT_DRVINFO(cpu_arm_rndr) = {
|
||||
.name = DRIVER_NAME,
|
||||
};
|
||||
|
|
@ -409,7 +409,7 @@ static int mtk_spim_transfer_wait(struct spi_slave *slave,
|
|||
{
|
||||
struct udevice *bus = dev_get_parent(slave->dev);
|
||||
struct mtk_spim_priv *priv = dev_get_priv(bus);
|
||||
u32 sck_l, sck_h, clk_count, reg;
|
||||
u32 pll_clk, sck_l, sck_h, clk_count, reg;
|
||||
ulong us = 1;
|
||||
int ret = 0;
|
||||
|
||||
|
|
@ -418,11 +418,12 @@ static int mtk_spim_transfer_wait(struct spi_slave *slave,
|
|||
else
|
||||
clk_count = op->data.nbytes;
|
||||
|
||||
pll_clk = priv->pll_clk_rate;
|
||||
sck_l = readl(priv->base + SPI_CFG2_REG) >> SPI_CFG2_SCK_LOW_OFFSET;
|
||||
sck_h = readl(priv->base + SPI_CFG2_REG) & SPI_CFG2_SCK_HIGH_MASK;
|
||||
do_div(priv->pll_clk_rate, sck_l + sck_h + 2);
|
||||
do_div(pll_clk, sck_l + sck_h + 2);
|
||||
|
||||
us = CLK_TO_US(priv->pll_clk_rate, clk_count * 8);
|
||||
us = CLK_TO_US(pll_clk, clk_count * 8);
|
||||
us += 1000 * 1000; /* 1s tolerance */
|
||||
|
||||
if (us > UINT_MAX)
|
||||
|
|
|
|||
12
env/Kconfig
vendored
12
env/Kconfig
vendored
|
|
@ -576,7 +576,12 @@ config ENV_OFFSET
|
|||
default 0x260000 if ARCH_OMAP2PLUS
|
||||
default 0x1080000 if MICROBLAZE && ENV_IS_IN_SPI_FLASH
|
||||
help
|
||||
Offset from the start of the device (or partition)
|
||||
Offset from the start of the device (or partition).
|
||||
|
||||
This offset may be interpreted differently depending on the chosen
|
||||
ENV_IS_IN_* options. For example, for ENV_IS_IN_MMC=y, this offset may
|
||||
be negative to indicate an offset backwards from the end of the
|
||||
partition. See the relevant help messages for more details.
|
||||
|
||||
config ENV_OFFSET_REDUND
|
||||
hex "Redundant environment offset"
|
||||
|
|
@ -588,6 +593,11 @@ config ENV_OFFSET_REDUND
|
|||
Offset from the start of the device (or partition) of the redundant
|
||||
environment location.
|
||||
|
||||
This offset may be interpreted differently depending on the chosen
|
||||
ENV_IS_IN_* options. For example, for ENV_IS_IN_MMC=y, this offset may
|
||||
be negative to indicate an offset backwards from the end of the
|
||||
partition. See the relevant help messages for more details.
|
||||
|
||||
config ENV_SIZE
|
||||
hex "Environment Size"
|
||||
default 0x40000 if ENV_IS_IN_SPI_FLASH && ARCH_ZYNQMP
|
||||
|
|
|
|||
|
|
@ -18,7 +18,4 @@
|
|||
|
||||
#define CFG_SMP_PEN_ADDR 0x02020000
|
||||
|
||||
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
|
||||
#define CFG_ARM_GIC_BASE_ADDRESS 0x10480000
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
|
|||
|
|
@ -14,9 +14,15 @@
|
|||
#undef CFG_SYS_SDRAM_BASE
|
||||
|
||||
#undef CFG_EXTRA_ENV_SETTINGS
|
||||
|
||||
#ifdef CONFIG_VIRTIO_BLK
|
||||
#define CFG_EXTRA_ENV_SETTINGS \
|
||||
"loadimage=ext4load pvblock 0 0x90000000 /boot/Image;\0" \
|
||||
"pvblockboot=run loadimage;" \
|
||||
"virtioboot=virtio scan; ext4load virtio 0 0x90000000 /boot/Image;" \
|
||||
"booti 0x90000000 - ${fdtcontroladdr};\0"
|
||||
#else
|
||||
#define CFG_EXTRA_ENV_SETTINGS \
|
||||
"pvblockboot=ext4load pvblock 0 0x90000000 /boot/Image;" \
|
||||
"booti 0x90000000 - 0x88000000;\0"
|
||||
#endif
|
||||
|
||||
#endif /* __XENGUEST_ARM64_H */
|
||||
|
|
|
|||
|
|
@ -282,9 +282,9 @@ static inline const char *event_spy_id(struct evspy_info *spy)
|
|||
* {
|
||||
* return sandbox_early_getopt_check();
|
||||
* }
|
||||
* EVENT_SPY(EVT_MISC_INIT_F, sandbox_misc_init_f);
|
||||
* EVENT_SPY_FULL(EVT_MISC_INIT_F, sandbox_misc_init_f);
|
||||
*
|
||||
* where EVENT_SPY uses ll_entry_declare()
|
||||
* where EVENT_SPY_FULL uses ll_entry_declare()
|
||||
*
|
||||
* In this case, LTO decides to drop the sandbox_misc_init_f() function
|
||||
* (which is fine) but then drops the linker-list entry too. This means
|
||||
|
|
|
|||
|
|
@ -2606,8 +2606,8 @@ sub u_boot_line {
|
|||
"Possible new uclass - make sure to add a sandbox driver, plus a test in test/dm/<name>.c\n" . $herecurr);
|
||||
}
|
||||
|
||||
# try to get people to use the livetree API
|
||||
if ($line =~ /^\+.*fdtdec_/) {
|
||||
# try to get people to use the livetree API, except when changing tooling
|
||||
if ($line =~ /^\+.*fdtdec_/ && $realfile !~ /^tools\//) {
|
||||
WARN("LIVETREE",
|
||||
"Use the livetree API (dev_read_...)\n" . $herecurr);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -497,7 +497,7 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname)
|
|||
{
|
||||
void *buf = NULL;
|
||||
int buf_ptr;
|
||||
int fit_size, new_size;
|
||||
int fit_size, unpadded_size, new_size, pad_boundary;
|
||||
int fd;
|
||||
struct stat sbuf;
|
||||
void *fdt;
|
||||
|
|
@ -564,9 +564,13 @@ static int fit_extract_data(struct image_tool_params *params, const char *fname)
|
|||
/* Pack the FDT and place the data after it */
|
||||
fdt_pack(fdt);
|
||||
|
||||
new_size = fdt_totalsize(fdt);
|
||||
new_size = ALIGN(new_size, align_size);
|
||||
unpadded_size = fdt_totalsize(fdt);
|
||||
new_size = ALIGN(unpadded_size, align_size);
|
||||
fdt_set_totalsize(fdt, new_size);
|
||||
if (unpadded_size < fit_size) {
|
||||
pad_boundary = new_size < fit_size ? new_size : fit_size;
|
||||
memset(fdt + unpadded_size, 0, pad_boundary - unpadded_size);
|
||||
}
|
||||
debug("Size reduced from %x to %x\n", fit_size, fdt_totalsize(fdt));
|
||||
debug("External data size %x\n", buf_ptr);
|
||||
munmap(fdt, sbuf.st_size);
|
||||
|
|
@ -616,6 +620,8 @@ err:
|
|||
static int fit_import_data(struct image_tool_params *params, const char *fname)
|
||||
{
|
||||
void *fdt, *old_fdt;
|
||||
void *data = NULL;
|
||||
const char *ext_data_prop = NULL;
|
||||
int fit_size, new_size, size, data_base;
|
||||
int fd;
|
||||
struct stat sbuf;
|
||||
|
|
@ -659,14 +665,28 @@ static int fit_import_data(struct image_tool_params *params, const char *fname)
|
|||
int buf_ptr;
|
||||
int len;
|
||||
|
||||
buf_ptr = fdtdec_get_int(fdt, node, "data-offset", -1);
|
||||
len = fdtdec_get_int(fdt, node, "data-size", -1);
|
||||
if (buf_ptr == -1 || len == -1)
|
||||
/*
|
||||
* FIT_DATA_OFFSET_PROP and FIT_DATA_POSITION_PROP are never both present,
|
||||
* but if they are, prefer FIT_DATA_OFFSET_PROP as it was there first
|
||||
*/
|
||||
buf_ptr = fdtdec_get_int(fdt, node, FIT_DATA_POSITION_PROP, -1);
|
||||
if (buf_ptr != -1) {
|
||||
ext_data_prop = FIT_DATA_POSITION_PROP;
|
||||
data = old_fdt + buf_ptr;
|
||||
}
|
||||
buf_ptr = fdtdec_get_int(fdt, node, FIT_DATA_OFFSET_PROP, -1);
|
||||
if (buf_ptr != -1) {
|
||||
ext_data_prop = FIT_DATA_OFFSET_PROP;
|
||||
data = old_fdt + data_base + buf_ptr;
|
||||
}
|
||||
len = fdtdec_get_int(fdt, node, FIT_DATA_SIZE_PROP, -1);
|
||||
if (!data || len == -1)
|
||||
continue;
|
||||
debug("Importing data size %x\n", len);
|
||||
|
||||
ret = fdt_setprop(fdt, node, "data",
|
||||
old_fdt + data_base + buf_ptr, len);
|
||||
ret = fdt_setprop(fdt, node, FIT_DATA_PROP, data, len);
|
||||
ret = fdt_delprop(fdt, node, ext_data_prop);
|
||||
|
||||
if (ret) {
|
||||
debug("%s: Failed to write property: %s\n", __func__,
|
||||
fdt_strerror(ret));
|
||||
|
|
|
|||
|
|
@ -112,7 +112,7 @@ static void usage(const char *msg)
|
|||
" -f => input filename for FIT source\n"
|
||||
" -i => input filename for ramdisk file\n"
|
||||
" -E => place data outside of the FIT structure\n"
|
||||
" -B => align size in hex for FIT structure and header\n"
|
||||
" -B => align size in hex for FIT structure and, with -E, for the external data\n"
|
||||
" -b => append the device tree binary to the FIT\n"
|
||||
" -t => update the timestamp in the FIT\n");
|
||||
#ifdef CONFIG_FIT_SIGNATURE
|
||||
|
|
|
|||
Loading…
Reference in a new issue