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db410: added pinctrl node and serial bindings
Added TLMM pinctrl node for pin muxing & config. Additionally, added a serial node for uart. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
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1 changed files with 14 additions and 0 deletions
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@ -8,6 +8,7 @@
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/dts-v1/;
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/dts-v1/;
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#include "skeleton64.dtsi"
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#include "skeleton64.dtsi"
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#include <dt-bindings/pinctrl/pinctrl-snapdragon.h>
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/ {
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/ {
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model = "Qualcomm Technologies, Inc. Dragonboard 410c";
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model = "Qualcomm Technologies, Inc. Dragonboard 410c";
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@ -38,6 +39,17 @@
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ranges = <0x0 0x0 0x0 0xffffffff>;
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ranges = <0x0 0x0 0x0 0xffffffff>;
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compatible = "simple-bus";
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compatible = "simple-bus";
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pinctrl: qcom,tlmm@1000000 {
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compatible = "qcom,tlmm-apq8016";
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reg = <0x1000000 0x400000>;
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blsp1_uart: uart {
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function = "blsp1_uart";
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pins = "GPIO_4", "GPIO_5";
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drive-strength = <DRIVE_STRENGTH_8MA>;
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bias-disable;
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};
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};
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clkc: qcom,gcc@1800000 {
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clkc: qcom,gcc@1800000 {
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compatible = "qcom,gcc-apq8016";
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compatible = "qcom,gcc-apq8016";
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reg = <0x1800000 0x80000>;
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reg = <0x1800000 0x80000>;
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@ -49,6 +61,8 @@
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compatible = "qcom,msm-uartdm-v1.4";
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compatible = "qcom,msm-uartdm-v1.4";
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reg = <0x78b0000 0x200>;
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reg = <0x78b0000 0x200>;
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clock = <&clkc 4>;
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clock = <&clkc 4>;
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pinctrl-names = "uart";
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pinctrl-0 = <&blsp1_uart>;
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};
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};
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soc_gpios: pinctrl@1000000 {
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soc_gpios: pinctrl@1000000 {
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