db410: added pinctrl node and serial bindings

Added TLMM pinctrl node for pin muxing & config.
Additionally, added a serial node for uart.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
This commit is contained in:
Ramon Fried 2018-05-16 12:13:41 +03:00 committed by Tom Rini
parent ad97051b7f
commit 9558ddab96

View file

@ -8,6 +8,7 @@
/dts-v1/; /dts-v1/;
#include "skeleton64.dtsi" #include "skeleton64.dtsi"
#include <dt-bindings/pinctrl/pinctrl-snapdragon.h>
/ { / {
model = "Qualcomm Technologies, Inc. Dragonboard 410c"; model = "Qualcomm Technologies, Inc. Dragonboard 410c";
@ -38,6 +39,17 @@
ranges = <0x0 0x0 0x0 0xffffffff>; ranges = <0x0 0x0 0x0 0xffffffff>;
compatible = "simple-bus"; compatible = "simple-bus";
pinctrl: qcom,tlmm@1000000 {
compatible = "qcom,tlmm-apq8016";
reg = <0x1000000 0x400000>;
blsp1_uart: uart {
function = "blsp1_uart";
pins = "GPIO_4", "GPIO_5";
drive-strength = <DRIVE_STRENGTH_8MA>;
bias-disable;
};
};
clkc: qcom,gcc@1800000 { clkc: qcom,gcc@1800000 {
compatible = "qcom,gcc-apq8016"; compatible = "qcom,gcc-apq8016";
reg = <0x1800000 0x80000>; reg = <0x1800000 0x80000>;
@ -49,6 +61,8 @@
compatible = "qcom,msm-uartdm-v1.4"; compatible = "qcom,msm-uartdm-v1.4";
reg = <0x78b0000 0x200>; reg = <0x78b0000 0x200>;
clock = <&clkc 4>; clock = <&clkc 4>;
pinctrl-names = "uart";
pinctrl-0 = <&blsp1_uart>;
}; };
soc_gpios: pinctrl@1000000 { soc_gpios: pinctrl@1000000 {