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sunxi: Move remaining PSCI assembly code to C
This patch finishes the rewrite of sunxi specific PSCI parts into C code. The assembly-only stack setup code has been factored out into a common function for ARMv7. The GIC setup code can be renamed as psci_arch_init. And we can use an empty stub function for psci_text_end. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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b52813239c
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3 changed files with 6 additions and 54 deletions
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@ -14,7 +14,6 @@ obj-$(CONFIG_MACH_SUN8I_H3) += tzpc.o
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ifndef CONFIG_SPL_BUILD
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obj-$(CONFIG_ARMV7_PSCI) += psci.o
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obj-$(CONFIG_ARMV7_PSCI) += psci_head.o
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endif
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ifdef CONFIG_SPL_BUILD
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@ -250,7 +250,7 @@ void __secure psci_cpu_off(void)
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wfi();
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}
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void __secure sunxi_gic_init(void)
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void __secure psci_arch_init(void)
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{
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u32 reg;
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@ -271,3 +271,8 @@ void __secure sunxi_gic_init(void)
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reg &= ~BIT(0); /* Secure mode */
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cp15_write_scr(reg);
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}
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/* dummy entry for end of psci text */
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void __secure psci_text_end(void)
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{
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}
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@ -1,52 +0,0 @@
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/*
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* Copyright (C) 2013 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* Based on code by Carl van Schaik <carl@ok-labs.com>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <config.h>
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#include <linux/linkage.h>
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#include <asm/arch-armv7/generictimer.h>
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#include <asm/gic.h>
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#include <asm/macro.h>
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#include <asm/psci.h>
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#include <asm/arch/cpu.h>
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/*
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* Memory layout:
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*
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* SECURE_RAM to text_end :
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* ._secure_text section
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* text_end to ALIGN_PAGE(text_end):
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* nothing
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* ALIGN_PAGE(text_end) to ALIGN_PAGE(text_end) + 0x1000)
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* 1kB of stack per CPU (4 CPUs max).
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*/
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.pushsection ._secure.text, "ax"
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.arch_extension sec
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#define GICD_BASE (SUNXI_GIC400_BASE + 0x1000)
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#define GICC_BASE (SUNXI_GIC400_BASE + 0x2000)
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ENTRY(psci_arch_init)
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b sunxi_gic_init
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ENDPROC(psci_arch_init)
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ENTRY(psci_text_end)
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.popsection
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