Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2025-03-17 23:37:01 +00:00
Code Issues Projects Releases Packages Wiki Activity

T4/serdes: fix the serdes clock frequency

Browse source 
Reverse the bit sequence to set and display serdes clock frequency
correctly. The correct bit maps in BRDCFG2 are
0	1	2	3	4	5	6	7
S1RATE[1:0]	S2RATE[1:0] 	S3RATE[1:0] 	S4RATE[1:0]

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
Roy Zang 2013-03-25 07:33:15 +00:00 • committed by Andy Fleming
parent 3e4c3137d6
commit 9458f6d83a
1 changed files with 2 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
board/freescale/t4qds/t4qds.c
View file

@ -110,7 +110,7 @@ int checkboard(void)
for (i = 0; i < MAX_SERDES; i++) {
static const char *freq[] = {
"100", "125", "156.25", "161.1328125"};
unsigned int clock = (sw >> (2 * i)) & 3;
unsigned int clock = (sw >> (6 - 2 * i)) & 3;
printf("SERDES%u=%sMHz ", i+1, freq[clock]);
}
@ -357,7 +357,7 @@ int misc_init_r(void)
sw = QIXIS_READ(brdcfg[2]);
for (i = 0; i < MAX_SERDES; i++) {
unsigned int clock = (sw >> (2 * i)) & 3;
unsigned int clock = (sw >> (6 - 2 * i)) & 3;
switch (clock) {
case 0:
actual[i] = SRDS_PLLCR0_RFCK_SEL_100;