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add image size and descriptors for Spartan 3E FPGA chips
Spartan 3E image sizes taken from Table 1-4 in Xilinx UG332 (v1.1) Signed-off by: Bruce Adler <bruce.adler@ccpu.com>
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@ -73,6 +73,13 @@ typedef struct {
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#define XILINX_XC3S4000_SIZE 11316864/8
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#define XILINX_XC3S5000_SIZE 13271936/8
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/* Spartan-3E (v3.4) */
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#define XILINX_XC3S100E_SIZE 581344/8
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#define XILINX_XC3S250E_SIZE 1353728/8
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#define XILINX_XC3S500E_SIZE 2270208/8
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#define XILINX_XC3S1200E_SIZE 3841184/8
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#define XILINX_XC3S1600E_SIZE 5969696/8
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/* Descriptor Macros
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*********************************************************************/
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/* Spartan-II devices */
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@ -100,4 +107,21 @@ typedef struct {
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#define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
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{ Xilinx_Spartan3, iface, XILINX_XC3S5000E_SIZE, fn_table, cookie }
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/* Spartan-3E devices */
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#define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
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{ Xilinx_Spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie }
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#define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \
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{ Xilinx_Spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie }
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#define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \
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{ Xilinx_Spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie }
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#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
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{ Xilinx_Spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
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#define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
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{ Xilinx_Spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
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#endif /* _SPARTAN3_H_ */
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