diff --git a/README b/README index 9f1561b92c..d6ff909e9a 100644 --- a/README +++ b/README @@ -1712,10 +1712,6 @@ The following options need to be configured: Support for a lightweight UBI (fastmap) scanner and loader - CONFIG_SPL_COMMON_INIT_DDR - Set for common ddr init with serial presence detect in - SPL binary. - CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT, CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE, CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS, diff --git a/board/freescale/p1010rdb/tlb.c b/board/freescale/p1010rdb/tlb.c index 04faefe994..7992666e93 100644 --- a/board/freescale/p1010rdb/tlb.c +++ b/board/freescale/p1010rdb/tlb.c @@ -72,8 +72,7 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 7, BOOKE_PAGESZ_1M, 1), -#if defined(CONFIG_SYS_RAMBOOT) || \ - (defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR)) +#if defined(CONFIG_SYS_RAMBOOT) || !CONFIG_IS_ENABLED(COMMON_INIT_DDR) SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M, 0, 8, BOOKE_PAGESZ_1G, 1), diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c b/board/freescale/p1_p2_rdb_pc/tlb.c index 5931ec650b..6ded38ac68 100644 --- a/board/freescale/p1_p2_rdb_pc/tlb.c +++ b/board/freescale/p1_p2_rdb_pc/tlb.c @@ -77,8 +77,7 @@ struct fsl_e_tlb_entry tlb_table[] = { 0, 7, BOOKE_PAGESZ_1M, 1), #endif -#if defined(CONFIG_SYS_RAMBOOT) || \ - (defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR)) +#if defined(CONFIG_SYS_RAMBOOT) || !CONFIG_IS_ENABLED(COMMON_INIT_DDR) /* **M** - 1G DDR for eSDHC/eSPI/NAND boot */ SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M, diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 6b8c424c13..f6426f0c17 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -68,6 +68,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 68cb2b14f1..7040c598a9 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -49,6 +49,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -89,3 +90,4 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 235bb23593..57ad4b4485 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -60,6 +60,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 933572f855..ce5f1fd276 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -63,6 +63,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 6731429d53..fca971bcf4 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -67,6 +67,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 95bd7861bd..d1046698d3 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -48,6 +48,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -87,3 +88,4 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 87116c11fc..44d3512db2 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 4d0b405bb7..5e6d0c2344 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -62,6 +62,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 2e9f9ee0c2..3939169949 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -69,6 +69,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 26040927c8..9692aaeaa7 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -50,6 +50,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -91,3 +92,4 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_ADDR_MAP=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index cf00a72f40..4e5e92d967 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -61,6 +61,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 996b60d8b3..f67961d831 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -64,6 +64,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 42981c5a11..da189ce856 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -68,6 +68,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 3f9fa6b818..ca2ce61a1d 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -49,6 +49,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -89,3 +90,4 @@ CONFIG_DM_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 34f1a5f2b6..b5d097add8 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -60,6 +60,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index e48b0d1807..62d8e77745 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -63,6 +63,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 8ca01a0adc..e9a7237a08 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -78,6 +78,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 2dfb279d35..6c47be30b7 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -69,6 +69,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 21aaa20461..3b2e7ce111 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -72,6 +72,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 0bf940b9c0..f3bbb60485 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -58,6 +58,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -101,3 +102,4 @@ CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index fe3ef2ea75..cf211c7f5d 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -77,6 +77,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 77e791f9e3..55dc19d658 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -68,6 +68,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 47f42e847b..c4391ed542 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -71,6 +71,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 9ecae6c8b2..7e20aa7887 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -57,6 +57,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -99,3 +100,4 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index f2608fc353..c85ec6d252 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -80,6 +80,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index db9c782ffe..a1bbb63925 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -71,6 +71,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 236f07bd0e..e859587ccd 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -74,6 +74,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 1f40e8d2ab..966b9de5c7 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -60,6 +60,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -103,3 +104,4 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 72b7f7b704..eefc72e498 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -82,6 +82,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index b9604a7d5a..5ac2f8c566 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -73,6 +73,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 4740e884e2..6150b84d11 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -76,6 +76,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 945a031c07..fc22e62431 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -62,6 +62,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -106,3 +107,4 @@ CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y CONFIG_ADDR_MAP=y +CONFIG_COMMON_INIT_DDR=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 03e0d74cb9..dc94e25375 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -81,6 +81,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 80eb5f4bd9..4f33a697cd 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -72,6 +72,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 85e5546e1a..e63cd161dd 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -75,6 +75,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 8029c630c8..dd316f540f 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -61,6 +61,7 @@ CONFIG_SYS_OR2_PRELIM=0xFFFE09FF CONFIG_SYS_BR3_PRELIM_BOOL=y CONFIG_SYS_BR3_PRELIM=0xFFA00801 CONFIG_SYS_OR3_PRELIM=0xFFF009F7 +CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y @@ -104,3 +105,4 @@ CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_EHCI_FSL=y CONFIG_USB_STORAGE=y +CONFIG_COMMON_INIT_DDR=y diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig index 5925fe9e28..fe69bef3d3 100644 --- a/drivers/ddr/fsl/Kconfig +++ b/drivers/ddr/fsl/Kconfig @@ -263,6 +263,20 @@ config SYS_OR7_PRELIM depends on SYS_BR7_PRELIM_BOOL endmenu +if TARGET_P1010RDB_PA || TARGET_P1010RDB_PB || TARGET_P1020RDB_PC || \ + TARGET_P1020RDB_PD || TARGET_P2020RDB + +config COMMON_INIT_DDR + bool "Do not have a TLB entry to cover common DDR init with serial presence detect (SPD)" + +config SPL_COMMON_INIT_DDR + bool "Do not have a TLB entry to cover common DDR init with SPD in SPL" + +config TPL_COMMON_INIT_DDR + bool "Do not have a TLB entry to cover common DDR init with SPD in TPL" + +endif + config SYS_FSL_ERRATUM_A008378 bool diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 734c33bd6a..ffd2cf943d 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -22,9 +22,6 @@ #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_COMMON_INIT_DDR -#endif #endif #ifdef CONFIG_SPIFLASH @@ -39,9 +36,6 @@ #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_COMMON_INIT_DDR -#endif #endif #endif @@ -57,7 +51,6 @@ #else #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_INIT -#define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index fcc31a0401..5de7b7c2db 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -23,7 +23,6 @@ #ifdef CONFIG_RAMBOOT_PBL #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 -#define CONFIG_SPL_COMMON_INIT_DDR #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 9f7ba9bd80..a7530693e7 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -15,7 +15,6 @@ #include #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_SPL_COMMON_INIT_DDR #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 10bbf6e76f..d6bb8d18f9 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -31,7 +31,6 @@ #ifdef CONFIG_RAMBOOT_PBL #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 -#define CONFIG_SPL_COMMON_INIT_DDR #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index a186ae3304..350ecf1d2b 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -26,7 +26,6 @@ #ifdef CONFIG_RAMBOOT_PBL #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 -#define CONFIG_SPL_COMMON_INIT_DDR #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index c565e94023..9a3dd14abd 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -36,8 +36,6 @@ #endif #endif -#define CONFIG_SPL_COMMON_INIT_DDR - #endif #endif /* CONFIG_RAMBOOT_PBL */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 2f65afe38b..bb44372d6d 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -83,9 +83,6 @@ #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_COMMON_INIT_DDR -#endif #elif defined(CONFIG_SPIFLASH) #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" @@ -94,13 +91,9 @@ #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_COMMON_INIT_DDR -#endif #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_INIT -#define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000)