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ftwdt010_wdt: support faraday ftwdt010 watchdog
Faraday ftwdt010 watchdog is an architecture independant watchdog. It is usually used in SoC chip design. Signed-off-by: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Macpaul Lin
Wolfgang Denk
parent
ee986e2a7d
commit
9096963c72
3 changed files with 206 additions and 0 deletions
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@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
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LIB := $(obj)libwatchdog.o
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COBJS-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o
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COBJS-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o
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COBJS := $(COBJS-y)
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SRCS := $(COBJS:.o=.c)
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102
drivers/watchdog/ftwdt010_wdt.c
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102
drivers/watchdog/ftwdt010_wdt.c
Normal file
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@ -0,0 +1,102 @@
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/*
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* Watchdog driver for the FTWDT010 Watch Dog Driver
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*
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* (c) Copyright 2004 Faraday Technology Corp. (www.faraday-tech.com)
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* Based on sa1100_wdt.c by Oleg Drokin <green@crimea.edu>
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* Based on SoftDog driver by Alan Cox <alan@redhat.com>
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*
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* Copyright (C) 2011 Andes Technology Corporation
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* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* 27/11/2004 Initial release, Faraday.
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* 12/01/2011 Port to u-boot, Macpaul Lin.
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <asm/io.h>
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#include "ftwdt010_wdt.h"
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/*
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* Set the watchdog time interval.
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* Counter is 32 bit.
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*/
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static int ftwdt010_wdt_settimeout(unsigned int timeout)
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{
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unsigned int reg;
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struct ftwdt010_wdt *wd = (struct ftwdt010_wdt *)CONFIG_FTWDT010_BASE;
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debug("Activating WDT..\n");
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/* Check if disabled */
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if (readl(&wd->wdcr) & ~FTWDT010_WDCR_ENABLE) {
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printf("sorry, watchdog is disabled\n");
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return -1;
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}
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/*
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* In a 66MHz system,
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* if you set WDLOAD as 0x03EF1480 (66000000)
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* the reset timer is 1 second.
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*/
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reg = FTWDT010_WDLOAD(timeout * FTWDT010_TIMEOUT_FACTOR);
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writel(reg, &wd->wdload);
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return 0;
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}
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void ftwdt010_wdt_reset()
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{
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struct ftwdt010_wdt *wd = (struct ftwdt010_wdt *)CONFIG_FTWDT010_BASE;
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/* clear control register */
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writel(0, &wd->wdcr);
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/* Write Magic number */
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writel(FTWDT010_WDRESTART_MAGIC, &wd->wdrestart);
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/* Enable WDT */
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writel((FTWDT010_WDCR_RST | FTWDT010_WDCR_ENABLE), &wd->wdcr);
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}
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void ftwdt010_wdt_disable()
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{
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struct ftwdt010_wdt *wd = (struct ftwdt010_wdt *)CONFIG_FTWDT010_BASE;
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debug("Deactivating WDT..\n");
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/*
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* It was defined with CONFIG_WATCHDOG_NOWAYOUT in Linux
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*
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* Shut off the timer.
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* Lock it in if it's a module and we defined ...NOWAYOUT
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*/
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writel(0, &wd->wdcr);
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}
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void hw_watchdog_reset()
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{
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ftwdt010_wdt_reset();
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}
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void hw_watchdog_init(void)
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{
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/* set timer in ms */
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ftwdt010_wdt_settimeout(CONFIG_FTWDT010_HW_TIMEOUT * 1000);
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}
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103
drivers/watchdog/ftwdt010_wdt.h
Normal file
103
drivers/watchdog/ftwdt010_wdt.h
Normal file
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@ -0,0 +1,103 @@
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/*
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* Watchdog driver for the FTWDT010 Watch Dog Driver
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*
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* (c) Copyright 2004 Faraday Technology Corp. (www.faraday-tech.com)
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* Based on sa1100_wdt.c by Oleg Drokin <green@crimea.edu>
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* Based on SoftDog driver by Alan Cox <alan@redhat.com>
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*
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* Copyright (C) 2011 Andes Technology Corporation
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* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* 27/11/2004 Initial release, Faraday.
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* 12/01/2011 Port to u-boot, Macpaul Lin.
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*/
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#ifndef __FTWDT010_H
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#define __FTWDT010_H
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struct ftwdt010_wdt {
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unsigned int wdcounter; /* Counter Reg - 0x00 */
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unsigned int wdload; /* Counter Auto Reload Reg - 0x04 */
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unsigned int wdrestart; /* Counter Restart Reg - 0x08 */
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unsigned int wdcr; /* Control Reg - 0x0c */
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unsigned int wdstatus; /* Status Reg - 0x10 */
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unsigned int wdclear; /* Timer Clear - 0x14 */
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unsigned int wdintrlen; /* Interrupt Length - 0x18 */
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};
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/*
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* WDLOAD - Counter Auto Reload Register
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* The Auto Reload Register is set to 0x03EF1480 (66Mhz) by default.
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* Which means in a 66MHz system, the period of Watch Dog timer reset is
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* one second.
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*/
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#define FTWDT010_WDLOAD(x) ((x) & 0xffffffff)
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/*
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* WDRESTART - Watch Dog Timer Counter Restart Register
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* If writing 0x5AB9 to WDRESTART register, Watch Dog timer will
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* automatically reload WDLOAD to WDCOUNTER and restart counting.
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*/
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#define FTWDT010_WDRESTART_MAGIC 0x5AB9
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/* WDCR - Watch Dog Timer Control Register */
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#define FTWDT010_WDCR_ENABLE (1 << 0)
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#define FTWDT010_WDCR_RST (1 << 1)
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#define FTWDT010_WDCR_INTR (1 << 2)
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/* FTWDT010_WDCR_EXT bit: Watch Dog Timer External Signal Enable */
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#define FTWDT010_WDCR_EXT (1 << 3)
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/* FTWDT010_WDCR_CLOCK bit: Clock Source: 0: PCLK, 1: EXTCLK.
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* The clock source PCLK cannot be gated when system sleeps, even if
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* WDCLOCK bit is turned on.
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*
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* Faraday's Watch Dog timer can be driven by an external clock. The
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* programmer just needs to write one to WdCR[WdClock] bit.
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*
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* Note: There is a limitation between EXTCLK and PCLK:
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* EXTCLK cycle time / PCLK cycle time > 2.
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* If the system does not need an external clock,
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* just keep WdCR[WdClock] bit in its default value.
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*/
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#define FTWDT010_WDCR_CLOCK (1 << 4)
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/*
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* WDSTATUS - Watch Dog Timer Status Register
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* This bit is set when the counter reaches Zero
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*/
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#define FTWDT010_WDSTATUS(x) ((x) & 0x1)
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/*
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* WDCLEAR - Watch Dog Timer Clear Register
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* Writing one to this register will clear WDSTATUS.
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*/
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#define FTWDT010_WDCLEAR (1 << 0)
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/*
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* WDINTRLEN - Watch Dog Timer Interrupt Length
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* This register controls the duration length of wd_rst, wd_intr and wd_ext.
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* The default value is 0xFF.
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*/
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#define FTWDT010_WDINTRLEN(x) ((x) & 0xff)
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/*
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* Variable timeout should be set in ms.
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* (CONFIG_SYS_CLK_FREQ/1000) equals 1 ms.
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* WDLOAD = timeout * TIMEOUT_FACTOR.
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*/
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#define FTWDT010_TIMEOUT_FACTOR (CONFIG_SYS_CLK_FREQ / 1000) /* 1 ms */
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#endif /* __FTWDT010_H */
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