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https://github.com/AsahiLinux/u-boot
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update/fix PDNB3 board
Signed-off-by: Michael Schwingen <michael@schwingen.org>
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parent
973af335e6
commit
904ec57b33
2 changed files with 7 additions and 5 deletions
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@ -1,2 +0,0 @@
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#
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CONFIG_SYS_TEXT_BASE = 0x01f00000
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@ -50,9 +50,6 @@
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/*
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* Misc configuration options
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*/
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#define CONFIG_USE_IRQ 1 /* we need IRQ stuff for timer */
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#define CONFIG_TIMER_IRQ
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#define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */
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#define CONFIG_SYS_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */
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@ -117,6 +114,7 @@
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#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
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#define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */
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#define CONFIG_IXP425_TIMER_CLK 66666666
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#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
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/* valid baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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@ -188,6 +186,7 @@
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#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
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#define CONFIG_SYS_TEXT_BASE 0x50000000
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#define CONFIG_SYS_FLASH_BASE 0x50000000
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#if defined(CONFIG_SCPU)
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@ -345,4 +344,9 @@
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*/
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#define CONFIG_SYS_CACHELINE_SIZE 32
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/* additions for new relocation code, must be added to all boards */
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
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#endif /* __CONFIG_H */
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