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https://github.com/AsahiLinux/u-boot
synced 2024-11-25 06:00:43 +00:00
fsl/board/ddr: optimize board-specific cpo for erratum A-009942
Optimize board-specific cpo for erratum A-009942 on b4860qds, ls1043aqds, ls1043ardb, ls1046aqds, ls1046ardb, ls2080ardb, t102xqds, t102xrdb, t1040qds, t104xrdb, t208xqds, t208xrdb, t4qds, t4rdb boards. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
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473f1fc280
commit
90101386f1
14 changed files with 42 additions and 0 deletions
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@ -171,6 +171,9 @@ found:
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/* DHC_EN =1, ODT = 75 Ohm */
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/* DHC_EN =1, ODT = 75 Ohm */
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x3e;
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}
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}
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phys_size_t initdram(int board_type)
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phys_size_t initdram(int board_type)
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@ -96,6 +96,9 @@ found:
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
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DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
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DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x59;
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#else
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#else
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popts->cswl_override = DDR_CSWL_CS0;
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popts->cswl_override = DDR_CSWL_CS0;
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@ -91,6 +91,9 @@ found:
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/* Enable ZQ calibration */
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/* Enable ZQ calibration */
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popts->zq_en = 1;
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popts->zq_en = 1;
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x46;
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
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DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
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DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
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@ -87,6 +87,9 @@ found:
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
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DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2;
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DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2;
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x70;
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}
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}
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phys_size_t initdram(int board_type)
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phys_size_t initdram(int board_type)
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@ -91,6 +91,9 @@ found:
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
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DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2;
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DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2;
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x70;
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}
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}
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phys_size_t initdram(int board_type)
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phys_size_t initdram(int board_type)
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@ -134,6 +134,9 @@ found:
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/* Enable ZQ calibration */
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/* Enable ZQ calibration */
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popts->zq_en = 1;
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popts->zq_en = 1;
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x6e;
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if (ddr_freq < 2350) {
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if (ddr_freq < 2350) {
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if (pdimm[0].n_ranks == 2 && pdimm[1].n_ranks == 2) {
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if (pdimm[0].n_ranks == 2 && pdimm[1].n_ranks == 2) {
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/* four chip-selects */
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/* four chip-selects */
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@ -139,6 +139,9 @@ found:
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#else
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#else
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x5f;
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#endif
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#endif
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/* T1023 supports max DDR bus 32bit width, T1024 supports DDR 64bit,
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/* T1023 supports max DDR bus 32bit width, T1024 supports DDR 64bit,
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@ -139,6 +139,10 @@ found:
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#ifdef CONFIG_T1023RDB
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#ifdef CONFIG_T1023RDB
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popts->wrlvl_ctl_2 = 0x07070606;
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popts->wrlvl_ctl_2 = 0x07070606;
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popts->half_strength_driver_enable = 1;
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popts->half_strength_driver_enable = 1;
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popts->cpo_sample = 0x43;
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#elif defined(CONFIG_T1024RDB)
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x52;
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#endif
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#endif
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}
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}
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@ -95,6 +95,9 @@ found:
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
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DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
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DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x69;
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#else
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#else
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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@ -77,6 +77,8 @@ found:
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*/
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*/
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#ifdef CONFIG_SYS_FSL_DDR4
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#ifdef CONFIG_SYS_FSL_DDR4
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popts->half_strength_driver_enable = 1;
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popts->half_strength_driver_enable = 1;
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x59;
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#else
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#else
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popts->half_strength_driver_enable = 0;
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popts->half_strength_driver_enable = 0;
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#endif
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#endif
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@ -99,6 +99,9 @@ found:
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/* DHC_EN =1, ODT = 75 Ohm */
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/* DHC_EN =1, ODT = 75 Ohm */
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x64;
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}
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}
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phys_size_t initdram(int board_type)
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phys_size_t initdram(int board_type)
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@ -92,6 +92,9 @@ found:
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/* DHC_EN =1, ODT = 75 Ohm */
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/* DHC_EN =1, ODT = 75 Ohm */
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x54;
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}
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}
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phys_size_t initdram(int board_type)
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phys_size_t initdram(int board_type)
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@ -107,6 +107,9 @@ found:
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/* DHC_EN =1, ODT = 75 Ohm */
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/* DHC_EN =1, ODT = 75 Ohm */
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x63;
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}
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}
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phys_size_t initdram(int board_type)
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phys_size_t initdram(int board_type)
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@ -100,6 +100,9 @@ found:
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/* DHC_EN =1, ODT = 75 Ohm */
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/* DHC_EN =1, ODT = 75 Ohm */
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
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/* optimize cpo for erratum A-009942 */
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popts->cpo_sample = 0x64;
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}
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}
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phys_size_t initdram(int board_type)
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phys_size_t initdram(int board_type)
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