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clk: sandbox: add composite clk
Add composite clk to sandbox driver Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
parent
7bd6432210
commit
8f611dc71c
2 changed files with 81 additions and 0 deletions
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@ -130,6 +130,80 @@ U_BOOT_DRIVER(sandbox_clk_gate2) = {
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.ops = &clk_gate2_ops,
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.ops = &clk_gate2_ops,
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};
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};
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static unsigned long sandbox_clk_composite_divider_recalc_rate(struct clk *clk)
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{
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struct clk_divider *divider = (struct clk_divider *)to_clk_divider(clk);
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struct clk_composite *composite = (struct clk_composite *)clk->data;
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ulong parent_rate = clk_get_parent_rate(&composite->clk);
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unsigned int val;
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val = divider->io_divider_val;
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val >>= divider->shift;
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val &= clk_div_mask(divider->width);
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return divider_recalc_rate(clk, parent_rate, val, divider->table,
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divider->flags, divider->width);
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}
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static const struct clk_ops sandbox_clk_composite_divider_ops = {
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.get_rate = sandbox_clk_composite_divider_recalc_rate,
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};
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struct clk *sandbox_clk_composite(const char *name,
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const char * const *parent_names,
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int num_parents, void __iomem *reg,
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unsigned long flags)
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{
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struct clk *clk = ERR_PTR(-ENOMEM);
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struct clk_divider *div = NULL;
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struct clk_gate *gate = NULL;
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struct clk_mux *mux = NULL;
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mux = kzalloc(sizeof(*mux), GFP_KERNEL);
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if (!mux)
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goto fail;
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mux->reg = reg;
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mux->shift = 24;
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mux->mask = 0x7;
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mux->num_parents = num_parents;
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mux->flags = flags;
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mux->parent_names = parent_names;
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div = kzalloc(sizeof(*div), GFP_KERNEL);
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if (!div)
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goto fail;
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div->reg = reg;
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div->shift = 16;
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div->width = 3;
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div->flags = CLK_DIVIDER_ROUND_CLOSEST | flags;
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gate = kzalloc(sizeof(*gate), GFP_KERNEL);
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if (!gate)
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goto fail;
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gate->reg = reg;
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gate->bit_idx = 28;
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gate->flags = flags;
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clk = clk_register_composite(NULL, name,
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parent_names, num_parents,
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&mux->clk, &clk_mux_ops, &div->clk,
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&sandbox_clk_composite_divider_ops,
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&gate->clk, &clk_gate_ops, flags);
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if (IS_ERR(clk))
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goto fail;
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return clk;
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fail:
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kfree(gate);
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kfree(div);
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kfree(mux);
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return ERR_CAST(clk);
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}
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/* --- Sandbox Gate --- */
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/* --- Sandbox Gate --- */
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/* The CCF core driver itself */
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/* The CCF core driver itself */
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static const struct udevice_id sandbox_clk_ccf_test_ids[] = {
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static const struct udevice_id sandbox_clk_ccf_test_ids[] = {
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@ -138,6 +212,7 @@ static const struct udevice_id sandbox_clk_ccf_test_ids[] = {
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};
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};
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static const char *const usdhc_sels[] = { "pll3_60m", "pll3_80m", };
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static const char *const usdhc_sels[] = { "pll3_60m", "pll3_80m", };
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static const char *const i2c_sels[] = { "pll3_60m", "pll3_80m", };
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static int sandbox_clk_ccf_probe(struct udevice *dev)
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static int sandbox_clk_ccf_probe(struct udevice *dev)
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{
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{
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@ -174,6 +249,11 @@ static int sandbox_clk_ccf_probe(struct udevice *dev)
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sandbox_clk_mux("usdhc2_sel", ®, 17, 1, usdhc_sels,
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sandbox_clk_mux("usdhc2_sel", ®, 17, 1, usdhc_sels,
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ARRAY_SIZE(usdhc_sels)));
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ARRAY_SIZE(usdhc_sels)));
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reg = BIT(28) | BIT(24) | BIT(16);
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clk_dm(SANDBOX_CLK_I2C,
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sandbox_clk_composite("i2c", i2c_sels, ARRAY_SIZE(i2c_sels),
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®, 0));
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return 0;
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return 0;
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}
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}
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@ -19,6 +19,7 @@ enum {
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SANDBOX_CLK_ECSPI1,
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SANDBOX_CLK_ECSPI1,
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SANDBOX_CLK_USDHC1_SEL,
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SANDBOX_CLK_USDHC1_SEL,
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SANDBOX_CLK_USDHC2_SEL,
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SANDBOX_CLK_USDHC2_SEL,
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SANDBOX_CLK_I2C,
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};
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};
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enum sandbox_pllv3_type {
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enum sandbox_pllv3_type {
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