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powerpc/85xx: Fix e6500 L2 cache stash IDs
The value written to L2CSR1 didn't match the value written to the device tree. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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1 changed files with 9 additions and 5 deletions
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@ -275,12 +275,16 @@ static inline void ft_fixup_l2cache(void *blob)
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u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
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#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
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/* Only initialize every eighth thread */
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if (reg && !((*reg) % 8))
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#else
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if (reg)
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#endif
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if (reg && !((*reg) % 8)) {
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fdt_setprop_cell(blob, l2_off, "cache-stash-id",
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(*reg * 2) + 32 + 1);
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(*reg / 4) + 32 + 1);
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}
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#else
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if (reg) {
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fdt_setprop_cell(blob, l2_off, "cache-stash-id",
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(*reg * 2) + 32 + 1);
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}
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#endif
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#endif
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fdt_setprop(blob, l2_off, "cache-unified", NULL, 0);
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