armv8: ls2080aqds: disable IFC NOR & QIXIS when QSPI enable

When QSPI is enabled, NOR flash and QIXIS can't be accessed
through IFC due to pin mux. Enable I2C QIXIS access and I2C
early init to read the sysclk and ddrclk.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Yuan Yao 2016-06-08 18:24:54 +08:00 committed by York Sun
parent 82d13340e9
commit 8c77ef8540
2 changed files with 13 additions and 0 deletions

View file

@ -219,6 +219,9 @@ int board_init(void)
int board_early_init_f(void)
{
#ifdef CONFIG_SYS_I2C_EARLY_INIT
i2c_early_init_f();
#endif
fsl_lsch3_early_init_f();
#ifdef CONFIG_FSL_QSPI
/* input clk: 1/2 platform clk, output: input/20 */

View file

@ -17,6 +17,16 @@ unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_FSL_CLK
#ifdef CONFIG_FSL_QSPI
#define CONFIG_SYS_NO_FLASH
#undef CONFIG_CMD_IMLS
#define CONFIG_QIXIS_I2C_ACCESS
#define CONFIG_SYS_I2C_EARLY_INIT
#define CONFIG_SYS_I2C_IFDR_DIV 0x7e
#endif
#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)