mirror of
https://github.com/AsahiLinux/u-boot
synced 2025-03-13 21:36:57 +00:00
Implement SC520 timers
Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
This commit is contained in:
parent
6d7f610b09
commit
8c63d47651
7 changed files with 259 additions and 243 deletions
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@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(CPU).a
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START = start.o start16.o resetvec.o
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COBJS = serial.o interrupts.o exceptions.o cpu.o timer.o
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COBJS = serial.o interrupts.o exceptions.o cpu.o
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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@ -27,47 +27,56 @@
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#include <asm/interrupt.h>
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#include <asm/ic/sc520.h>
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void reset_timer(void)
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void sc520_timer_isr(void)
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{
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write_mmcr_word(SC520_GPTMR0CNT, 0);
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write_mmcr_word(SC520_GPTMR0CTL, 0x6001);
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/* Ack the GP Timer Interrupt */
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write_mmcr_byte (SC520_GPTMRSTA, 0x02);
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}
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ulong get_timer(ulong base)
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int timer_init(void)
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{
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/* fixme: 30 or 33 */
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return read_mmcr_word(SC520_GPTMR0CNT) / 33;
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}
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/* Map GP Timer 1 to Master PIC IR0 */
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write_mmcr_byte (SC520_GPTMR1MAP, 0x01);
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void set_timer(ulong t)
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{
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/* FixMe: use two cascade coupled timers */
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write_mmcr_word(SC520_GPTMR0CTL, 0x4001);
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write_mmcr_word(SC520_GPTMR0CNT, t*33);
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write_mmcr_word(SC520_GPTMR0CTL, 0x6001);
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}
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/* Disable GP Timers 1 & 2 - Allow configuration writes */
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write_mmcr_word (SC520_GPTMR1CTL, 0x4000);
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write_mmcr_word (SC520_GPTMR2CTL, 0x4000);
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/* Reset GP Timers 1 & 2 */
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write_mmcr_word (SC520_GPTMR1CNT, 0x0000);
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write_mmcr_word (SC520_GPTMR2CNT, 0x0000);
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/* Setup GP Timer 2 as a 100kHz (10us) prescaler */
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write_mmcr_word (SC520_GPTMR2MAXCMPA, 83);
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write_mmcr_word (SC520_GPTMR2CTL, 0xc001);
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/* Setup GP Timer 1 as a 1000 Hz (1ms) interrupt generator */
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write_mmcr_word (SC520_GPTMR1MAXCMPA, 100);
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write_mmcr_word (SC520_GPTMR1CTL, 0xe009);
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/* Clear the GP Timers status register */
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write_mmcr_byte (SC520_GPTMRSTA, 0x07);
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/* Register the SC520 specific timer interrupt handler */
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register_timer_isr (sc520_timer_isr);
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/* Install interrupt handler for GP Timer 1 */
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irq_install_handler (0, timer_isr, NULL);
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unmask_irq (0);
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return 0;
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}
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void udelay(unsigned long usec)
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{
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int m=0;
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int m = 0;
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long u;
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read_mmcr_word(SC520_SWTMRMILLI);
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read_mmcr_word(SC520_SWTMRMICRO);
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read_mmcr_word (SC520_SWTMRMILLI);
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read_mmcr_word (SC520_SWTMRMICRO);
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#if 0
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/* do not enable this line, udelay is used in the serial driver -> recursion */
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printf("udelay: %ld m.u %d.%d tm.tu %d.%d\n", usec, m, u, tm, tu);
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#endif
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while (1) {
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m += read_mmcr_word(SC520_SWTMRMILLI);
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u = read_mmcr_word(SC520_SWTMRMICRO) + (m * 1000);
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if (usec <= u) {
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break;
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}
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}
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do {
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m += read_mmcr_word (SC520_SWTMRMILLI);
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u = read_mmcr_word (SC520_SWTMRMICRO) + (m * 1000);
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} while (u < usec);
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}
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211
cpu/i386/timer.c
211
cpu/i386/timer.c
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@ -1,211 +0,0 @@
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/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/i8254.h>
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#include <asm/ibmpc.h>
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static volatile unsigned long system_ticks;
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static int timer_init_done =0;
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static void timer_isr(void *unused)
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{
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system_ticks++;
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}
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unsigned long get_system_ticks(void)
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{
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return system_ticks;
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}
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#define TIMER0_VALUE 0x04aa /* 1kHz 1.9318MHz / 1000 */
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#define TIMER2_VALUE 0x0a8e /* 440Hz */
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int timer_init(void)
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{
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system_ticks = 0;
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irq_install_handler(0, timer_isr, NULL);
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/* initialize timer 0 and 2
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*
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* Timer 0 is used to increment system_tick 1000 times/sec
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* Timer 1 was used for DRAM refresh in early PC's
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* Timer 2 is used to drive the speaker
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* (to stasrt a beep: write 3 to port 0x61,
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* to stop it again: write 0)
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*/
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outb(PIT_CMD_CTR0|PIT_CMD_BOTH|PIT_CMD_MODE2, PIT_BASE + PIT_COMMAND);
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outb(TIMER0_VALUE&0xff, PIT_BASE + PIT_T0);
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outb(TIMER0_VALUE>>8, PIT_BASE + PIT_T0);
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outb(PIT_CMD_CTR2|PIT_CMD_BOTH|PIT_CMD_MODE3, PIT_BASE + PIT_COMMAND);
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outb(TIMER2_VALUE&0xff, PIT_BASE + PIT_T2);
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outb(TIMER2_VALUE>>8, PIT_BASE + PIT_T2);
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timer_init_done = 1;
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return 0;
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}
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#ifdef CONFIG_SYS_GENERIC_TIMER
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/* the unit for these is CONFIG_SYS_HZ */
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/* FixMe: implement these */
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void reset_timer (void)
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{
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system_ticks = 0;
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}
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ulong get_timer (ulong base)
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{
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return (system_ticks - base);
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}
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void set_timer (ulong t)
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{
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system_ticks = t;
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}
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static u16 read_pit(void)
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{
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u8 low;
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outb(PIT_CMD_LATCH, PIT_BASE + PIT_COMMAND);
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low = inb(PIT_BASE + PIT_T0);
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return ((inb(PIT_BASE + PIT_T0) << 8) | low);
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}
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/* this is not very exact */
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void udelay (unsigned long usec)
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{
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int counter;
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int wraps;
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if (!timer_init_done) {
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return;
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}
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counter = read_pit();
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wraps = usec/1000;
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usec = usec%1000;
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usec*=1194;
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usec/=1000;
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usec+=counter;
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if (usec > 1194) {
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usec-=1194;
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wraps++;
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}
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while (1) {
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int new_count = read_pit();
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if (((new_count < usec) && !wraps) || wraps < 0) {
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break;
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}
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if (new_count > counter) {
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wraps--;
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}
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counter = new_count;
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}
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}
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#if 0
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/* this is a version with debug output */
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void _udelay (unsigned long usec)
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{
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int counter;
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int wraps;
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int usec1, usec2, usec3;
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int wraps1, wraps2, wraps3, wraps4;
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int ctr1, ctr2, ctr3, nct1, nct2;
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int i;
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usec1=usec;
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if (!timer_init_done) {
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return;
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}
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counter = read_pit();
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ctr1 = counter;
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wraps = usec/1000;
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usec = usec%1000;
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usec2 = usec;
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wraps1 = wraps;
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usec*=1194;
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usec/=1000;
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usec+=counter;
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if (usec > 1194) {
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usec-=1194;
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wraps++;
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}
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usec3 = usec;
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wraps2 = wraps;
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ctr2 = wraps3 = nct1 = 4711;
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ctr3 = wraps4 = nct2 = 4711;
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i=0;
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while (1) {
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int new_count = read_pit();
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i++;
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if ((new_count < usec && !wraps) || wraps < 0) {
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break;
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}
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if (new_count > counter) {
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wraps--;
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}
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if (ctr2==4711) {
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ctr2 = counter;
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wraps3 = wraps;
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nct1 = new_count;
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} else {
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ctr3 = counter;
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wraps4 = wraps;
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nct2 = new_count;
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}
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counter = new_count;
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}
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printf("udelay(%d)\n", usec1);
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printf("counter %d\n", ctr1);
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printf("1: wraps %d, usec %d\n", wraps1, usec2);
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printf("2: wraps %d, usec %d\n", wraps2, usec3);
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printf("new_count[0] %d counter %d wraps %d\n", nct1, ctr2, wraps3);
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printf("new_count[%d] %d counter %d wraps %d\n", i, nct2, ctr3, wraps4);
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printf("%d %d %d %d %d\n",
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read_pit(), read_pit(), read_pit(),
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read_pit(), read_pit());
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}
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#endif
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#endif
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@ -43,6 +43,13 @@ extern ulong i386boot_bios_size; /* size of BIOS emulation code */
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/* cpu/.../cpu.c */
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int cpu_init(void);
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/* cpu/.../timer.c */
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void timer_isr(void *);
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typedef void (timer_fnc_t) (void);
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int register_timer_isr (timer_fnc_t *isr_func);
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/* Architecture specific - can be in cpu/i386/, lib_i386/, or $(BOARD)/ */
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int timer_init(void);
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/* cpu/.../interrupts.c */
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@ -39,7 +39,9 @@ COBJS-y += video_bios.o
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COBJS-y += video.o
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COBJS-y += zimage.o
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COBJS-y += interrupts.o
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COBJS-y += timer.o
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COBJS-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o
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COBJS-$(CONFIG_SYS_GENERIC_TIMER) += pcat_timer.o
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SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
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102
lib_i386/pcat_timer.c
Normal file
102
lib_i386/pcat_timer.c
Normal file
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@ -0,0 +1,102 @@
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/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
|
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* published by the Free Software Foundation; either version 2 of
|
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* the License, or (at your option) any later version.
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*
|
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* This program is distributed in the hope that it will be useful,
|
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
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* along with this program; if not, write to the Free Software
|
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/i8254.h>
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#include <asm/ibmpc.h>
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#define TIMER0_VALUE 0x04aa /* 1kHz 1.9318MHz / 1000 */
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#define TIMER2_VALUE 0x0a8e /* 440Hz */
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int timer_init(void)
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{
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/* initialize timer 0 and 2
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*
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* Timer 0 is used to increment system_tick 1000 times/sec
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* Timer 1 was used for DRAM refresh in early PC's
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* Timer 2 is used to drive the speaker
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* (to stasrt a beep: write 3 to port 0x61,
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* to stop it again: write 0)
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*/
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outb (PIT_CMD_CTR0 | PIT_CMD_BOTH | PIT_CMD_MODE2,
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PIT_BASE + PIT_COMMAND);
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outb (TIMER0_VALUE & 0xff, PIT_BASE + PIT_T0);
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outb (TIMER0_VALUE >> 8, PIT_BASE + PIT_T0);
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outb (PIT_CMD_CTR2 | PIT_CMD_BOTH | PIT_CMD_MODE3,
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PIT_BASE + PIT_COMMAND);
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outb (TIMER2_VALUE & 0xff, PIT_BASE + PIT_T2);
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outb (TIMER2_VALUE >> 8, PIT_BASE + PIT_T2);
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irq_install_handler (0, timer_isr, NULL);
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unmask_irq (0);
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return 0;
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}
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static u16 read_pit(void)
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{
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u8 low;
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outb (PIT_CMD_LATCH, PIT_BASE + PIT_COMMAND);
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low = inb (PIT_BASE + PIT_T0);
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return ((inb (PIT_BASE + PIT_T0) << 8) | low);
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}
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/* this is not very exact */
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void udelay (unsigned long usec)
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{
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int counter;
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int wraps;
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if (timer_init_done)
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{
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counter = read_pit ();
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wraps = usec / 1000;
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usec = usec % 1000;
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usec *= 1194;
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usec /= 1000;
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usec += counter;
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while (usec > 1194) {
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usec -= 1194;
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wraps++;
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}
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while (1) {
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int new_count = read_pit ();
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if (((new_count < usec) && !wraps) || wraps < 0)
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break;
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if (new_count > counter)
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wraps--;
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counter = new_count;
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}
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}
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}
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107
lib_i386/timer.c
Normal file
107
lib_i386/timer.c
Normal file
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@ -0,0 +1,107 @@
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/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
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*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
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*/
|
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#include <common.h>
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#include <malloc.h>
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#include <asm/io.h>
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#include <asm/i8254.h>
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#include <asm/ibmpc.h>
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struct timer_isr_function {
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struct timer_isr_function *next;
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timer_fnc_t *isr_func;
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};
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static struct timer_isr_function *first_timer_isr = NULL;
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static volatile unsigned long system_ticks = 0;
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/*
|
||||
* register_timer_isr() allows multiple architecture and board specific
|
||||
* functions to be called every millisecond. Keep the execution time of
|
||||
* each function as low as possible
|
||||
*/
|
||||
int register_timer_isr (timer_fnc_t *isr_func)
|
||||
{
|
||||
struct timer_isr_function *new_func;
|
||||
struct timer_isr_function *temp;
|
||||
int flag;
|
||||
|
||||
new_func = malloc(sizeof(struct timer_isr_function));
|
||||
|
||||
if (new_func == NULL)
|
||||
return 1;
|
||||
|
||||
new_func->isr_func = isr_func;
|
||||
new_func->next = NULL;
|
||||
|
||||
/*
|
||||
* Don't allow timer interrupts while the
|
||||
* linked list is being modified
|
||||
*/
|
||||
flag = disable_interrupts ();
|
||||
|
||||
if (first_timer_isr == NULL) {
|
||||
first_timer_isr = new_func;
|
||||
} else {
|
||||
temp = first_timer_isr;
|
||||
while (temp->next != NULL)
|
||||
temp = temp->next;
|
||||
temp->next = new_func;
|
||||
}
|
||||
|
||||
if (flag)
|
||||
enable_interrupts ();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* timer_isr() MUST be the registered interrupt handler for
|
||||
*/
|
||||
void timer_isr(void *unused)
|
||||
{
|
||||
struct timer_isr_function *temp = first_timer_isr;
|
||||
|
||||
system_ticks++;
|
||||
|
||||
/* Execute each registered function */
|
||||
while (temp != NULL) {
|
||||
temp->isr_func ();
|
||||
temp = temp->next;
|
||||
}
|
||||
}
|
||||
|
||||
void reset_timer (void)
|
||||
{
|
||||
system_ticks = 0;
|
||||
}
|
||||
|
||||
ulong get_timer (ulong base)
|
||||
{
|
||||
return (system_ticks - base);
|
||||
}
|
||||
|
||||
void set_timer (ulong t)
|
||||
{
|
||||
system_ticks = t;
|
||||
}
|
Loading…
Add table
Reference in a new issue