From 23441fbf2bc8c3c00355be0340137bda327a8ff4 Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Mon, 22 Jul 2019 11:41:10 +0200 Subject: [PATCH 01/64] mmc: stm32_sdmmc2: Increase SDMMC_BUSYD0END_TIMEOUT_US Increase SDMMC_BUSYD0END_TIMEOUT_US from 1s to 2s to avoid timeout error during blocks erase on some sdcard Issue seen on Kingston 16GB : Device: STM32 SDMMC2 Manufacturer ID: 27 OEM: 5048 Name: SD16G Bus Speed: 50000000 Mode: SD High Speed (50MHz) card capabilities: widths [4, 1] modes [SD Legacy, SD High Speed (50MHz)] host capabilities: widths [4, 1] modes [MMC legacy, SD Legacy, MMC High Speed (26MHz), SD High Speed (50MHz), MMC High Speed (52MHz)] Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 14.5 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes Issue reproduced with following command: STM32MP> mmc erase 0 100000 MMC erase: dev # 0, block # 0, count 1048576 ... mmc erase failed 16384 blocks erased: ERROR By setting SDMMC_BUSYD0END_TIMEOUT_US at 2 seconds and by adding time measurement in stm32_sdmmc2_end_cmd() as shown below: +start = get_timer(0); /* Polling status register */ ret = readl_poll_timeout(priv->base + SDMMC_STA, status, status & mask, SDMMC_BUSYD0END_TIMEOUT_US); +printf("time = %ld ms\n", get_timer(start)); We get the following trace: STM32MP> mmc erase 0 100000 MMC erase: dev # 0, block # 0, count 1048576 ... time = 17 ms time = 1 ms time = 1025 ms time = 54 ms time = 56 ms time = 1021 ms time = 57 ms time = 56 ms time = 1020 ms time = 53 ms time = 57 ms time = 1021 ms time = 53 ms time = 57 ms time = 1313 ms time = 54 ms time = 56 ms time = 1026 ms time = 54 ms time = 56 ms time = 1036 ms time = 54 ms time = 56 ms time = 1028 ms time = 53 ms time = 56 ms time = 1027 ms time = 54 ms time = 56 ms time = 1024 ms time = 54 ms time = 56 ms time = 1020 ms time = 54 ms time = 57 ms time = 1023 ms time = 54 ms time = 56 ms time = 1033 ms time = 53 ms time = 57 ms .... time = 53 ms time = 57 ms time = 1021 ms time = 56 ms time = 56 ms time = 1026 ms time = 54 ms time = 56 ms 1048576 blocks erased: OK We see that 1 second timeout is not enough, we also see one measurement up to 1313 ms. Set the timeout to 2 second to keep a security margin. Signed-off-by: Patrice Chotard --- drivers/mmc/stm32_sdmmc2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c index 867ed569eb..0ade1b160e 100644 --- a/drivers/mmc/stm32_sdmmc2.c +++ b/drivers/mmc/stm32_sdmmc2.c @@ -190,7 +190,7 @@ struct stm32_sdmmc2_ctx { #define SDMMC_IDMACTRL_IDMAEN BIT(0) #define SDMMC_CMD_TIMEOUT 0xFFFFFFFF -#define SDMMC_BUSYD0END_TIMEOUT_US 1000000 +#define SDMMC_BUSYD0END_TIMEOUT_US 2000000 static void stm32_sdmmc2_start_data(struct stm32_sdmmc2_priv *priv, struct mmc_data *data, From 2e01fcf17c221cba2b54d0f238a39f12b0ef361a Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Wed, 24 Jul 2019 09:51:02 +0200 Subject: [PATCH 02/64] mmc: sti_sdhci: Fix sdhci_setup_cfg() call. host->mmc, host->mmc->dev and host->mmc->priv must be set before calling sdhci_setup_cfg() to avoid hang during mmc initialization. Thanks to commit 3d296365e4e8 ("mmc: sdhci: Add support for sdhci-caps-mask") which put this issue into evidence. Signed-off-by: Patrice Chotard Reviewed-by: Kever Yang --- drivers/mmc/sti_sdhci.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c index 8ed47e113d..d6c75ea601 100644 --- a/drivers/mmc/sti_sdhci.c +++ b/drivers/mmc/sti_sdhci.c @@ -97,14 +97,14 @@ static int sti_sdhci_probe(struct udevice *dev) SDHCI_QUIRK_NO_HISPD_BIT; host->host_caps = MMC_MODE_DDR_52MHz; + host->mmc = &plat->mmc; + host->mmc->dev = dev; + host->mmc->priv = host; ret = sdhci_setup_cfg(&plat->cfg, host, 50000000, 400000); if (ret) return ret; - host->mmc = &plat->mmc; - host->mmc->priv = host; - host->mmc->dev = dev; upriv->mmc = host->mmc; return sdhci_probe(dev); From 0203050e57f5e0ad6c696cb64cfbc01fd08b67c5 Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Tue, 23 Jul 2019 15:33:30 +0200 Subject: [PATCH 03/64] ARM: dts: stih410-b2260: Sync DT with kernel v5.2 Synchronize U-boot DT with kernel v5.2 for stih410-b2260. Update stih410-b2260-u-boot.dtsi accordingly. Signed-off-by: Patrice Chotard --- arch/arm/dts/stih407-clock.dtsi | 119 +++++++------ arch/arm/dts/stih407-family.dtsi | 200 ++++++++++++---------- arch/arm/dts/stih407-pinctrl.dtsi | 129 +++++--------- arch/arm/dts/stih410-b2260-u-boot.dtsi | 17 ++ arch/arm/dts/stih410-b2260.dts | 142 +++++++--------- arch/arm/dts/stih410-clock.dtsi | 110 ++++++------ arch/arm/dts/stih410-pinctrl.dtsi | 7 +- arch/arm/dts/stih410.dtsi | 227 ++++--------------------- 8 files changed, 380 insertions(+), 571 deletions(-) diff --git a/arch/arm/dts/stih407-clock.dtsi b/arch/arm/dts/stih407-clock.dtsi index 13029c03d7..1ab40db7c9 100644 --- a/arch/arm/dts/stih407-clock.dtsi +++ b/arch/arm/dts/stih407-clock.dtsi @@ -1,38 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2014 STMicroelectronics R&D Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ #include / { + /* + * Fixed 30MHz oscillator inputs to SoC + */ + clk_sysin: clk-sysin { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <30000000>; + }; + + clk_tmdsout_hdmi: clk-tmdsout-hdmi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; + clocks { #address-cells = <1>; #size-cells = <1>; ranges; - /* - * Fixed 30MHz oscillator inputs to SoC - */ - clk_sysin: clk-sysin { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <30000000>; - }; - - /* - * ARM Peripheral clock for timers - */ - arm_periph_clk: clk-m-a9-periphs { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - - clocks = <&clk_m_a9>; - clock-div = <2>; - clock-mult = <1>; - }; - /* * A9 PLL. */ @@ -62,35 +53,22 @@ <&clockgen_a9_pll 0>, <&clk_s_c0_flexgen 13>, <&clk_m_a9_ext2f_div2>; + + + /* + * ARM Peripheral clock for timers + */ + arm_periph_clk: clk-m-a9-periphs { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + + clocks = <&clk_m_a9>; + clock-div = <2>; + clock-mult = <1>; + }; }; - /* - * ARM Peripheral clock for timers - */ - clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - - clocks = <&clk_s_c0_flexgen 13>; - - clock-output-names = "clk-m-a9-ext2f-div2"; - - clock-div = <2>; - clock-mult = <1>; - }; - - /* - * Bootloader initialized system infrastructure clock for - * serial devices. - */ - clk_ext2f_a9: clockgen-c0@13 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <200000000>; - clock-output-names = "clk-s-icn-reg-0"; - }; - - clockgen-a@090ff000 { + clockgen-a@90ff000 { compatible = "st,clkgen-c32"; reg = <0x90ff000 0x1000>; @@ -101,6 +79,7 @@ clocks = <&clk_sysin>; clock-output-names = "clk-s-a0-pll-ofd-0"; + clock-critical = <0>; /* clk-s-a0-pll-ofd-0 */ }; clk_s_a0_flexgen: clk-s-a0-flexgen { @@ -112,6 +91,7 @@ <&clk_sysin>; clock-output-names = "clk-ic-lmi0"; + clock-critical = ; }; }; @@ -126,9 +106,10 @@ "clk-s-c0-fs0-ch1", "clk-s-c0-fs0-ch2", "clk-s-c0-fs0-ch3"; + clock-critical = <0>; /* clk-s-c0-fs0-ch0 */ }; - clk_s_c0: clockgen-c@09103000 { + clk_s_c0: clockgen-c@9103000 { compatible = "st,clkgen-c32"; reg = <0x9103000 0x1000>; @@ -139,6 +120,7 @@ clocks = <&clk_sysin>; clock-output-names = "clk-s-c0-pll0-odf-0"; + clock-critical = <0>; /* clk-s-c0-pll0-odf-0 */ }; clk_s_c0_pll1: clk-s-c0-pll1 { @@ -194,6 +176,27 @@ "clk-main-disp", "clk-aux-disp", "clk-compo-dvp"; + clock-critical = , + , + , + , + , + ; + + /* + * ARM Peripheral clock for timers + */ + clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + + clocks = <&clk_s_c0_flexgen 13>; + + clock-output-names = "clk-m-a9-ext2f-div2"; + + clock-div = <2>; + clock-mult = <1>; + }; }; }; @@ -210,7 +213,7 @@ "clk-s-d0-fs0-ch3"; }; - clockgen-d0@09104000 { + clockgen-d0@9104000 { compatible = "st,clkgen-c32"; reg = <0x9104000 0x1000>; @@ -244,13 +247,7 @@ "clk-s-d2-fs0-ch3"; }; - clk_tmdsout_hdmi: clk-tmdsout-hdmi { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <0>; - }; - - clockgen-d2@x9106000 { + clockgen-d2@9106000 { compatible = "st,clkgen-c32"; reg = <0x9106000 0x1000>; diff --git a/arch/arm/dts/stih407-family.dtsi b/arch/arm/dts/stih407-family.dtsi index 6c6de58029..7c36c37260 100644 --- a/arch/arm/dts/stih407-family.dtsi +++ b/arch/arm/dts/stih407-family.dtsi @@ -1,10 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2014 STMicroelectronics Limited. * Author: Giuseppe Cavallaro - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * publishhed by the Free Software Foundation. */ #include "stih407-pinctrl.dtsi" #include @@ -20,7 +17,13 @@ #size-cells = <1>; ranges; - dmu_reserved: rproc@44000000 { + gp0_reserved: rproc@45000000 { + compatible = "shared-dma-pool"; + reg = <0x45000000 0x00400000>; + no-map; + }; + + delta_reserved: rproc@44000000 { compatible = "shared-dma-pool"; reg = <0x44000000 0x01000000>; no-map; @@ -47,6 +50,7 @@ clocks = <&clk_m_a9>; clock-names = "cpu"; clock-latency = <100000>; + cpu0-supply = <&pwm_regulator>; st,syscfg = <&syscfg_core 0x8e0>; }; cpu@1 { @@ -65,19 +69,19 @@ }; }; - intc: interrupt-controller@08761000 { + intc: interrupt-controller@8761000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; interrupt-controller; reg = <0x08761000 0x1000>, <0x08760100 0x100>; }; - scu@08760000 { + scu@8760000 { compatible = "arm,cortex-a9-scu"; reg = <0x08760000 0x1000>; }; - timer@08760200 { + timer@8760200 { interrupt-parent = <&intc>; compatible = "arm,cortex-a9-global-timer"; reg = <0x08760200 0x100>; @@ -85,7 +89,7 @@ clocks = <&arm_periph_clk>; }; - l2: cache-controller { + l2: cache-controller@8762000 { compatible = "arm,pl310-cache"; reg = <0x08762000 0x1000>; arm,data-latency = <3 3 3>; @@ -118,24 +122,28 @@ ranges; compatible = "simple-bus"; - restart { + restart: restart-controller@0 { compatible = "st,stih407-restart"; + reg = <0 0>; st,syscfg = <&syscfg_sbc_reg>; status = "okay"; }; - powerdown: powerdown-controller { + powerdown: powerdown-controller@0 { compatible = "st,stih407-powerdown"; + reg = <0 0>; #reset-cells = <1>; }; - softreset: softreset-controller { + softreset: softreset-controller@0 { compatible = "st,stih407-softreset"; + reg = <0 0>; #reset-cells = <1>; }; - picophyreset: picophyreset-controller { + picophyreset: picophyreset-controller@0 { compatible = "st,stih407-picophyreset"; + reg = <0 0>; #reset-cells = <1>; }; @@ -167,6 +175,13 @@ syscfg_core: core-syscfg@92b0000 { compatible = "st,stih407-core-syscfg", "syscon"; reg = <0x92b0000 0x1000>; + + sti_sasg_codec: sti-sasg-codec { + compatible = "st,stih407-sas-codec"; + #sound-dai-cells = <1>; + status = "disabled"; + st,syscfg = <&syscfg_core>; + }; }; syscfg_lpm: lpm-syscfg@94b5100 { @@ -174,8 +189,9 @@ reg = <0x94b5100 0x1000>; }; - irq-syscfg { + irq-syscfg@0 { compatible = "st,stih407-irq-syscfg"; + reg = <0 0>; st,syscfg = <&syscfg_core>; st,irq-device = , ; @@ -187,22 +203,21 @@ vtg_main: sti-vtg-main@8d02800 { compatible = "st,vtg"; reg = <0x8d02800 0x200>; - interrupts = ; + interrupts = ; }; vtg_aux: sti-vtg-aux@8d00200 { compatible = "st,vtg"; reg = <0x8d00200 0x100>; - interrupts = ; + interrupts = ; }; serial@9830000 { compatible = "st,asc"; reg = <0x9830000 0x2c>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_serial0>; + interrupts = ; clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; + /* Pinctrl moved out to a per-board configuration */ status = "disabled"; }; @@ -210,7 +225,7 @@ serial@9831000 { compatible = "st,asc"; reg = <0x9831000 0x2c>; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_serial1>; clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; @@ -221,7 +236,7 @@ serial@9832000 { compatible = "st,asc"; reg = <0x9832000 0x2c>; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_serial2>; clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>; @@ -233,7 +248,7 @@ sbc_serial0: serial@9530000 { compatible = "st,asc"; reg = <0x9530000 0x2c>; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sbc_serial0>; clocks = <&clk_sysin>; @@ -244,7 +259,7 @@ serial@9531000 { compatible = "st,asc"; reg = <0x9531000 0x2c>; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sbc_serial1>; clocks = <&clk_sysin>; @@ -374,8 +389,9 @@ status = "disabled"; }; - usb2_picophy0: phy1 { + usb2_picophy0: phy1@0 { compatible = "st,stih407-usb2-phy"; + reg = <0 0>; #phy-cells = <0>; st,syscfg = <&syscfg_core 0x100 0xf4>; resets = <&softreset STIH407_PICOPHY_SOFTRESET>, @@ -383,12 +399,13 @@ reset-names = "global", "port"; }; - miphy28lp_phy: miphy28lp@9b22000 { + miphy28lp_phy: miphy28lp@0 { compatible = "st,miphy28lp-phy"; st,syscfg = <&syscfg_core>; #address-cells = <1>; #size-cells = <1>; ranges; + reg = <0 0>; phy_port0: port@9b22000 { reg = <0x9b22000 0xff>, @@ -458,6 +475,8 @@ clock-names = "ssc"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1_default>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; @@ -470,6 +489,8 @@ clock-names = "ssc"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi2_default>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; @@ -482,6 +503,8 @@ clock-names = "ssc"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi3_default>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; @@ -494,6 +517,8 @@ clock-names = "ssc"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi4_default>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; @@ -507,6 +532,8 @@ clock-names = "ssc"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi10_default>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; @@ -519,6 +546,8 @@ clock-names = "ssc"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi11_default>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; @@ -531,16 +560,18 @@ clock-names = "ssc"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi12_default>; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; - mmc0: sdhci@09060000 { + mmc0: sdhci@9060000 { compatible = "st,sdhci-stih407", "st,sdhci"; status = "disabled"; reg = <0x09060000 0x7ff>, <0x9061008 0x20>; reg-names = "mmc", "top-mmc-delay"; - interrupts = ; + interrupts = ; interrupt-names = "mmcirq"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mmc0>; @@ -550,12 +581,12 @@ bus-width = <8>; }; - mmc1: sdhci@09080000 { + mmc1: sdhci@9080000 { compatible = "st,sdhci-stih407", "st,sdhci"; status = "disabled"; reg = <0x09080000 0x7ff>; reg-names = "mmc"; - interrupts = ; + interrupts = ; interrupt-names = "mmcirq"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sd1>; @@ -563,7 +594,6 @@ clocks = <&clk_s_c0_flexgen CLK_MMC_1>, <&clk_s_c0_flexgen CLK_RX_ICN_HVA>; resets = <&softreset STIH407_MMC1_SOFTRESET>; - reset-names = "softreset"; bus-width = <4>; }; @@ -590,7 +620,7 @@ compatible = "st,ahci"; reg = <0x9b20000 0x1000>; - interrupts = ; + interrupts = ; interrupt-names = "hostc"; phys = <&phy_port0 PHY_TYPE_SATA>; @@ -613,7 +643,7 @@ compatible = "st,ahci"; reg = <0x9b28000 0x1000>; - interrupts = ; + interrupts = ; interrupt-names = "hostc"; phys = <&phy_port1 PHY_TYPE_SATA>; @@ -654,11 +684,12 @@ dwc3: dwc3@9900000 { compatible = "snps,dwc3"; reg = <0x09900000 0x100000>; - interrupts = ; - dr_mode = "peripheral"; + interrupts = ; + dr_mode = "host"; phy-names = "usb2-phy", "usb3-phy"; phys = <&usb2_picophy0>, <&phy_port2 PHY_TYPE_USB3>; + snps,dis_u3_susphy_quirk; }; }; @@ -667,7 +698,7 @@ compatible = "st,sti-pwm"; #pwm-cells = <2>; reg = <0x9810000 0x68>; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm0_chan0_default>; clock-names = "pwm"; @@ -682,6 +713,7 @@ compatible = "st,sti-pwm"; #pwm-cells = <2>; reg = <0x9510000 0x68>; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1_chan0_default &pinctrl_pwm1_chan1_default @@ -694,14 +726,14 @@ status = "disabled"; }; - rng10: rng@08a89000 { + rng10: rng@8a89000 { compatible = "st,rng"; reg = <0x08a89000 0x1000>; clocks = <&clk_sysin>; status = "okay"; }; - rng11: rng@08a8a000 { + rng11: rng@8a8a000 { compatible = "st,rng"; reg = <0x08a8a000 0x1000>; clocks = <&clk_sysin>; @@ -720,8 +752,8 @@ resets = <&softreset STIH407_ETH1_SOFTRESET>; reset-names = "stmmaceth"; - interrupts = , - ; + interrupts = , + ; interrupt-names = "macirq", "eth_wake_irq"; /* DMA Bus Mode */ @@ -735,26 +767,14 @@ <&clk_s_c0_flexgen CLK_ETH_PHY>; }; - cec: sti-cec@094a087c { - compatible = "st,stih-cec"; - reg = <0x94a087c 0x64>; - clocks = <&clk_sysin>; - clock-names = "cec-clk"; - interrupts = ; - interrupt-names = "cec-irq"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_cec0_default>; - resets = <&softreset STIH407_LPM_SOFTRESET>; - }; - - rng10: rng@08a89000 { + rng10: rng@8a89000 { compatible = "st,rng"; reg = <0x08a89000 0x1000>; clocks = <&clk_sysin>; status = "okay"; }; - rng11: rng@08a8a000 { + rng11: rng@8a8a000 { compatible = "st,rng"; reg = <0x08a8a000 0x1000>; clocks = <&clk_sysin>; @@ -764,7 +784,7 @@ mailbox0: mailbox@8f00000 { compatible = "st,stih407-mailbox"; reg = <0x8f00000 0x1000>; - interrupts = ; + interrupts = ; #mbox-cells = <2>; mbox-name = "a9"; status = "okay"; @@ -794,9 +814,24 @@ status = "okay"; }; - st231_delta: st231-delta@44000000 { + st231_gp0: st231-gp0@0 { compatible = "st,st231-rproc"; - memory-region = <&dmu_reserved>; + reg = <0 0>; + memory-region = <&gp0_reserved>; + resets = <&softreset STIH407_ST231_GP0_SOFTRESET>; + reset-names = "sw_reset"; + clocks = <&clk_s_c0_flexgen CLK_ST231_GP_0>; + clock-frequency = <600000000>; + st,syscfg = <&syscfg_core 0x22c>; + #mbox-cells = <1>; + mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx"; + mboxes = <&mailbox0 0 2>, <&mailbox2 0 1>, <&mailbox0 0 3>, <&mailbox2 0 0>; + }; + + st231_delta: st231-delta@0 { + compatible = "st,st231-rproc"; + reg = <0 0>; + memory-region = <&delta_reserved>; resets = <&softreset STIH407_ST231_DMU_SOFTRESET>; reset-names = "sw_reset"; clocks = <&clk_s_c0_flexgen CLK_ST231_DMU>; @@ -819,7 +854,7 @@ <&clk_s_c0_flexgen CLK_EXT2F_A9>, <&clk_s_c0_flexgen CLK_EXT2F_A9>, <&clk_s_c0_flexgen CLK_EXT2F_A9>; - interrupts = ; + interrupts = ; dma-channels = <16>; #dma-cells = <3>; }; @@ -837,9 +872,11 @@ <&clk_s_c0_flexgen CLK_TX_ICN_DMU>, <&clk_s_c0_flexgen CLK_EXT2F_A9>; - interrupts = ; + interrupts = ; dma-channels = <16>; #dma-cells = <3>; + + status = "disabled"; }; /* fdma free running */ @@ -850,20 +887,15 @@ <0x8e77000 0x1000>, <0x8e78000 0x8000>; reg-names = "slimcore", "dmem", "peripherals", "imem"; - interrupts = ; + interrupts = ; dma-channels = <16>; #dma-cells = <3>; clocks = <&clk_s_c0_flexgen CLK_FDMA>, <&clk_s_c0_flexgen CLK_EXT2F_A9>, <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, <&clk_s_c0_flexgen CLK_EXT2F_A9>; - }; - sti_sasg_codec: sti-sasg-codec { - compatible = "st,stih407-sas-codec"; - #sound-dai-cells = <1>; status = "disabled"; - st,syscfg = <&syscfg_core>; }; sti_uni_player0: sti-uni-player@8d80000 { @@ -875,7 +907,7 @@ assigned-clock-parents = <0>, <&clk_s_d0_quadfs 0>; assigned-clock-rates = <50000000>; reg = <0x8d80000 0x158>; - interrupts = ; + interrupts = ; dmas = <&fdma0 2 0 1>; dma-names = "tx"; @@ -891,7 +923,7 @@ assigned-clock-parents = <0>, <&clk_s_d0_quadfs 1>; assigned-clock-rates = <50000000>; reg = <0x8d81000 0x158>; - interrupts = ; + interrupts = ; dmas = <&fdma0 3 0 1>; dma-names = "tx"; @@ -907,7 +939,7 @@ assigned-clock-parents = <0>, <&clk_s_d0_quadfs 2>; assigned-clock-rates = <50000000>; reg = <0x8d82000 0x158>; - interrupts = ; + interrupts = ; dmas = <&fdma0 4 0 1>; dma-names = "tx"; @@ -923,7 +955,7 @@ assigned-clock-parents = <0>, <&clk_s_d0_quadfs 3>; assigned-clock-rates = <50000000>; reg = <0x8d85000 0x158>; - interrupts = ; + interrupts = ; dmas = <&fdma0 7 0 1>; dma-names = "tx"; @@ -935,7 +967,7 @@ #sound-dai-cells = <0>; st,syscfg = <&syscfg_core>; reg = <0x8d83000 0x158>; - interrupts = ; + interrupts = ; dmas = <&fdma0 5 0 1>; dma-names = "rx"; @@ -947,32 +979,22 @@ #sound-dai-cells = <0>; st,syscfg = <&syscfg_core>; reg = <0x8d84000 0x158>; - interrupts = ; + interrupts = ; dmas = <&fdma0 6 0 1>; dma-names = "rx"; status = "disabled"; }; - rc: rc@09518000 { - compatible = "st,comms-irb"; - reg = <0x09518000 0x234>; - interrupts = ; - rx-mode = "infrared"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ir - &pinctrl_uhf - &pinctrl_tx - &pinctrl_tx_od>; - clocks = <&clk_sysin>; - resets = <&softreset STIH407_IRB_SOFTRESET>; - - status = "disabled"; - }; - - socinfo { - compatible = "st,stih407-socinfo"; - st,syscfg = <&syscfg_core>; + delta0@0 { + compatible = "st,st-delta"; + reg = <0 0>; + clock-names = "delta", + "delta-st231", + "delta-flash-promip"; + clocks = <&clk_s_c0_flexgen CLK_VID_DMU>, + <&clk_s_c0_flexgen CLK_ST231_DMU>, + <&clk_s_c0_flexgen CLK_FLASH_PROMIP>; }; }; }; diff --git a/arch/arm/dts/stih407-pinctrl.dtsi b/arch/arm/dts/stih407-pinctrl.dtsi index f27ae21f67..2cf335714c 100644 --- a/arch/arm/dts/stih407-pinctrl.dtsi +++ b/arch/arm/dts/stih407-pinctrl.dtsi @@ -1,10 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2014 STMicroelectronics Limited. * Author: Giuseppe Cavallaro - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * publishhed by the Free Software Foundation. */ #include "st-pincfg.h" #include @@ -45,18 +42,18 @@ }; soc { - pin-controller-sbc { + pin-controller-sbc@961f080 { #address-cells = <1>; #size-cells = <1>; compatible = "st,stih407-sbc-pinctrl"; st,syscfg = <&syscfg_sbc>; reg = <0x0961f080 0x4>; reg-names = "irqmux"; - interrupts = ; + interrupts = ; interrupt-names = "irqmux"; ranges = <0 0x09610000 0x6000>; - pio0: gpio@09610000 { + pio0: gpio@9610000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -64,7 +61,7 @@ reg = <0x0 0x100>; st,bank-name = "PIO0"; }; - pio1: gpio@09611000 { + pio1: gpio@9611000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -72,7 +69,7 @@ reg = <0x1000 0x100>; st,bank-name = "PIO1"; }; - pio2: gpio@09612000 { + pio2: gpio@9612000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -80,7 +77,7 @@ reg = <0x2000 0x100>; st,bank-name = "PIO2"; }; - pio3: gpio@09613000 { + pio3: gpio@9613000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -88,7 +85,7 @@ reg = <0x3000 0x100>; st,bank-name = "PIO3"; }; - pio4: gpio@09614000 { + pio4: gpio@9614000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -97,7 +94,7 @@ st,bank-name = "PIO4"; }; - pio5: gpio@09615000 { + pio5: gpio@9615000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -369,18 +366,18 @@ }; }; - pin-controller-front0 { + pin-controller-front0@920f080 { #address-cells = <1>; #size-cells = <1>; compatible = "st,stih407-front-pinctrl"; st,syscfg = <&syscfg_front>; reg = <0x0920f080 0x4>; reg-names = "irqmux"; - interrupts = ; + interrupts = ; interrupt-names = "irqmux"; ranges = <0 0x09200000 0x10000>; - pio10: pio@09200000 { + pio10: pio@9200000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -388,7 +385,7 @@ reg = <0x0 0x100>; st,bank-name = "PIO10"; }; - pio11: pio@09201000 { + pio11: pio@9201000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -396,7 +393,7 @@ reg = <0x1000 0x100>; st,bank-name = "PIO11"; }; - pio12: pio@09202000 { + pio12: pio@9202000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -404,7 +401,7 @@ reg = <0x2000 0x100>; st,bank-name = "PIO12"; }; - pio13: pio@09203000 { + pio13: pio@9203000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -412,7 +409,7 @@ reg = <0x3000 0x100>; st,bank-name = "PIO13"; }; - pio14: pio@09204000 { + pio14: pio@9204000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -420,7 +417,7 @@ reg = <0x4000 0x100>; st,bank-name = "PIO14"; }; - pio15: pio@09205000 { + pio15: pio@9205000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -428,7 +425,7 @@ reg = <0x5000 0x100>; st,bank-name = "PIO15"; }; - pio16: pio@09206000 { + pio16: pio@9206000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -436,7 +433,7 @@ reg = <0x6000 0x100>; st,bank-name = "PIO16"; }; - pio17: pio@09207000 { + pio17: pio@9207000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -444,7 +441,7 @@ reg = <0x7000 0x100>; st,bank-name = "PIO17"; }; - pio18: pio@09208000 { + pio18: pio@9208000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -452,7 +449,7 @@ reg = <0x8000 0x100>; st,bank-name = "PIO18"; }; - pio19: pio@09209000 { + pio19: pio@9209000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -465,19 +462,16 @@ serial0 { pinctrl_serial0: serial0-0 { st,pins { - tx = <&pio17 0 ALT1 OUT>; - rx = <&pio17 1 ALT1 IN>; + tx = <&pio17 0 ALT1 OUT>; + rx = <&pio17 1 ALT1 IN>; }; }; - pinctrl_serial0_rts: serial0_rts { - st,pins { - rts = <&pio17 3 ALT1 OUT>; - }; - }; - - pinctrl_serial0_cts: serial0_cts { + pinctrl_serial0_hw_flowctrl: serial0-0_hw_flowctrl { st,pins { + tx = <&pio17 0 ALT1 OUT>; + rx = <&pio17 1 ALT1 IN>; cts = <&pio17 2 ALT1 IN>; + rts = <&pio17 3 ALT1 OUT>; }; }; }; @@ -932,18 +926,18 @@ }; }; - pin-controller-front1 { + pin-controller-front1@921f080 { #address-cells = <1>; #size-cells = <1>; compatible = "st,stih407-front-pinctrl"; st,syscfg = <&syscfg_front>; reg = <0x0921f080 0x4>; reg-names = "irqmux"; - interrupts = ; + interrupts = ; interrupt-names = "irqmux"; ranges = <0 0x09210000 0x10000>; - pio20: pio@09210000 { + pio20: pio@9210000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -965,18 +959,18 @@ }; }; - pin-controller-rear { + pin-controller-rear@922f080 { #address-cells = <1>; #size-cells = <1>; compatible = "st,stih407-rear-pinctrl"; st,syscfg = <&syscfg_rear>; reg = <0x0922f080 0x4>; reg-names = "irqmux"; - interrupts = ; + interrupts = ; interrupt-names = "irqmux"; ranges = <0 0x09220000 0x6000>; - pio30: gpio@09220000 { + pio30: gpio@9220000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -984,7 +978,7 @@ reg = <0x0 0x100>; st,bank-name = "PIO30"; }; - pio31: gpio@09221000 { + pio31: gpio@9221000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -992,7 +986,7 @@ reg = <0x1000 0x100>; st,bank-name = "PIO31"; }; - pio32: gpio@09222000 { + pio32: gpio@9222000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -1000,7 +994,7 @@ reg = <0x2000 0x100>; st,bank-name = "PIO32"; }; - pio33: gpio@09223000 { + pio33: gpio@9223000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -1008,7 +1002,7 @@ reg = <0x3000 0x100>; st,bank-name = "PIO33"; }; - pio34: gpio@09224000 { + pio34: gpio@9224000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -1016,7 +1010,7 @@ reg = <0x4000 0x100>; st,bank-name = "PIO34"; }; - pio35: gpio@09225000 { + pio35: gpio@9225000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -1026,41 +1020,6 @@ st,retime-pin-mask = <0x7f>; }; - dvo { - pinctrl_dvo: dvo { - st,pins { - hs = <&pio30 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - vs = <&pio30 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - de = <&pio30 2 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - ck = <&pio30 3 ALT2 (OE | CLKNOTDATA) 0>; - d0 = <&pio30 4 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d1 = <&pio30 5 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d2 = <&pio30 6 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d3 = <&pio30 7 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d4 = <&pio31 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d5 = <&pio31 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d6 = <&pio31 2 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d7 = <&pio31 3 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d8 = <&pio31 4 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d9 = <&pio31 5 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d10 = <&pio31 6 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d11 = <&pio31 7 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d12 = <&pio32 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d13 = <&pio32 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d14 = <&pio32 2 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d15 = <&pio32 3 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d16 = <&pio32 4 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d17 = <&pio32 5 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d18 = <&pio32 6 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d19 = <&pio32 7 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d20 = <&pio33 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d21 = <&pio33 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d22 = <&pio33 2 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - d23 = <&pio33 3 ALT2 OUT SE_NICLK_IO 0 CLK_A>; - }; - }; - }; - i2c4 { pinctrl_i2c4_default: i2c4-default { st,pins { @@ -1195,18 +1154,18 @@ }; }; - pin-controller-flash { + pin-controller-flash@923f080 { #address-cells = <1>; #size-cells = <1>; compatible = "st,stih407-flash-pinctrl"; st,syscfg = <&syscfg_flash>; reg = <0x0923f080 0x4>; reg-names = "irqmux"; - interrupts = ; - interrupts-names = "irqmux"; + interrupts = ; + interrupt-names = "irqmux"; ranges = <0 0x09230000 0x3000>; - pio40: gpio@09230000 { + pio40: gpio@9230000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -1214,7 +1173,7 @@ reg = <0 0x100>; st,bank-name = "PIO40"; }; - pio41: gpio@09231000 { + pio41: gpio@9231000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -1222,7 +1181,7 @@ reg = <0x1000 0x100>; st,bank-name = "PIO41"; }; - pio42: gpio@09232000 { + pio42: gpio@9232000 { gpio-controller; #gpio-cells = <2>; interrupt-controller; diff --git a/arch/arm/dts/stih410-b2260-u-boot.dtsi b/arch/arm/dts/stih410-b2260-u-boot.dtsi index 83916319fc..897c42146a 100644 --- a/arch/arm/dts/stih410-b2260-u-boot.dtsi +++ b/arch/arm/dts/stih410-b2260-u-boot.dtsi @@ -9,8 +9,25 @@ soc { st_dwc3: dwc3@8f94000 { dwc3: dwc3@9900000 { + dr_mode = "peripheral"; phys = <&usb2_picophy0>; }; }; + + ohci0: usb@9a03c00 { + compatible = "generic-ohci"; + }; + + ehci0: usb@9a03e00 { + compatible = "generic-ehci"; + }; + + ohci1: usb@9a83c00 { + compatible = "generic-ohci"; + }; + + ehci1: usb@9a83e00 { + compatible = "generic-ehci"; + }; }; }; diff --git a/arch/arm/dts/stih410-b2260.dts b/arch/arm/dts/stih410-b2260.dts index 54250e2518..4fbd8e9eb5 100644 --- a/arch/arm/dts/stih410-b2260.dts +++ b/arch/arm/dts/stih410-b2260.dts @@ -1,10 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2016 STMicroelectronics (R&D) Limited. * Author: Patrice Chotard - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ /dts-v1/; #include "stih410.dtsi" @@ -15,68 +12,79 @@ compatible = "st,stih410-b2260", "st,stih410"; chosen { - bootargs = "console=ttyAS1,115200"; - linux,stdout-path = &uart1; + bootargs = "clk_ignore_unused"; stdout-path = &uart1; }; - memory { + memory@40000000 { device_type = "memory"; reg = <0x40000000 0x40000000>; }; aliases { - ttyAS1 = &uart1; + serial1 = &uart1; ethernet0 = ðernet0; }; - soc { - - leds { - compatible = "gpio-leds"; - user_green_1 { - label = "User_green_1"; - gpios = <&pio1 3 GPIO_ACTIVE_LOW>; - linux,default-trigger = "heartbeat"; - default-state = "off"; - }; - - user_green_2 { - label = "User_green_2"; - gpios = <&pio4 1 GPIO_ACTIVE_LOW>; - default-state = "off"; - }; - - user_green_3 { - label = "User_green_3"; - gpios = <&pio2 1 GPIO_ACTIVE_LOW>; - default-state = "off"; - }; - - user_green_4 { - label = "User_green_4"; - gpios = <&pio2 5 GPIO_ACTIVE_LOW>; - default-state = "off"; - }; - - wifi_yellow { - label = "Wifi_yellow"; - gpios = <&pio4 0 GPIO_ACTIVE_LOW>; - linux,default-trigger = "wifi-activity"; - default-state = "off"; - }; - - bt_blue { - label = "Bluetooth_blue"; - gpios = <&pio3 3 GPIO_ACTIVE_LOW>; - linux,default-trigger = "hci0-power"; - default-state = "off"; - }; + leds { + compatible = "gpio-leds"; + user_green_1 { + label = "User_green_1"; + gpios = <&pio1 3 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + default-state = "off"; }; + user_green_2 { + label = "User_green_2"; + gpios = <&pio4 1 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + user_green_3 { + label = "User_green_3"; + gpios = <&pio2 1 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + user_green_4 { + label = "User_green_4"; + gpios = <&pio2 5 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + }; + + sound: sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "STI-B2260"; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + simple-audio-card,dai-link@0 { + reg = <0>; + /* DAC */ + format = "i2s"; + mclk-fs = <128>; + cpu { + sound-dai = <&sti_uni_player0>; + }; + + codec { + sound-dai = <&sti_hdmi>; + }; + }; + }; + + soc { /* Low speed expansion connector */ uart0: serial@9830000 { label = "LS-UART0"; + pinctrl-names = "default", "no-hw-flowctrl"; + pinctrl-0 = <&pinctrl_serial0_hw_flowctrl>; + pinctrl-1 = <&pinctrl_serial0>; + rts-gpios = <&pio17 3 GPIO_ACTIVE_LOW>; + uart-has-rtscts; status = "okay"; }; @@ -119,14 +127,14 @@ status = "okay"; }; - mmc0: sdhci@09060000 { + mmc0: sdhci@9060000 { pinctrl-0 = <&pinctrl_sd0>; bus-width = <4>; status = "okay"; }; /* high speed expansion connector */ - mmc1: sdhci@09080000 { + mmc1: sdhci@9080000 { status = "okay"; }; @@ -138,11 +146,11 @@ status = "okay"; }; - usb2_picophy1: phy2 { + usb2_picophy1: phy2@0 { status = "okay"; }; - usb2_picophy2: phy3 { + usb2_picophy2: phy3@0 { status = "okay"; }; @@ -183,17 +191,17 @@ sti_uni_player0: sti-uni-player@8d80000 { status = "okay"; }; - /* SSC11 to HDMI */ hdmiddc: i2c@9541000 { /* HDMI V1.3a supports Standard mode only */ clock-frequency = <100000>; st,i2c-min-scl-pulse-width-us = <0>; - st,i2c-min-sda-pulse-width-us = <1>; + st,i2c-min-sda-pulse-width-us = <5>; status = "okay"; }; - miphy28lp_phy: miphy28lp@9b22000 { + miphy28lp_phy: miphy28lp@0 { + phy_port1: port@9b2a000 { st,osc-force-ext; }; @@ -202,25 +210,5 @@ sata1: sata@9b28000 { status = "okay"; }; - - sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "STI-B2260"; - status = "okay"; - - simple-audio-card,dai-link@0 { - /* DAC */ - format = "i2s"; - mclk-fs = <128>; - cpu { - sound-dai = <&sti_uni_player0>; - }; - - codec { - sound-dai = <&sti_hdmi>; - }; - }; - }; - }; }; diff --git a/arch/arm/dts/stih410-clock.dtsi b/arch/arm/dts/stih410-clock.dtsi index 8598effd6c..81a8c25d7b 100644 --- a/arch/arm/dts/stih410-clock.dtsi +++ b/arch/arm/dts/stih410-clock.dtsi @@ -1,12 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2014 STMicroelectronics R&D Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ #include / { + /* + * Fixed 30MHz oscillator inputs to SoC + */ + clk_sysin: clk-sysin { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <30000000>; + clock-output-names = "CLK_SYSIN"; + }; + + clk_tmdsout_hdmi: clk-tmdsout-hdmi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; + clocks { #address-cells = <1>; #size-cells = <1>; @@ -14,27 +27,6 @@ compatible = "st,stih410-clk", "simple-bus"; - /* - * Fixed 30MHz oscillator inputs to SoC - */ - clk_sysin: clk-sysin { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <30000000>; - clock-output-names = "CLK_SYSIN"; - }; - - /* - * ARM Peripheral clock for timers - */ - arm_periph_clk: clk-m-a9-periphs { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clocks = <&clk_m_a9>; - clock-div = <2>; - clock-mult = <1>; - }; - /* * A9 PLL. */ @@ -64,35 +56,19 @@ <&clockgen_a9_pll 0>, <&clk_s_c0_flexgen 13>, <&clk_m_a9_ext2f_div2>; + /* + * ARM Peripheral clock for timers + */ + arm_periph_clk: clk-m-a9-periphs { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&clk_m_a9>; + clock-div = <2>; + clock-mult = <1>; + }; }; - /* - * ARM Peripheral clock for timers - */ - clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - - clocks = <&clk_s_c0_flexgen 13>; - - clock-output-names = "clk-m-a9-ext2f-div2"; - - clock-div = <2>; - clock-mult = <1>; - }; - - /* - * Bootloader initialized system infrastructure clock for - * serial devices. - */ - clk_ext2f_a9: clockgen-c0@13 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <200000000>; - clock-output-names = "clk-s-icn-reg-0"; - }; - - clockgen-a@090ff000 { + clockgen-a@90ff000 { compatible = "st,clkgen-c32"; reg = <0x90ff000 0x1000>; @@ -134,7 +110,7 @@ clock-critical = <0>; /* clk-s-c0-fs0-ch0 */ }; - clk_s_c0: clockgen-c@09103000 { + clk_s_c0: clockgen-c@9103000 { compatible = "st,clkgen-c32"; reg = <0x9103000 0x1000>; @@ -208,11 +184,27 @@ "clk-clust-hades", "clk-hwpe-hades", "clk-fc-hades"; - clock-critical = , + clock-critical = , + , , , , ; + + /* + * ARM Peripheral clock for timers + */ + clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + + clocks = <&clk_s_c0_flexgen 13>; + + clock-output-names = "clk-m-a9-ext2f-div2"; + + clock-div = <2>; + clock-mult = <1>; + }; }; }; @@ -229,7 +221,7 @@ "clk-s-d0-fs0-ch3"; }; - clockgen-d0@09104000 { + clockgen-d0@9104000 { compatible = "st,clkgen-c32"; reg = <0x9104000 0x1000>; @@ -265,13 +257,7 @@ "clk-s-d2-fs0-ch3"; }; - clk_tmdsout_hdmi: clk-tmdsout-hdmi { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <0>; - }; - - clockgen-d2@x9106000 { + clockgen-d2@9106000 { compatible = "st,clkgen-c32"; reg = <0x9106000 0x1000>; diff --git a/arch/arm/dts/stih410-pinctrl.dtsi b/arch/arm/dts/stih410-pinctrl.dtsi index b3e9dfc81c..e6eadd1244 100644 --- a/arch/arm/dts/stih410-pinctrl.dtsi +++ b/arch/arm/dts/stih410-pinctrl.dtsi @@ -1,16 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2014 STMicroelectronics Limited. * Author: Peter Griffin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * publishhed by the Free Software Foundation. */ #include "st-pincfg.h" / { soc { - pin-controller-rear { + pin-controller-rear@922f080 { usb0 { pinctrl_usb0: usb2-0 { diff --git a/arch/arm/dts/stih410.dtsi b/arch/arm/dts/stih410.dtsi index b59b110989..6d847019c5 100644 --- a/arch/arm/dts/stih410.dtsi +++ b/arch/arm/dts/stih410.dtsi @@ -1,67 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2014 STMicroelectronics Limited. * Author: Peter Griffin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * publishhed by the Free Software Foundation. */ #include "stih410-clock.dtsi" #include "stih407-family.dtsi" #include "stih410-pinctrl.dtsi" +#include / { aliases { bdisp0 = &bdisp0; }; - cpus { - cpu@0 { - st,syscfg = <&syscfg_core 0x8e0>; - st,syscfg-eng = <&syscfg_opp 0x4 0x0>; - clocks = <&clk_m_a9>; - operating-points-v2 = <&cpu0_opp_table>; - }; - cpu@1 { - clocks = <&clk_m_a9>; - operating-points-v2 = <&cpu0_opp_table>; - }; - }; - - cpu0_opp_table: opp_table0 { - compatible = "operating-points-v2"; - opp-shared; - - opp@1500000000 { - opp-supported-hw = <0xffffffff 0xffffffff 0xffffffff>; - opp-hz = /bits/ 64 <1500000000>; - clock-latency-ns = <10000000>; - opp-suspend; - }; - opp@1200000000 { - opp-supported-hw = <0xffffffff 0xffffffff 0xffffffff>; - opp-hz = /bits/ 64 <1200000000>; - clock-latency-ns = <10000000>; - }; - opp@800000000 { - opp-supported-hw = <0xffffffff 0xffffffff 0xffffffff>; - opp-hz = /bits/ 64 <800000000>; - clock-latency-ns = <10000000>; - }; - opp@400000000 { - opp-supported-hw = <0xffffffff 0xffffffff 0xffffffff>; - opp-hz = /bits/ 64 <400000000>; - clock-latency-ns = <10000000>; - }; - }; - soc { - syscfg_opp: @08a6583c { - compatible = "syscon"; - reg = <0x08a6583c 0x8>; - }; - - usb2_picophy1: phy2 { + usb2_picophy1: phy2@0 { compatible = "st,stih407-usb2-phy"; + reg = <0 0>; #phy-cells = <0>; st,syscfg = <&syscfg_core 0xf8 0xf4>; resets = <&softreset STIH407_PICOPHY_SOFTRESET>, @@ -71,8 +25,9 @@ status = "disabled"; }; - usb2_picophy2: phy3 { + usb2_picophy2: phy3@0 { compatible = "st,stih407-usb2-phy"; + reg = <0 0>; #phy-cells = <0>; st,syscfg = <&syscfg_core 0xfc 0xf4>; resets = <&softreset STIH407_PICOPHY_SOFTRESET>, @@ -83,15 +38,14 @@ }; ohci0: usb@9a03c00 { - compatible = "generic-ohci"; + compatible = "st,st-ohci-300x"; reg = <0x9a03c00 0x100>; - interrupts = ; + interrupts = ; clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>; resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>, <&softreset STIH407_USB2_PORT0_SOFTRESET>; reset-names = "power", "softreset"; - phys = <&usb2_picophy1>; phy-names = "usb"; @@ -99,9 +53,9 @@ }; ehci0: usb@9a03e00 { - compatible = "generic-ehci"; + compatible = "st,st-ehci-300x"; reg = <0x9a03e00 0x100>; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0>; clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, @@ -116,15 +70,14 @@ }; ohci1: usb@9a83c00 { - compatible = "generic-ohci"; + compatible = "st,st-ohci-300x"; reg = <0x9a83c00 0x100>; - interrupts = ; + interrupts = ; clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, <&clk_s_c0_flexgen CLK_RX_ICN_DISP_0>; resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, <&softreset STIH407_USB2_PORT1_SOFTRESET>; reset-names = "power", "softreset"; - phys = <&usb2_picophy2>; phy-names = "usb"; @@ -132,9 +85,9 @@ }; ehci1: usb@9a83e00 { - compatible = "generic-ehci"; + compatible = "st,st-ehci-300x"; reg = <0x9a83e00 0x100>; - interrupts = ; + interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1>; clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>, @@ -142,18 +95,18 @@ resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, <&softreset STIH407_USB2_PORT1_SOFTRESET>; reset-names = "power", "softreset"; - phys = <&usb2_picophy2>; phy-names = "usb"; status = "disabled"; }; - sti-display-subsystem { + sti-display-subsystem@0 { compatible = "st,sti-display-subsystem"; #address-cells = <1>; #size-cells = <1>; + reg = <0 0>; assigned-clocks = <&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 1>, <&clk_s_c0_pll1 0>, @@ -243,10 +196,10 @@ sti_hdmi: sti-hdmi@8d04000 { compatible = "st,stih407-hdmi"; - #sound-dai-cells = <0>; reg = <0x8d04000 0x1000>; reg-names = "hdmi-reg"; - interrupts = ; + #sound-dai-cells = <0>; + interrupts = ; interrupt-names = "irq"; clock-names = "pix", "tmds", @@ -262,7 +215,7 @@ <&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 1>; - hdmi,hpd-gpio = <&pio5 3>; + hdmi,hpd-gpio = <&pio5 3 GPIO_ACTIVE_LOW>; reset-names = "hdmi"; resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>; ddc = <&hdmiddc>; @@ -283,24 +236,7 @@ <&clk_s_d2_quadfs 1>; }; - sti-dvo@8d00400 { - compatible = "st,stih407-dvo"; - status = "disabled"; - reg = <0x8d00400 0x200>; - reg-names = "dvo-reg"; - clock-names = "dvo_pix", - "dvo", - "main_parent", - "aux_parent"; - clocks = <&clk_s_d2_flexgen CLK_PIX_DVO>, - <&clk_s_d2_flexgen CLK_DVO>, - <&clk_s_d2_quadfs 0>, - <&clk_s_d2_quadfs 1>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_dvo>; - }; - - sti-hqvdp@9c000000 { + sti-hqvdp@9c00000 { compatible = "st,stih407-hqvdp"; reg = <0x9C00000 0x100000>; clock-names = "hqvdp", "pix_main"; @@ -315,7 +251,7 @@ bdisp0:bdisp@9f10000 { compatible = "st,stih407-bdisp"; reg = <0x9f10000 0x1000>; - interrupts = ; + interrupts = ; clock-names = "bdisp"; clocks = <&clk_s_c0_flexgen CLK_IC_BDISP_0>; }; @@ -324,8 +260,8 @@ compatible = "st,st-hva"; reg = <0x8c85000 0x400>, <0x6000000 0x40000>; reg-names = "hva_registers", "hva_esram"; - interrupts = , - ; + interrupts = , + ; clock-names = "clk_hva"; clocks = <&clk_s_c0_flexgen CLK_HVA>; }; @@ -338,66 +274,7 @@ interrupts = ; }; - g1@8c80000 { - compatible = "st,g1"; - reg = <0x8c80000 0x194>; - interrupts = ; - }; - - temp0{ - compatible = "st,stih407-thermal"; - reg = <0x91a0000 0x28>; - clock-names = "thermal"; - clocks = <&clk_sysin>; - interrupts = ; - }; - - delta0 { - compatible = "st,delta"; - clock-names = "delta", "delta-st231", "delta-flash-promip"; - clocks = <&clk_s_c0_flexgen CLK_VID_DMU>, - <&clk_s_c0_flexgen CLK_ST231_DMU>, - <&clk_s_c0_flexgen CLK_FLASH_PROMIP>; - }; - - h264pp0: h264pp@8c00000 { - compatible = "st,h264pp"; - reg = <0x8c00000 0x20000>; - interrupts = ; - clock-names = "clk_h264pp_0"; - clocks = <&clk_s_c0_flexgen CLK_PP_DMU>; - }; - - mali: mali@09f00000 { - compatible = "arm,mali-400"; - reg = <0x09f00000 0x10000>; - interrupts = , - , - , - , - , - , - , - , - , - ; - interrupt-names = "IRQGP", - "IRQGPMMU", - "IRQPP0", - "IRQPPMMU0", - "IRQPP1", - "IRQPPMMU1", - "IRQPP2", - "IRQPPMMU2", - "IRQPP3", - "IRQPPMMU3"; - clock-names = "gpu-clk"; - clocks = <&clk_s_c0_flexgen CLK_ICN_GPU>; - reset-names = "gpu"; - resets = <&softreset STIH407_GPU_SOFTRESET>; - }; - - delta0 { + delta0@0 { compatible = "st,st-delta"; clock-names = "delta", "delta-st231", @@ -407,51 +284,17 @@ <&clk_s_c0_flexgen CLK_FLASH_PROMIP>; }; - h264pp0: h264pp@8c00000 { - compatible = "st,h264pp"; - reg = <0x8c00000 0x20000>; - interrupts = ; - clock-names = "clk_h264pp_0"; - clocks = <&clk_s_c0_flexgen CLK_PP_DMU>; - }; - - mali: mali@09f00000 { - compatible = "arm,mali-400"; - reg = <0x09f00000 0x10000>; - interrupts = , - , - , - , - , - , - , - , - , - ; - interrupt-names = "IRQGP", - "IRQGPMMU", - "IRQPP0", - "IRQPPMMU0", - "IRQPP1", - "IRQPPMMU1", - "IRQPP2", - "IRQPPMMU2", - "IRQPP3", - "IRQPPMMU3"; - clock-names = "gpu-clk"; - clocks = <&clk_s_c0_flexgen CLK_ICN_GPU>; - reset-names = "gpu"; - resets = <&softreset STIH407_GPU_SOFTRESET>; - }; - - hva@8c85000{ - compatible = "st,st-hva"; - reg = <0x8c85000 0x400>, <0x6000000 0x40000>; - reg-names = "hva_registers", "hva_esram"; - interrupts = , - ; - clock-names = "clk_hva"; - clocks = <&clk_s_c0_flexgen CLK_HVA>; + sti-cec@94a087c { + compatible = "st,stih-cec"; + reg = <0x94a087c 0x64>; + clocks = <&clk_sysin>; + clock-names = "cec-clk"; + interrupts = ; + interrupt-names = "cec-irq"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cec0_default>; + resets = <&softreset STIH407_LPM_SOFTRESET>; + hdmi-phandle = <&sti_hdmi>; }; }; }; From fed51572c81192a9135380e88cfa445361dade5d Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Mon, 22 Jul 2019 14:50:21 +0200 Subject: [PATCH 04/64] rtc: stm32: manage 2 digit limitation on year STM32 RTC manages only 2 digits for YEAR (Year tens and units in BCD format in RTC_DR register). With this patch, RTC driver assumes that tm->tm_years is between 2000 and 2099; tm->tm_year - 2000 have only 2 digit (0 > and <= 99). Signed-off-by: Patrick Delaunay --- drivers/rtc/stm32_rtc.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/rtc/stm32_rtc.c b/drivers/rtc/stm32_rtc.c index abd339076a..2674714442 100644 --- a/drivers/rtc/stm32_rtc.c +++ b/drivers/rtc/stm32_rtc.c @@ -72,7 +72,8 @@ static int stm32_rtc_get(struct udevice *dev, struct rtc_time *tm) tm->tm_mday = bcd2bin((dr & STM32_RTC_DATE) >> STM32_RTC_DATE_SHIFT); tm->tm_mon = bcd2bin((dr & STM32_RTC_MONTH) >> STM32_RTC_MONTH_SHIFT); - tm->tm_year = bcd2bin((dr & STM32_RTC_YEAR) >> STM32_RTC_YEAR_SHIFT); + tm->tm_year = 2000 + + bcd2bin((dr & STM32_RTC_YEAR) >> STM32_RTC_YEAR_SHIFT); tm->tm_wday = bcd2bin((dr & STM32_RTC_WDAY) >> STM32_RTC_WDAY_SHIFT); tm->tm_yday = 0; tm->tm_isdst = 0; @@ -174,6 +175,9 @@ static int stm32_rtc_set(struct udevice *dev, const struct rtc_time *tm) tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec); + if (tm->tm_year < 2000 || tm->tm_year > 2099) + return -EINVAL; + /* Time in BCD format */ t = (bin2bcd(tm->tm_sec) << STM32_RTC_SEC_SHIFT) & STM32_RTC_SEC; t |= (bin2bcd(tm->tm_min) << STM32_RTC_MIN_SHIFT) & STM32_RTC_MIN; @@ -182,7 +186,8 @@ static int stm32_rtc_set(struct udevice *dev, const struct rtc_time *tm) /* Date in BCD format */ d = (bin2bcd(tm->tm_mday) << STM32_RTC_DATE_SHIFT) & STM32_RTC_DATE; d |= (bin2bcd(tm->tm_mon) << STM32_RTC_MONTH_SHIFT) & STM32_RTC_MONTH; - d |= (bin2bcd(tm->tm_year) << STM32_RTC_YEAR_SHIFT) & STM32_RTC_YEAR; + d |= (bin2bcd(tm->tm_year - 2000) << STM32_RTC_YEAR_SHIFT) & + STM32_RTC_YEAR; d |= (bin2bcd(tm->tm_wday) << STM32_RTC_WDAY_SHIFT) & STM32_RTC_WDAY; return stm32_rtc_set_time(dev, t, d); From 4953f6c84d96770022927404e1ec05a1a43e7477 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:09 +0200 Subject: [PATCH 05/64] stm32mp1: cosmetic: remove comment Remove unnecessary comment. Signed-off-by: Patrick Delaunay --- include/configs/stm32mp1.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 24f7b9d463..1bed57083d 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -52,7 +52,6 @@ /* SPL support */ #ifdef CONFIG_SPL -/* BOOTROM load address */ /* SPL use DDR */ #define CONFIG_SPL_BSS_START_ADDR 0xC0200000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 From 73858264758f00b981fd126ab705db04a851656d Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Tue, 30 Jul 2019 19:16:10 +0200 Subject: [PATCH 06/64] pinctrl: pinctrl_stm32: cosmetic: Reorder include files Reorder include files Signed-off-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- drivers/pinctrl/pinctrl_stm32.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index cdbe463cff..3a235ae5a7 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -1,11 +1,11 @@ #include #include -#include -#include #include #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; From abee80d78933e8b21dc2bcafa6de8e69ee2253d7 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:11 +0200 Subject: [PATCH 07/64] pinctrl: stmfx: update pinconf settings Alignment with kernel driver. According to the following tab (coming from STMFX datasheet), updates have to done in stmfx_pinctrl_conf_set function: -"type" has to be set when "bias" is configured as "pull-up or pull-down" -PIN_CONFIG_DRIVE_PUSH_PULL should only be used when gpio is configured as output. There is so no need to check direction. DIR | TYPE | PUPD | MFX GPIO configuration ----|------|------|--------------------------------------------------- 1 | 1 | 1 | OUTPUT open drain with internal pull-up resistor ----|------|------|--------------------------------------------------- 1 | 1 | 0 | OUTPUT open drain with internal pull-down resistor ----|------|------|--------------------------------------------------- 1 | 0 | 0/1 | OUTPUT push pull no pull ----|------|------|--------------------------------------------------- 0 | 1 | 1 | INPUT with internal pull-up resistor ----|------|------|--------------------------------------------------- 0 | 1 | 0 | INPUT with internal pull-down resistor ----|------|------|--------------------------------------------------- 0 | 0 | 1 | INPUT floating ----|------|------|--------------------------------------------------- 0 | 0 | 0 | analog (GPIO not used, default setting) Signed-off-by: Patrick Delaunay --- drivers/pinctrl/pinctrl-stmfx.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c index 5431df9813..0b5a0433cd 100644 --- a/drivers/pinctrl/pinctrl-stmfx.c +++ b/drivers/pinctrl/pinctrl-stmfx.c @@ -231,23 +231,23 @@ static int stmfx_pinctrl_conf_set(struct udevice *dev, unsigned int pin, switch (param) { case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: case PIN_CONFIG_BIAS_DISABLE: + case PIN_CONFIG_DRIVE_PUSH_PULL: + ret = stmfx_pinctrl_set_type(dev, pin, 0); + break; case PIN_CONFIG_BIAS_PULL_DOWN: + ret = stmfx_pinctrl_set_type(dev, pin, 1); + if (ret) + return ret; ret = stmfx_pinctrl_set_pupd(dev, pin, 0); break; case PIN_CONFIG_BIAS_PULL_UP: + ret = stmfx_pinctrl_set_type(dev, pin, 1); + if (ret) + return ret; ret = stmfx_pinctrl_set_pupd(dev, pin, 1); break; case PIN_CONFIG_DRIVE_OPEN_DRAIN: - if (dir == GPIOF_OUTPUT) - ret = stmfx_pinctrl_set_type(dev, pin, 1); - else - ret = stmfx_pinctrl_set_type(dev, pin, 0); - break; - case PIN_CONFIG_DRIVE_PUSH_PULL: - if (dir == GPIOF_OUTPUT) - ret = stmfx_pinctrl_set_type(dev, pin, 0); - else - ret = stmfx_pinctrl_set_type(dev, pin, 1); + ret = stmfx_pinctrl_set_type(dev, pin, 1); break; case PIN_CONFIG_OUTPUT: ret = stmfx_gpio_direction_output(plat->gpio, pin, arg); From fe9153364423842e053a9600efa333be20525128 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:12 +0200 Subject: [PATCH 08/64] ARM: dts: stm32mp1: sync device tree with v5.3-rc2 Synchronize device tree with v5.3-rc2 label and update the associated u-boot dtsi. Signed-off-by: Patrick Delaunay --- arch/arm/dts/stm32mp157-pinctrl.dtsi | 234 +++++++++++++++++++---- arch/arm/dts/stm32mp157a-avenger96.dts | 39 ++-- arch/arm/dts/stm32mp157a-dk1.dts | 68 ++++++- arch/arm/dts/stm32mp157c-ed1.dts | 18 +- arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi | 5 - arch/arm/dts/stm32mp157c-ev1.dts | 109 ++++++++++- arch/arm/dts/stm32mp157c.dtsi | 180 +++++++++++++++++ arch/arm/dts/stm32mp157xaa-pinctrl.dtsi | 90 +++++++++ arch/arm/dts/stm32mp157xab-pinctrl.dtsi | 62 ++++++ arch/arm/dts/stm32mp157xac-pinctrl.dtsi | 78 ++++++++ arch/arm/dts/stm32mp157xad-pinctrl.dtsi | 62 ++++++ 11 files changed, 885 insertions(+), 60 deletions(-) create mode 100644 arch/arm/dts/stm32mp157xaa-pinctrl.dtsi create mode 100644 arch/arm/dts/stm32mp157xab-pinctrl.dtsi create mode 100644 arch/arm/dts/stm32mp157xac-pinctrl.dtsi create mode 100644 arch/arm/dts/stm32mp157xad-pinctrl.dtsi diff --git a/arch/arm/dts/stm32mp157-pinctrl.dtsi b/arch/arm/dts/stm32mp157-pinctrl.dtsi index 9bae85045a..4367e8dcf7 100644 --- a/arch/arm/dts/stm32mp157-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp157-pinctrl.dtsi @@ -25,8 +25,7 @@ reg = <0x0 0x400>; clocks = <&rcc GPIOA>; st,bank-name = "GPIOA"; - ngpios = <16>; - gpio-ranges = <&pinctrl 0 0 16>; + status = "disabled"; }; gpiob: gpio@50003000 { @@ -37,8 +36,7 @@ reg = <0x1000 0x400>; clocks = <&rcc GPIOB>; st,bank-name = "GPIOB"; - ngpios = <16>; - gpio-ranges = <&pinctrl 0 16 16>; + status = "disabled"; }; gpioc: gpio@50004000 { @@ -49,8 +47,7 @@ reg = <0x2000 0x400>; clocks = <&rcc GPIOC>; st,bank-name = "GPIOC"; - ngpios = <16>; - gpio-ranges = <&pinctrl 0 32 16>; + status = "disabled"; }; gpiod: gpio@50005000 { @@ -61,8 +58,7 @@ reg = <0x3000 0x400>; clocks = <&rcc GPIOD>; st,bank-name = "GPIOD"; - ngpios = <16>; - gpio-ranges = <&pinctrl 0 48 16>; + status = "disabled"; }; gpioe: gpio@50006000 { @@ -73,8 +69,7 @@ reg = <0x4000 0x400>; clocks = <&rcc GPIOE>; st,bank-name = "GPIOE"; - ngpios = <16>; - gpio-ranges = <&pinctrl 0 64 16>; + status = "disabled"; }; gpiof: gpio@50007000 { @@ -85,8 +80,7 @@ reg = <0x5000 0x400>; clocks = <&rcc GPIOF>; st,bank-name = "GPIOF"; - ngpios = <16>; - gpio-ranges = <&pinctrl 0 80 16>; + status = "disabled"; }; gpiog: gpio@50008000 { @@ -97,8 +91,7 @@ reg = <0x6000 0x400>; clocks = <&rcc GPIOG>; st,bank-name = "GPIOG"; - ngpios = <16>; - gpio-ranges = <&pinctrl 0 96 16>; + status = "disabled"; }; gpioh: gpio@50009000 { @@ -109,8 +102,7 @@ reg = <0x7000 0x400>; clocks = <&rcc GPIOH>; st,bank-name = "GPIOH"; - ngpios = <16>; - gpio-ranges = <&pinctrl 0 112 16>; + status = "disabled"; }; gpioi: gpio@5000a000 { @@ -121,8 +113,7 @@ reg = <0x8000 0x400>; clocks = <&rcc GPIOI>; st,bank-name = "GPIOI"; - ngpios = <16>; - gpio-ranges = <&pinctrl 0 128 16>; + status = "disabled"; }; gpioj: gpio@5000b000 { @@ -133,8 +124,7 @@ reg = <0x9000 0x400>; clocks = <&rcc GPIOJ>; st,bank-name = "GPIOJ"; - ngpios = <16>; - gpio-ranges = <&pinctrl 0 144 16>; + status = "disabled"; }; gpiok: gpio@5000c000 { @@ -145,8 +135,7 @@ reg = <0xa000 0x400>; clocks = <&rcc GPIOK>; st,bank-name = "GPIOK"; - ngpios = <8>; - gpio-ranges = <&pinctrl 0 160 8>; + status = "disabled"; }; adc12_usb_pwr_pins_a: adc12-usb-pwr-pins-0 { @@ -186,6 +175,47 @@ }; }; + dcmi_pins_a: dcmi-0 { + pins { + pinmux = ,/* DCMI_HSYNC */ + ,/* DCMI_VSYNC */ + ,/* DCMI_PIXCLK */ + ,/* DCMI_D0 */ + ,/* DCMI_D1 */ + ,/* DCMI_D2 */ + ,/* DCMI_D3 */ + ,/* DCMI_D4 */ + ,/* DCMI_D5 */ + ,/* DCMI_D6 */ + ,/* DCMI_D7 */ + ,/* DCMI_D8 */ + ,/* DCMI_D9 */ + ,/* DCMI_D10 */ + ;/* DCMI_D11 */ + bias-disable; + }; + }; + + dcmi_sleep_pins_a: dcmi-sleep-0 { + pins { + pinmux = ,/* DCMI_HSYNC */ + ,/* DCMI_VSYNC */ + ,/* DCMI_PIXCLK */ + ,/* DCMI_D0 */ + ,/* DCMI_D1 */ + ,/* DCMI_D2 */ + ,/* DCMI_D3 */ + ,/* DCMI_D4 */ + ,/* DCMI_D5 */ + ,/* DCMI_D6 */ + ,/* DCMI_D7 */ + ,/* DCMI_D8 */ + ,/* DCMI_D9 */ + ,/* DCMI_D10 */ + ;/* DCMI_D11 */ + }; + }; + ethernet0_rgmii_pins_a: rgmii-0 { pins1 { pinmux = , /* ETH_RGMII_CLK125 */ @@ -308,6 +338,13 @@ }; }; + i2c1_pins_sleep_b: i2c1-3 { + pins { + pinmux = , /* I2C1_SCL */ + ; /* I2C1_SDA */ + }; + }; + i2c2_pins_a: i2c2-0 { pins { pinmux = , /* I2C2_SCL */ @@ -325,16 +362,21 @@ }; }; - i2c2_pins_b: i2c2-2 { + i2c2_pins_b1: i2c2-2 { pins { - pinmux = , /* I2C2_SCL */ - ; /* I2C2_SDA */ + pinmux = ; /* I2C2_SDA */ bias-disable; drive-open-drain; slew-rate = <0>; }; }; + i2c2_pins_sleep_b1: i2c2-3 { + pins { + pinmux = ; /* I2C2_SDA */ + }; + }; + i2c5_pins_a: i2c5-0 { pins { pinmux = , /* I2C5_SCL */ @@ -353,6 +395,25 @@ }; }; + i2s2_pins_a: i2s2-0 { + pins { + pinmux = , /* I2S2_SDO */ + , /* I2S2_WS */ + ; /* I2S2_CK */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + }; + + i2s2_pins_sleep_a: i2s2-1 { + pins { + pinmux = , /* I2S2_SDO */ + , /* I2S2_WS */ + ; /* I2S2_CK */ + }; + }; + ltdc_pins_a: ltdc-a-0 { pins { pinmux = , /* LCD_CLK */ @@ -547,6 +608,12 @@ }; }; + qspi_clk_sleep_pins_a: qspi-clk-sleep-0 { + pins { + pinmux = ; /* QSPI_CLK */ + }; + }; + qspi_bk1_pins_a: qspi-bk1-0 { pins1 { pinmux = , /* QSPI_BK1_IO0 */ @@ -565,6 +632,16 @@ }; }; + qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 { + pins { + pinmux = , /* QSPI_BK1_IO0 */ + , /* QSPI_BK1_IO1 */ + , /* QSPI_BK1_IO2 */ + , /* QSPI_BK1_IO3 */ + ; /* QSPI_BK1_NCS */ + }; + }; + qspi_bk2_pins_a: qspi-bk2-0 { pins1 { pinmux = , /* QSPI_BK2_IO0 */ @@ -583,6 +660,89 @@ }; }; + qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 { + pins { + pinmux = , /* QSPI_BK2_IO0 */ + , /* QSPI_BK2_IO1 */ + , /* QSPI_BK2_IO2 */ + , /* QSPI_BK2_IO3 */ + ; /* QSPI_BK2_NCS */ + }; + }; + + sai2a_pins_a: sai2a-0 { + pins { + pinmux = , /* SAI2_SCK_A */ + , /* SAI2_SD_A */ + , /* SAI2_FS_A */ + ; /* SAI2_MCLK_A */ + slew-rate = <0>; + drive-push-pull; + bias-disable; + }; + }; + + sai2a_sleep_pins_a: sai2a-1 { + pins { + pinmux = , /* SAI2_SCK_A */ + , /* SAI2_SD_A */ + , /* SAI2_FS_A */ + ; /* SAI2_MCLK_A */ + }; + }; + + sai2b_pins_a: sai2b-0 { + pins1 { + pinmux = , /* SAI2_SCK_B */ + , /* SAI2_FS_B */ + ; /* SAI2_MCLK_B */ + slew-rate = <0>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* SAI2_SD_B */ + bias-disable; + }; + }; + + sai2b_sleep_pins_a: sai2b-1 { + pins { + pinmux = , /* SAI2_SD_B */ + , /* SAI2_SCK_B */ + , /* SAI2_FS_B */ + ; /* SAI2_MCLK_B */ + }; + }; + + sai2b_pins_b: sai2b-2 { + pins { + pinmux = ; /* SAI2_SD_B */ + bias-disable; + }; + }; + + sai2b_sleep_pins_b: sai2b-3 { + pins { + pinmux = ; /* SAI2_SD_B */ + }; + }; + + sai4a_pins_a: sai4a-0 { + pins { + pinmux = ; /* SAI4_SD_A */ + slew-rate = <0>; + drive-push-pull; + bias-disable; + }; + }; + + sai4a_sleep_pins_a: sai4a-1 { + pins { + pinmux = ; /* SAI4_SD_A */ + }; + }; + sdmmc1_b4_pins_a: sdmmc1-b4-0 { pins { pinmux = , /* SDMMC1_D0 */ @@ -752,12 +912,6 @@ bias-disable; }; }; - - usbotg_hs_pins_a: usbotg_hs-0 { - pins { - pinmux = ; /* OTG_ID */ - }; - }; }; pinctrl_z: pin-controller-z@54004000 { @@ -779,8 +933,22 @@ clocks = <&rcc GPIOZ>; st,bank-name = "GPIOZ"; st,bank-ioport = <11>; - ngpios = <8>; - gpio-ranges = <&pinctrl_z 0 400 8>; + status = "disabled"; + }; + + i2c2_pins_b2: i2c2-0 { + pins { + pinmux = ; /* I2C2_SCL */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + i2c2_pins_sleep_b2: i2c2-1 { + pins { + pinmux = ; /* I2C2_SCL */ + }; }; i2c4_pins_a: i2c4-0 { diff --git a/arch/arm/dts/stm32mp157a-avenger96.dts b/arch/arm/dts/stm32mp157a-avenger96.dts index dd0859769b..ba86cf5478 100644 --- a/arch/arm/dts/stm32mp157a-avenger96.dts +++ b/arch/arm/dts/stm32mp157a-avenger96.dts @@ -1,8 +1,5 @@ // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) /* - * Copyright (C) STMicroelectronics 2019 - All Rights Reserved - * Author: Alexandre Torgue for STMicroelectronics. - * * Copyright (C) Linaro Ltd 2019 - All Rights Reserved * Author: Manivannan Sadhasivam */ @@ -10,17 +7,19 @@ /dts-v1/; #include "stm32mp157c.dtsi" -#include "stm32mp157-pinctrl.dtsi" +#include "stm32mp157xac-pinctrl.dtsi" #include #include / { model = "Arrow Electronics STM32MP157A Avenger96 board"; - compatible = "st,stm32mp157a-avenger96", "st,stm32mp157"; + compatible = "arrow,stm32mp157a-avenger96", "st,stm32mp157"; aliases { ethernet0 = ðernet0; + mmc0 = &sdmmc1; serial0 = &uart4; + serial1 = &uart7; }; chosen { @@ -28,6 +27,7 @@ }; memory@c0000000 { + device_type = "memory"; reg = <0xc0000000 0x40000000>; }; @@ -109,7 +109,7 @@ &i2c2 { pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins_b>; + pinctrl-0 = <&i2c2_pins_b1 &i2c2_pins_b2>; i2c-scl-rising-time-ns = <185>; i2c-scl-falling-time-ns = <20>; status = "okay"; @@ -151,10 +151,10 @@ vddcore: buck1 { regulator-name = "vddcore"; - regulator-min-microvolt = <800000>; + regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1350000>; regulator-always-on; - regulator-initial-mode = <2>; + regulator-initial-mode = <0>; regulator-over-current-protection; }; @@ -163,17 +163,17 @@ regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; regulator-always-on; - regulator-initial-mode = <2>; + regulator-initial-mode = <0>; regulator-over-current-protection; }; vdd: buck3 { regulator-name = "vdd"; - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <2500000>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; regulator-always-on; st,mask_reset; - regulator-initial-mode = <8>; + regulator-initial-mode = <0>; regulator-over-current-protection; }; @@ -183,7 +183,7 @@ regulator-max-microvolt = <3300000>; regulator-always-on; regulator-over-current-protection; - regulator-initial-mode = <8>; + regulator-initial-mode = <0>; }; vdda: ldo1 { @@ -204,8 +204,8 @@ vtt_ddr: ldo3 { regulator-name = "vtt_ddr"; - regulator-min-microvolt = <0000000>; - regulator-max-microvolt = <1000000>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <750000>; regulator-always-on; regulator-over-current-protection; }; @@ -233,6 +233,7 @@ regulator-max-microvolt = <1800000>; interrupts = ; interrupt-parent = <&pmic>; + regulator-enable-ramp-delay = <300000>; }; vref_ddr: vref_ddr { @@ -294,8 +295,10 @@ }; &sdmmc1 { - pinctrl-names = "default"; + pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; broken-cd; st,sig-dir; st,neg-edge; @@ -325,12 +328,16 @@ }; &uart4 { + /* On Low speed expansion header */ + label = "LS-UART1"; pinctrl-names = "default"; pinctrl-0 = <&uart4_pins_b>; status = "okay"; }; &uart7 { + /* On Low speed expansion header */ + label = "LS-UART0"; pinctrl-names = "default"; pinctrl-0 = <&uart7_pins_a>; status = "okay"; diff --git a/arch/arm/dts/stm32mp157a-dk1.dts b/arch/arm/dts/stm32mp157a-dk1.dts index adb2464920..1d5c1a6d31 100644 --- a/arch/arm/dts/stm32mp157a-dk1.dts +++ b/arch/arm/dts/stm32mp157a-dk1.dts @@ -7,7 +7,7 @@ /dts-v1/; #include "stm32mp157c.dtsi" -#include "stm32mp157-pinctrl.dtsi" +#include "stm32mp157xac-pinctrl.dtsi" #include #include @@ -28,6 +28,17 @@ reg = <0xc0000000 0x20000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gpu_reserved: gpu@d4000000 { + reg = <0xd4000000 0x4000000>; + no-map; + }; + }; + led { compatible = "gpio-leds"; blue { @@ -65,6 +76,47 @@ }; }; +&gpu { + contiguous-area = <&gpu_reserved>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c1_pins_a>; + pinctrl-1 = <&i2c1_pins_sleep_a>; + i2c-scl-rising-time-ns = <100>; + i2c-scl-falling-time-ns = <7>; + status = "okay"; + /delete-property/dmas; + /delete-property/dma-names; + + hdmi-transmitter@39 { + compatible = "sil,sii9022"; + reg = <0x39>; + iovcc-supply = <&v3v3_hdmi>; + cvcc12-supply = <&v1v2_hdmi>; + reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpiog>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <<dc_pins_a>; + pinctrl-1 = <<dc_pins_sleep_a>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + sii9022_in: endpoint { + remote-endpoint = <<dc_ep0_out>; + }; + }; + }; + }; +}; &i2c4 { pinctrl-names = "default"; @@ -241,6 +293,20 @@ status = "okay"; }; +<dc { + status = "okay"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + ltdc_ep0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&sii9022_in>; + }; + }; +}; + &pwr { pwr-supply = <&vdd>; }; diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index 11981d6dd4..94ac025da8 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -6,7 +6,7 @@ /dts-v1/; #include "stm32mp157c.dtsi" -#include "stm32mp157-pinctrl.dtsi" +#include "stm32mp157xaa-pinctrl.dtsi" #include #include @@ -23,6 +23,17 @@ reg = <0xC0000000 0x40000000>; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gpu_reserved: gpu@e8000000 { + reg = <0xe8000000 0x8000000>; + no-map; + }; + }; + aliases { serial0 = &uart4; }; @@ -45,6 +56,11 @@ status = "okay"; }; +&gpu { + contiguous-area = <&gpu_reserved>; + status = "okay"; +}; + &i2c4 { pinctrl-names = "default"; pinctrl-0 = <&i2c4_pins_a>; diff --git a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi index b656eb120d..ec60486f41 100644 --- a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi @@ -17,14 +17,9 @@ }; &flash0 { - compatible = "jedec,spi-nor"; u-boot,dm-spl; }; -&flash1 { - compatible = "jedec,spi-nor"; -}; - &qspi { u-boot,dm-spl; }; diff --git a/arch/arm/dts/stm32mp157c-ev1.dts b/arch/arm/dts/stm32mp157c-ev1.dts index ca2a333d43..23de232831 100644 --- a/arch/arm/dts/stm32mp157c-ev1.dts +++ b/arch/arm/dts/stm32mp157c-ev1.dts @@ -7,6 +7,7 @@ #include "stm32mp157c-ed1.dts" #include +#include / { model = "STMicroelectronics STM32MP157C eval daughter on eval mother"; @@ -21,6 +22,51 @@ ethernet0 = ðernet0; }; + clocks { + clk_ext_camera: clk-ext-camera { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + }; + }; + + joystick { + compatible = "gpio-keys"; + #size-cells = <0>; + pinctrl-0 = <&joystick_pins>; + pinctrl-names = "default"; + button-0 { + label = "JoySel"; + linux,code = ; + interrupt-parent = <&stmfx_pinctrl>; + interrupts = <0 IRQ_TYPE_EDGE_RISING>; + }; + button-1 { + label = "JoyDown"; + linux,code = ; + interrupt-parent = <&stmfx_pinctrl>; + interrupts = <1 IRQ_TYPE_EDGE_RISING>; + }; + button-2 { + label = "JoyLeft"; + linux,code = ; + interrupt-parent = <&stmfx_pinctrl>; + interrupts = <2 IRQ_TYPE_EDGE_RISING>; + }; + button-3 { + label = "JoyRight"; + linux,code = ; + interrupt-parent = <&stmfx_pinctrl>; + interrupts = <3 IRQ_TYPE_EDGE_RISING>; + }; + button-4 { + label = "JoyUp"; + linux,code = ; + interrupt-parent = <&stmfx_pinctrl>; + interrupts = <4 IRQ_TYPE_EDGE_RISING>; + }; + }; + panel_backlight: panel-backlight { compatible = "gpio-backlight"; gpios = <&gpiod 13 GPIO_ACTIVE_LOW>; @@ -35,6 +81,23 @@ status = "okay"; }; +&dcmi { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&dcmi_pins_a>; + pinctrl-1 = <&dcmi_sleep_pins_a>; + + port { + dcmi_0: endpoint { + remote-endpoint = <&ov5640_0>; + bus-width = <8>; + hsync-active = <0>; + vsync-active = <0>; + pclk-sample = <1>; + }; + }; +}; + &dsi { #address-cells = <1>; #size-cells = <0>; @@ -64,6 +127,7 @@ reg = <0>; reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>; backlight = <&panel_backlight>; + power-supply = <&v3v3>; status = "okay"; port { @@ -116,6 +180,31 @@ i2c-scl-falling-time-ns = <20>; status = "okay"; + ov5640: camera@3c { + compatible = "ovti,ov5640"; + pinctrl-names = "default"; + pinctrl-0 = <&ov5640_pins>; + reg = <0x3c>; + clocks = <&clk_ext_camera>; + clock-names = "xclk"; + DOVDD-supply = <&v2v8>; + powerdown-gpios = <&stmfx_pinctrl 18 GPIO_ACTIVE_HIGH>; + reset-gpios = <&stmfx_pinctrl 19 GPIO_ACTIVE_LOW>; + rotation = <180>; + status = "okay"; + + port { + ov5640_0: endpoint { + remote-endpoint = <&dcmi_0>; + bus-width = <8>; + data-shift = <2>; /* lines 9:2 are used */ + hsync-active = <0>; + vsync-active = <0>; + pclk-sample = <1>; + }; + }; + }; + stmfx: stmfx@42 { compatible = "st,stmfx-0300"; reg = <0x42>; @@ -130,7 +219,18 @@ interrupt-controller; #interrupt-cells = <2>; gpio-ranges = <&stmfx_pinctrl 0 0 24>; - status = "disabled"; + + joystick_pins: joystick { + pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4"; + drive-push-pull; + bias-pull-down; + }; + + ov5640_pins: camera { + pins = "agpio2", "agpio3"; /* stmfx pins 18 & 19 */ + drive-push-pull; + output-low; + }; }; }; }; @@ -165,14 +265,16 @@ }; &qspi { - pinctrl-names = "default"; + pinctrl-names = "default", "sleep"; pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a &qspi_bk2_pins_a>; + pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a &qspi_bk2_sleep_pins_a>; reg = <0x58003000 0x1000>, <0x70000000 0x4000000>; #address-cells = <1>; #size-cells = <0>; status = "okay"; flash0: mx66l51235l@0 { + compatible = "jedec,spi-nor"; reg = <0>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; @@ -181,6 +283,7 @@ }; flash1: mx66l51235l@1 { + compatible = "jedec,spi-nor"; reg = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; @@ -245,8 +348,6 @@ }; &usbotg_hs { - pinctrl-names = "default"; - pinctrl-0 = <&usbotg_hs_pins_a>; dr_mode = "peripheral"; phys = <&usbphyc_port1 0>; phy-names = "usb2-phy"; diff --git a/arch/arm/dts/stm32mp157c.dtsi b/arch/arm/dts/stm32mp157c.dtsi index d15fba0c80..bcd8c1a59c 100644 --- a/arch/arm/dts/stm32mp157c.dtsi +++ b/arch/arm/dts/stm32mp157c.dtsi @@ -372,6 +372,17 @@ status = "disabled"; }; + i2s2: audio-controller@4000b000 { + compatible = "st,stm32h7-i2s"; + #sound-dai-cells = <0>; + reg = <0x4000b000 0x400>; + interrupts = ; + dmas = <&dmamux1 39 0x400 0x01>, + <&dmamux1 40 0x400 0x01>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + spi3: spi@4000c000 { #address-cells = <1>; #size-cells = <0>; @@ -386,6 +397,17 @@ status = "disabled"; }; + i2s3: audio-controller@4000c000 { + compatible = "st,stm32h7-i2s"; + #sound-dai-cells = <0>; + reg = <0x4000c000 0x400>; + interrupts = ; + dmas = <&dmamux1 61 0x400 0x01>, + <&dmamux1 62 0x400 0x01>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + spdifrx: audio-controller@4000d000 { compatible = "st,stm32h7-spdifrx"; #sound-dai-cells = <0>; @@ -614,6 +636,17 @@ status = "disabled"; }; + i2s1: audio-controller@44004000 { + compatible = "st,stm32h7-i2s"; + #sound-dai-cells = <0>; + reg = <0x44004000 0x400>; + interrupts = ; + dmas = <&dmamux1 37 0x400 0x01>, + <&dmamux1 38 0x400 0x01>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + spi4: spi@44005000 { #address-cells = <1>; #size-cells = <0>; @@ -715,6 +748,100 @@ status = "disabled"; }; + sai1: sai@4400a000 { + compatible = "st,stm32h7-sai"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x4400a000 0x400>; + reg = <0x4400a000 0x4>, <0x4400a3f0 0x10>; + interrupts = ; + resets = <&rcc SAI1_R>; + status = "disabled"; + + sai1a: audio-controller@4400a004 { + #sound-dai-cells = <0>; + + compatible = "st,stm32-sai-sub-a"; + reg = <0x4 0x1c>; + clocks = <&rcc SAI1_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 87 0x400 0x01>; + status = "disabled"; + }; + + sai1b: audio-controller@4400a024 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-b"; + reg = <0x24 0x1c>; + clocks = <&rcc SAI1_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 88 0x400 0x01>; + status = "disabled"; + }; + }; + + sai2: sai@4400b000 { + compatible = "st,stm32h7-sai"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x4400b000 0x400>; + reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>; + interrupts = ; + resets = <&rcc SAI2_R>; + status = "disabled"; + + sai2a: audio-controller@4400b004 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-a"; + reg = <0x4 0x1c>; + clocks = <&rcc SAI2_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 89 0x400 0x01>; + status = "disabled"; + }; + + sai2b: audio-controller@4400b024 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-b"; + reg = <0x24 0x1c>; + clocks = <&rcc SAI2_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 90 0x400 0x01>; + status = "disabled"; + }; + }; + + sai3: sai@4400c000 { + compatible = "st,stm32h7-sai"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x4400c000 0x400>; + reg = <0x4400c000 0x4>, <0x4400c3f0 0x10>; + interrupts = ; + resets = <&rcc SAI3_R>; + status = "disabled"; + + sai3a: audio-controller@4400c004 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-a"; + reg = <0x04 0x1c>; + clocks = <&rcc SAI3_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 113 0x400 0x01>; + status = "disabled"; + }; + + sai3b: audio-controller@4400c024 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-b"; + reg = <0x24 0x1c>; + clocks = <&rcc SAI3_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 114 0x400 0x01>; + status = "disabled"; + }; + }; + dfsdm: dfsdm@4400d000 { compatible = "st,stm32mp1-dfsdm"; reg = <0x4400d000 0x800>; @@ -945,6 +1072,18 @@ status = "disabled"; }; + dcmi: dcmi@4c006000 { + compatible = "st,stm32-dcmi"; + reg = <0x4c006000 0x400>; + interrupts = ; + resets = <&rcc CAMITF_R>; + clocks = <&rcc DCMI>; + clock-names = "mclk"; + dmas = <&dmamux1 75 0x400 0x0d>; + dma-names = "tx"; + status = "disabled"; + }; + rcc: rcc@50000000 { compatible = "st,stm32mp1-rcc", "syscon"; reg = <0x50000000 0x1000>; @@ -1084,6 +1223,37 @@ status = "disabled"; }; + sai4: sai@50027000 { + compatible = "st,stm32h7-sai"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x50027000 0x400>; + reg = <0x50027000 0x4>, <0x500273f0 0x10>; + interrupts = ; + resets = <&rcc SAI4_R>; + status = "disabled"; + + sai4a: audio-controller@50027004 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-a"; + reg = <0x04 0x1c>; + clocks = <&rcc SAI4_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 99 0x400 0x01>; + status = "disabled"; + }; + + sai4b: audio-controller@50027024 { + #sound-dai-cells = <0>; + compatible = "st,stm32-sai-sub-b"; + reg = <0x24 0x1c>; + clocks = <&rcc SAI4_K>; + clock-names = "sai_ck"; + dmas = <&dmamux1 100 0x400 0x01>; + status = "disabled"; + }; + }; + dts: thermal@50028000 { compatible = "st,stm32-thermal"; reg = <0x50028000 0x100>; @@ -1242,6 +1412,16 @@ status = "disabled"; }; + gpu: gpu@59000000 { + compatible = "vivante,gc"; + reg = <0x59000000 0x800>; + interrupts = ; + clocks = <&rcc GPU>, <&rcc GPU_K>; + clock-names = "bus" ,"core"; + resets = <&rcc GPU_R>; + status = "disabled"; + }; + dsi: dsi@5a000000 { compatible = "st,stm32-dsi"; reg = <0x5a000000 0x800>; diff --git a/arch/arm/dts/stm32mp157xaa-pinctrl.dtsi b/arch/arm/dts/stm32mp157xaa-pinctrl.dtsi new file mode 100644 index 0000000000..875adf5e1e --- /dev/null +++ b/arch/arm/dts/stm32mp157xaa-pinctrl.dtsi @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2019 - All Rights Reserved + * Author: Alexandre Torgue + */ + +#include "stm32mp157-pinctrl.dtsi" +/ { + soc { + pinctrl: pin-controller@50002000 { + st,package = ; + + gpioa: gpio@50002000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 0 16>; + }; + + gpiob: gpio@50003000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 16 16>; + }; + + gpioc: gpio@50004000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 32 16>; + }; + + gpiod: gpio@50005000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 48 16>; + }; + + gpioe: gpio@50006000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 64 16>; + }; + + gpiof: gpio@50007000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 80 16>; + }; + + gpiog: gpio@50008000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 96 16>; + }; + + gpioh: gpio@50009000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 112 16>; + }; + + gpioi: gpio@5000a000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 128 16>; + }; + + gpioj: gpio@5000b000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 144 16>; + }; + + gpiok: gpio@5000c000 { + status = "okay"; + ngpios = <8>; + gpio-ranges = <&pinctrl 0 160 8>; + }; + }; + + pinctrl_z: pin-controller-z@54004000 { + st,package = ; + + gpioz: gpio@54004000 { + status = "okay"; + ngpios = <8>; + gpio-ranges = <&pinctrl_z 0 400 8>; + }; + }; + }; +}; diff --git a/arch/arm/dts/stm32mp157xab-pinctrl.dtsi b/arch/arm/dts/stm32mp157xab-pinctrl.dtsi new file mode 100644 index 0000000000..961fa12a59 --- /dev/null +++ b/arch/arm/dts/stm32mp157xab-pinctrl.dtsi @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2019 - All Rights Reserved + * Author: Alexandre Torgue + */ + +#include "stm32mp157-pinctrl.dtsi" +/ { + soc { + pinctrl: pin-controller@50002000 { + st,package = ; + + gpioa: gpio@50002000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 0 16>; + }; + + gpiob: gpio@50003000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 16 16>; + }; + + gpioc: gpio@50004000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 32 16>; + }; + + gpiod: gpio@50005000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 48 16>; + }; + + gpioe: gpio@50006000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 64 16>; + }; + + gpiof: gpio@50007000 { + status = "okay"; + ngpios = <6>; + gpio-ranges = <&pinctrl 6 86 6>; + }; + + gpiog: gpio@50008000 { + status = "okay"; + ngpios = <10>; + gpio-ranges = <&pinctrl 6 102 10>; + }; + + gpioh: gpio@50009000 { + status = "okay"; + ngpios = <2>; + gpio-ranges = <&pinctrl 0 112 2>; + }; + }; + }; +}; diff --git a/arch/arm/dts/stm32mp157xac-pinctrl.dtsi b/arch/arm/dts/stm32mp157xac-pinctrl.dtsi new file mode 100644 index 0000000000..26600f188d --- /dev/null +++ b/arch/arm/dts/stm32mp157xac-pinctrl.dtsi @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2019 - All Rights Reserved + * Author: Alexandre Torgue + */ + +#include "stm32mp157-pinctrl.dtsi" +/ { + soc { + pinctrl: pin-controller@50002000 { + st,package = ; + + gpioa: gpio@50002000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 0 16>; + }; + + gpiob: gpio@50003000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 16 16>; + }; + + gpioc: gpio@50004000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 32 16>; + }; + + gpiod: gpio@50005000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 48 16>; + }; + + gpioe: gpio@50006000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 64 16>; + }; + + gpiof: gpio@50007000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 80 16>; + }; + + gpiog: gpio@50008000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 96 16>; + }; + + gpioh: gpio@50009000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 112 16>; + }; + + gpioi: gpio@5000a000 { + status = "okay"; + ngpios = <12>; + gpio-ranges = <&pinctrl 0 128 12>; + }; + }; + + pinctrl_z: pin-controller-z@54004000 { + st,package = ; + + gpioz: gpio@54004000 { + status = "okay"; + ngpios = <8>; + gpio-ranges = <&pinctrl_z 0 400 8>; + }; + }; + }; +}; diff --git a/arch/arm/dts/stm32mp157xad-pinctrl.dtsi b/arch/arm/dts/stm32mp157xad-pinctrl.dtsi new file mode 100644 index 0000000000..910113f3e6 --- /dev/null +++ b/arch/arm/dts/stm32mp157xad-pinctrl.dtsi @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2019 - All Rights Reserved + * Author: Alexandre Torgue + */ + +#include "stm32mp157-pinctrl.dtsi" +/ { + soc { + pinctrl: pin-controller@50002000 { + st,package = ; + + gpioa: gpio@50002000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 0 16>; + }; + + gpiob: gpio@50003000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 16 16>; + }; + + gpioc: gpio@50004000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 32 16>; + }; + + gpiod: gpio@50005000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 48 16>; + }; + + gpioe: gpio@50006000 { + status = "okay"; + ngpios = <16>; + gpio-ranges = <&pinctrl 0 64 16>; + }; + + gpiof: gpio@50007000 { + status = "okay"; + ngpios = <6>; + gpio-ranges = <&pinctrl 6 86 6>; + }; + + gpiog: gpio@50008000 { + status = "okay"; + ngpios = <10>; + gpio-ranges = <&pinctrl 6 102 10>; + }; + + gpioh: gpio@50009000 { + status = "okay"; + ngpios = <2>; + gpio-ranges = <&pinctrl 0 112 2>; + }; + }; + }; +}; From be16c41f853e9cf0f7f85cc96e8fb5c27a74d57a Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:13 +0200 Subject: [PATCH 09/64] ARM: dts: stm32mp1: DDR config v1.45 Update DDR configuration with the latest update: - Change DQSGE to 1 for DDR3, to cure missing DQS preamble. Signed-off-by: Nicolas Le Bayon Signed-off-by: Patrick Delaunay --- arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi | 4 ++-- arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi | 5 ++--- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi index dc30360b0a..11e8f2bef6 100644 --- a/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi +++ b/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi @@ -16,7 +16,7 @@ * address mapping : RBC * Tc > + 85C : N */ -#define DDR_MEM_NAME "DDR3-1066/888 bin G 1x4Gb 533MHz v1.44" +#define DDR_MEM_NAME "DDR3-1066/888 bin G 1x4Gb 533MHz v1.45" #define DDR_MEM_SPEED 533000 #define DDR_MEM_SIZE 0x20000000 @@ -89,7 +89,7 @@ #define DDR_PTR2 0x042DA068 #define DDR_ACIOCR 0x10400812 #define DDR_DXCCR 0x00000C40 -#define DDR_DSGCR 0xF200001F +#define DDR_DSGCR 0xF200011F #define DDR_DCR 0x0000000B #define DDR_DTPR0 0x38D488D0 #define DDR_DTPR1 0x098B00D8 diff --git a/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi index 8158a56f13..4b70b60554 100644 --- a/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi +++ b/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi @@ -16,8 +16,7 @@ * address mapping : RBC * Tc > + 85C : N */ - -#define DDR_MEM_NAME "DDR3-1066/888 bin G 2x4Gb 533MHz v1.44" +#define DDR_MEM_NAME "DDR3-1066/888 bin G 2x4Gb 533MHz v1.45" #define DDR_MEM_SPEED 533000 #define DDR_MEM_SIZE 0x40000000 @@ -90,7 +89,7 @@ #define DDR_PTR2 0x042DA068 #define DDR_ACIOCR 0x10400812 #define DDR_DXCCR 0x00000C40 -#define DDR_DSGCR 0xF200001F +#define DDR_DSGCR 0xF200011F #define DDR_DCR 0x0000000B #define DDR_DTPR0 0x38D488D0 #define DDR_DTPR1 0x098B00D8 From 6d923007d64653458b818c4d60ff90ed48aa432d Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:14 +0200 Subject: [PATCH 10/64] ARM: dts: stm32mp1: Add iwdg2 support for SPL This patch adds independent watchdog support for stm32mp157c in SPL. Signed-off-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- arch/arm/dts/stm32mp157-u-boot.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/stm32mp157-u-boot.dtsi b/arch/arm/dts/stm32mp157-u-boot.dtsi index 8102ce20d0..ba13ebb33b 100644 --- a/arch/arm/dts/stm32mp157-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157-u-boot.dtsi @@ -106,6 +106,10 @@ u-boot,dm-pre-reloc; }; +&iwdg2 { + u-boot,dm-pre-reloc; +}; + &pinctrl { u-boot,dm-pre-reloc; }; From 67b7684f8ce3a13c17b5246b6ad3c934b85c7df0 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:15 +0200 Subject: [PATCH 11/64] ARM: dts: stm32mp1: Add PSCI node access before relocation Add node in DT and avoid error to search UCLASS_SYSRESET in board_f.c::print_resetinfo() and lost 1.6s in U-Boot for the trusted boot chain. Signed-off-by: Patrick Delaunay --- arch/arm/dts/stm32mp157-u-boot.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/stm32mp157-u-boot.dtsi b/arch/arm/dts/stm32mp157-u-boot.dtsi index ba13ebb33b..1c4ad6797c 100644 --- a/arch/arm/dts/stm32mp157-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157-u-boot.dtsi @@ -25,6 +25,11 @@ u-boot,dm-pre-reloc; }; + /* need PSCI for sysreset during board_f */ + psci { + u-boot,dm-pre-proper; + }; + reboot { u-boot,dm-pre-reloc; }; From 2c2580984a513a202bbbb8c5307788051f41faa9 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:16 +0200 Subject: [PATCH 12/64] ARM: dts: stm32mp1: add ldtc pre-reloc proper in SOC file The pre-relocation probe is needed to reserve video frame buffer in video_reserve() for all the board; LDTC must be tagged prereloc in SOC U-Boot dtsi file. Signed-off-by: Patrick Delaunay --- arch/arm/dts/stm32mp157-u-boot.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/stm32mp157-u-boot.dtsi b/arch/arm/dts/stm32mp157-u-boot.dtsi index 1c4ad6797c..0d1d387e54 100644 --- a/arch/arm/dts/stm32mp157-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157-u-boot.dtsi @@ -115,6 +115,11 @@ u-boot,dm-pre-reloc; }; +/* pre-reloc probe = reserve video frame buffer in video_reserve() */ +<dc { + u-boot,dm-pre-proper; +}; + &pinctrl { u-boot,dm-pre-reloc; }; From 9c2214b489d142b75359956453bffd7992d84b93 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:17 +0200 Subject: [PATCH 13/64] ARM: dts: stm32mp1: add key support on DK1/DK2 Allow to use PA13 and PA14 to force fastboot mode or STM32CubeProgrammer mode. Signed-off-by: Patrick Delaunay --- arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi index 36c852d28b..2a1cfd37e9 100644 --- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi @@ -17,6 +17,8 @@ u-boot,boot-led = "heartbeat"; u-boot,error-led = "error"; st,adc_usb_pd = <&adc1 18>, <&adc1 19>; + st,fastboot-gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; + st,stm32prog-gpios = <&gpioa 14 GPIO_ACTIVE_LOW>; }; led { red { From 7acda7eae544992147850f1f9cbb903aaa3af34d Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:18 +0200 Subject: [PATCH 14/64] ARM: dts: stm32mp1: add pull-up on serial rx of console connected to STLINK Avoid U-Boot auto-boot interruption for line break detection on console when the RX line connected to STLINK is floating (-IO error in getc cause by framing error and testc return 1) Same workaround is applied on all the STMicroelectonics board. Signed-off-by: Patrick Delaunay --- arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi | 2 ++ arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi index 2a1cfd37e9..dcaab3eef2 100644 --- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi @@ -189,6 +189,8 @@ }; pins2 { u-boot,dm-pre-reloc; + /* pull-up on rx to avoid floating level */ + bias-pull-up; }; }; diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi index 200601edff..21c89c1ea2 100644 --- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi @@ -206,5 +206,7 @@ }; pins2 { u-boot,dm-pre-reloc; + /* pull-up on rx to avoid floating level */ + bias-pull-up; }; }; From 17ac2150c3c6356cf2d88e7e105061f02b3cada8 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:19 +0200 Subject: [PATCH 15/64] dt-bindings: clock: stm32mp1: support disabled fixed clock Add precision for disabled fixed clock in stm32mp1 binding. Signed-off-by: Patrick Delaunay --- doc/device-tree-bindings/clock/st,stm32mp1.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/doc/device-tree-bindings/clock/st,stm32mp1.txt b/doc/device-tree-bindings/clock/st,stm32mp1.txt index 02e14609bb..ec1d703f34 100644 --- a/doc/device-tree-bindings/clock/st,stm32mp1.txt +++ b/doc/device-tree-bindings/clock/st,stm32mp1.txt @@ -164,8 +164,10 @@ used to define the state of associated ST32MP1 oscillators: - clk-csi At boot the clock tree initialization will - - enable oscillators present in device tree + - enable oscillators present in device tree and not disabled + (node with status="disabled"), - disable HSI oscillator if the node is absent (always activated by bootrom) + and not disabled (node with status="disabled"). Optional properties : From 178a415534c51e0228f3999ec52e64c019f867ee Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:20 +0200 Subject: [PATCH 16/64] stpmic1: program pmic to keep only the debug unit on Depending on backup register value, we maintain the debug unit powered-on for debugging purpose. Only BUCK1 is required for powering the debug unit, so revert the setting for all the other power lanes, except BUCK3 that has to be always on. Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/include/mach/stm32.h | 1 + board/st/stm32mp1/spl.c | 14 ++++++++++++++ include/power/stpmic1.h | 5 +++-- 3 files changed, 18 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h index 1d4b5482ac..b3e9ccc5d3 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h @@ -94,6 +94,7 @@ enum boot_device { #define TAMP_BOOT_DEVICE_MASK GENMASK(7, 4) #define TAMP_BOOT_INSTANCE_MASK GENMASK(3, 0) #define TAMP_BOOT_FORCED_MASK GENMASK(7, 0) +#define TAMP_BOOT_DEBUG_ON BIT(16) enum forced_boot_mode { BOOT_NORMAL = 0x00, diff --git a/board/st/stm32mp1/spl.c b/board/st/stm32mp1/spl.c index e19be0f770..e65ff288ea 100644 --- a/board/st/stm32mp1/spl.c +++ b/board/st/stm32mp1/spl.c @@ -27,5 +27,19 @@ void spl_board_init(void) STPMIC1_BUCKS_MRST_CR, STPMIC1_MRST_BUCK(STPMIC1_BUCK3), STPMIC1_MRST_BUCK(STPMIC1_BUCK3)); + + /* Check if debug is enabled to program PMIC according to the bit */ + if ((readl(TAMP_BOOT_CONTEXT) & TAMP_BOOT_DEBUG_ON) && !ret) { + printf("Keep debug unit ON\n"); + + pmic_clrsetbits(dev, STPMIC1_BUCKS_MRST_CR, + STPMIC1_MRST_BUCK_DEBUG, + STPMIC1_MRST_BUCK_DEBUG); + + if (STPMIC1_MRST_LDO_DEBUG) + pmic_clrsetbits(dev, STPMIC1_LDOS_MRST_CR, + STPMIC1_MRST_LDO_DEBUG, + STPMIC1_MRST_LDO_DEBUG); + } #endif } diff --git a/include/power/stpmic1.h b/include/power/stpmic1.h index 0e6721d852..d90a1a9c93 100644 --- a/include/power/stpmic1.h +++ b/include/power/stpmic1.h @@ -22,11 +22,12 @@ /* BUCKS_MRST_CR */ #define STPMIC1_MRST_BUCK(buck) BIT(buck) -#define STPMIC1_MRST_BUCK_ALL GENMASK(3, 0) +#define STPMIC1_MRST_BUCK_DEBUG (STPMIC1_MRST_BUCK(STPMIC1_BUCK1) | \ + STPMIC1_MRST_BUCK(STPMIC1_BUCK3)) /* LDOS_MRST_CR */ #define STPMIC1_MRST_LDO(ldo) BIT(ldo) -#define STPMIC1_MRST_LDO_ALL GENMASK(6, 0) +#define STPMIC1_MRST_LDO_DEBUG 0 /* BUCKx_MAIN_CR (x=1...4) */ #define STPMIC1_BUCK_ENA BIT(0) From 3ef4aca8937b1411c70b2219a24f09651e76bca5 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:21 +0200 Subject: [PATCH 17/64] stm32mp1: configs: remove CONFIG_SYS_HZ Use the default value from lib/Kconfig. Signed-off-by: Patrick Delaunay --- include/configs/stm32mp1.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 1bed57083d..033291efcc 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -10,11 +10,6 @@ #include #include -/* - * Number of clock ticks in 1 sec - */ -#define CONFIG_SYS_HZ 1000 - #ifndef CONFIG_STM32MP1_TRUSTED /* PSCI support */ #define CONFIG_ARMV7_PSCI_1_0 From c50c928064e76462aeeee1ce2ebc955c580e9a8f Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:22 +0200 Subject: [PATCH 18/64] stm32mp1: configs: activate CONFIG_SILENT_CONSOLE Allow to disable console with environment variable 'silent': > env set silent 1; env save Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 9dc3c4d1c5..e5f05af6ac 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -47,6 +47,7 @@ config TARGET_STM32MP1 imply BOOTSTAGE imply CMD_BOOTCOUNT imply CMD_BOOTSTAGE + imply SILENT_CONSOLE imply SYSRESET_PSCI if STM32MP1_TRUSTED imply SYSRESET_SYSCON if !STM32MP1_TRUSTED help From 67551980018e7dd00e3c3f103dc6f6d636ab7020 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:23 +0200 Subject: [PATCH 19/64] stm32mp1: configs: activate PRE_CONSOLE_BUFFER Correctly handle silent=1 in the default environment. Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index e5f05af6ac..7efe46432a 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -47,6 +47,7 @@ config TARGET_STM32MP1 imply BOOTSTAGE imply CMD_BOOTCOUNT imply CMD_BOOTSTAGE + imply PRE_CONSOLE_BUFFER imply SILENT_CONSOLE imply SYSRESET_PSCI if STM32MP1_TRUSTED imply SYSRESET_SYSCON if !STM32MP1_TRUSTED @@ -110,6 +111,13 @@ config CMD_STM32KEY fuse public key hash in corresponding fuse used to authenticate binary. + +config PRE_CON_BUF_ADDR + default 0xC02FF000 + +config PRE_CON_BUF_SZ + default 4096 + config BOOTSTAGE_STASH_ADDR default 0xC3000000 From 3a5a935c52d4d334459a70ead819f2d7b6797727 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:24 +0200 Subject: [PATCH 20/64] stm32mp1: configs: deactivate ARMV7_VIRT for basic boot for the moment basic and trusted configuration must start CPU in Supervisor mode and not in Hypervisor Signed-off-by: Patrick Delaunay --- configs/stm32mp15_basic_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 27b8525fa2..a4c202789b 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL=y CONFIG_TARGET_STM32MP1=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y +# CONFIG_ARMV7_VIRT is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" From 16a0722320f9692e5dc42a1cab47644fa56ddb36 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:25 +0200 Subject: [PATCH 21/64] stm32mp1: configs: select CONFIG_STM32_SERIAL Select the serial driver mandatory for the console. Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/Kconfig | 1 + configs/stm32mp15_basic_defconfig | 1 - configs/stm32mp15_optee_defconfig | 1 - configs/stm32mp15_trusted_defconfig | 1 - 4 files changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 7efe46432a..0de9b3ea12 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -42,6 +42,7 @@ config TARGET_STM32MP1 select PINCTRL_STM32 select STM32_RCC select STM32_RESET + select STM32_SERIAL select SYS_ARCH_TIMER imply BOOTCOUNT_LIMIT imply BOOTSTAGE diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index a4c202789b..1edea79492 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -106,7 +106,6 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y -CONFIG_STM32_SERIAL=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y diff --git a/configs/stm32mp15_optee_defconfig b/configs/stm32mp15_optee_defconfig index 0565e5ec12..11f83592e7 100644 --- a/configs/stm32mp15_optee_defconfig +++ b/configs/stm32mp15_optee_defconfig @@ -92,7 +92,6 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y -CONFIG_STM32_SERIAL=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 844cbcd076..bc76c083ad 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -91,7 +91,6 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y -CONFIG_STM32_SERIAL=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y From a67d958177bb4440fad60176cd0252b441412a96 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:26 +0200 Subject: [PATCH 22/64] stm32mp1: configs: Activate DISABLE_CONSOLE Activate DISABLE_CONSOLE needed for stm32prog support on uart. Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 0de9b3ea12..cee3ce16bb 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -48,6 +48,7 @@ config TARGET_STM32MP1 imply BOOTSTAGE imply CMD_BOOTCOUNT imply CMD_BOOTSTAGE + imply DISABLE_CONSOLE imply PRE_CONSOLE_BUFFER imply SILENT_CONSOLE imply SYSRESET_PSCI if STM32MP1_TRUSTED From 6a9a34ff48662de7396a50084a4a5e060fb798d5 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:27 +0200 Subject: [PATCH 23/64] stm32mp1: configs: support MTDPARTS only if needed MTD is only use if NAND or NOR driver is activated. Signed-off-by: Patrick Delaunay --- include/configs/stm32mp1.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 033291efcc..b2b86602bb 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -79,7 +79,9 @@ #endif /* Dynamic MTD partition support */ +#if defined(CONFIG_STM32_QSPI) || defined(CONFIG_NAND_STM32_FMC2) #define CONFIG_SYS_MTDPARTS_RUNTIME +#endif /*****************************************************************************/ #ifdef CONFIG_DISTRO_DEFAULTS From f219361de1234c922f384eaa381fc1ebc15550e8 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:28 +0200 Subject: [PATCH 24/64] stm32mp1: configs: imply CONFIG_OF_LIBFDT_OVERLAY Add imply for FDT overlay that can be usefuill for kernel device tree management but it is not mandatory (can be removed to gain space) Signed-off-by: Patrick Delaunay --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cbb2a2a158..37b2585f56 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1567,6 +1567,7 @@ config ARCH_STM32MP imply SPL_SYSRESET imply CMD_DM imply CMD_POWEROFF + imply OF_LIBFDT_OVERLAY imply ENV_VARS_UBOOT_RUNTIME_CONFIG imply USE_PREBOOT help From f337403ff33d7ccc09fbec62551b974b07eed403 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:29 +0200 Subject: [PATCH 25/64] stm32mp1: configs: Deactivate SPI_FLASH_BAR Remove CONFIG_SPI_FLASH_BAR as the SPI NOR layer uses stateless 4 byte opcodes by default. Signed-off-by: Patrick Delaunay --- configs/stm32mp15_basic_defconfig | 1 - configs/stm32mp15_optee_defconfig | 1 - configs/stm32mp15_trusted_defconfig | 1 - 3 files changed, 3 deletions(-) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 1edea79492..5a372e1976 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -81,7 +81,6 @@ CONFIG_NAND=y CONFIG_NAND_STM32_FMC2=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/stm32mp15_optee_defconfig b/configs/stm32mp15_optee_defconfig index 11f83592e7..a6c010e82a 100644 --- a/configs/stm32mp15_optee_defconfig +++ b/configs/stm32mp15_optee_defconfig @@ -69,7 +69,6 @@ CONFIG_NAND=y CONFIG_NAND_STM32_FMC2=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index bc76c083ad..de87834b9f 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -68,7 +68,6 @@ CONFIG_NAND=y CONFIG_NAND_STM32_FMC2=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y From 28ea00b1df11a0ee9a4cb7cf40485c21bb7eb747 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:30 +0200 Subject: [PATCH 26/64] stm32mp1: configs: add CONFIG_DM_VIDEO Activate command DM_VIDEO for LCD support Signed-off-by: Patrick Delaunay --- configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_optee_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 5a372e1976..7e5ae45dd0 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -119,4 +119,5 @@ CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics" CONFIG_USB_GADGET_VENDOR_NUM=0x0483 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_DM_VIDEO=y CONFIG_FDT_FIXUP_PARTITIONS=y diff --git a/configs/stm32mp15_optee_defconfig b/configs/stm32mp15_optee_defconfig index a6c010e82a..0860a26f90 100644 --- a/configs/stm32mp15_optee_defconfig +++ b/configs/stm32mp15_optee_defconfig @@ -105,4 +105,5 @@ CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics" CONFIG_USB_GADGET_VENDOR_NUM=0x0483 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_DM_VIDEO=y CONFIG_FDT_FIXUP_PARTITIONS=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index de87834b9f..5855c36769 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -104,4 +104,5 @@ CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics" CONFIG_USB_GADGET_VENDOR_NUM=0x0483 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_DM_VIDEO=y CONFIG_FDT_FIXUP_PARTITIONS=y From 1e1173d964b8c689bc845492050d6ce29bb92bc7 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:31 +0200 Subject: [PATCH 27/64] stm32mp1: configs: add BACKLIGHT_GPIO support Backlight of panel raydium RM68200 is controlled by a simple gpio, thus we activate the support for the needed driver. Signed-off-by: Patrick Delaunay --- configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_optee_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 7e5ae45dd0..ca7e91c370 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -120,4 +120,5 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_DM_VIDEO=y +CONFIG_BACKLIGHT_GPIO=y CONFIG_FDT_FIXUP_PARTITIONS=y diff --git a/configs/stm32mp15_optee_defconfig b/configs/stm32mp15_optee_defconfig index 0860a26f90..f480c3da05 100644 --- a/configs/stm32mp15_optee_defconfig +++ b/configs/stm32mp15_optee_defconfig @@ -106,4 +106,5 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_DM_VIDEO=y +CONFIG_BACKLIGHT_GPIO=y CONFIG_FDT_FIXUP_PARTITIONS=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 5855c36769..585817e2eb 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -105,4 +105,5 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_DM_VIDEO=y +CONFIG_BACKLIGHT_GPIO=y CONFIG_FDT_FIXUP_PARTITIONS=y From a09fb8716cb883a3f08eb99b31941635cd6103ca Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:32 +0200 Subject: [PATCH 28/64] stm32mp1: configs: add CONFIG_CMD_BMP Activate command BMP for splash screen support Signed-off-by: Patrick Delaunay --- configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_optee_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index ca7e91c370..740d4829fe 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y diff --git a/configs/stm32mp15_optee_defconfig b/configs/stm32mp15_optee_defconfig index f480c3da05..e5b9be78d4 100644 --- a/configs/stm32mp15_optee_defconfig +++ b/configs/stm32mp15_optee_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 585817e2eb..2d9be045a6 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y From 9cd8b9f0c5db9b915bb55359ee8b521380b45d91 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:33 +0200 Subject: [PATCH 29/64] stm32mp1: configs: add condition to activate WATCHDOG in SPL Only activate WATCHDOG in SPL when CONFIG_WATCHDOG is activated in U-Boot. Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index cee3ce16bb..187be17aab 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -17,7 +17,7 @@ config SPL select SPL_DM_RESET select SPL_SERIAL_SUPPORT select SPL_SYSCON - select SPL_WATCHDOG_SUPPORT + select SPL_WATCHDOG_SUPPORT if WATCHDOG imply BOOTSTAGE_STASH if SPL_BOOTSTAGE imply SPL_BOOTSTAGE if BOOTSTAGE imply SPL_DISPLAY_PRINT From f95f98c8df5f4eb51106997ab4bda6b85ec21174 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:34 +0200 Subject: [PATCH 30/64] stm32mp1: configs: add altbootcmd Add altbootcmad as it is used for - bootcountlimit - in mach-stm32mp/cpu.c for BOOT_RECOVERY mode Signed-off-by: Patrick Delaunay --- include/configs/stm32mp1.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index b2b86602bb..ae0530851f 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -150,7 +150,8 @@ "ramdisk_addr_r=0xc4400000\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ - "env_default=1\0" \ + "altbootcmd=run bootcmd\0" \ + "env_default=1\0" \ "env_check=if test $env_default -eq 1;"\ " then env set env_default 0;env save;fi\0" \ STM32MP_BOOTCMD \ From 53b95a3456e8881e553ee84b7b65a2ad151e7c73 Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Tue, 30 Jul 2019 19:16:35 +0200 Subject: [PATCH 31/64] stm32mp1: configs: Set bootdelay to 1 This allows to display splashcreen without waiting an extra delay of 2 seconds due to default value of bootdelay. Signed-off-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- include/configs/stm32mp1.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index ae0530851f..92660fe2a0 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -142,6 +142,7 @@ * and the ramdisk at the end. */ #define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdelay=1\0" \ "kernel_addr_r=0xc2000000\0" \ "fdt_addr_r=0xc4000000\0" \ "scriptaddr=0xc4100000\0" \ From 49ef8e134e427ef0a752d741063d69fe4c988ed5 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:36 +0200 Subject: [PATCH 32/64] stm32mp1: configs: add spi load support in spl Add the boot for NOR, SPL load U-Boot.img at offset CONFIG_SYS_SPI_U_BOOT_OFFS = 0x80000. It is the start address of mtd partition ssbl in nor. Signed-off-by: Christophe Kerello Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/Kconfig | 1 + configs/stm32mp15_basic_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 187be17aab..c9bc084194 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -16,6 +16,7 @@ config SPL select SPL_REGMAP select SPL_DM_RESET select SPL_SERIAL_SUPPORT + select SPL_SPI_LOAD select SPL_SYSCON select SPL_WATCHDOG_SUPPORT if WATCHDOG imply BOOTSTAGE_STASH if SPL_BOOTSTAGE diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 740d4829fe..cf3988dafe 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3 CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SYS_PROMPT="STM32MP> " # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_ELF is not set From 8b8b3d6b55b9503adb5340936870b16777aeed04 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:37 +0200 Subject: [PATCH 33/64] stm32mp1: board: add environment variable for board id and board rev Add variable to identify board with HW id (read from OTP) and revision. Signed-off-by: Patrick Delaunay --- board/st/stm32mp1/stm32mp1.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 279c7b7797..fdc4af3b64 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -539,6 +539,10 @@ int board_late_init(void) #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG const void *fdt_compat; int fdt_compat_len; + int ret; + u32 otp; + struct udevice *dev; + char buf[10]; fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible", &fdt_compat_len); @@ -548,6 +552,21 @@ int board_late_init(void) else env_set("board_name", fdt_compat + 3); } + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stm32mp_bsec), + &dev); + + if (!ret) + ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD), + &otp, sizeof(otp)); + if (!ret && otp) { + snprintf(buf, sizeof(buf), "0x%04x", otp >> 16); + env_set("board_id", buf); + + snprintf(buf, sizeof(buf), "0x%04x", + ((otp >> 8) & 0xF) - 1 + 0xA); + env_set("board_rev", buf); + } #endif /* for DK1/DK2 boards */ From d573e461680d1642de2fb35e575dc9ef26fde56b Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:38 +0200 Subject: [PATCH 34/64] stm32mp1: board: enable v1v2_hdmi and v3v3_hdmi regulator on dk2 boot As for Audio codec IC, HDMI IC is not "IO safe". HDMI regulators (v3v3 and v1v2) must be enabled to allow I2C1 bus usage. HDMI IC must be under reset during power up and keep HDMI and AUDIO devices in reset while they are not used in U-Boot to keep them in low power mode (each device can be kept in reset independently keeping their power supplies ON until kernel). Signed-off-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi | 6 ++ board/st/stm32mp1/Kconfig | 4 ++ board/st/stm32mp1/stm32mp1.c | 70 ++++++++++++++++++++++++ 3 files changed, 80 insertions(+) diff --git a/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi b/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi index 06ef3a4095..18ac1e3cb2 100644 --- a/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-dk2-u-boot.dtsi @@ -4,3 +4,9 @@ */ #include "stm32mp157a-dk1-u-boot.dtsi" + +&i2c1 { + hdmi-transmitter@39 { + reset-gpios = <&gpioa 10 GPIO_ACTIVE_LOW>; + }; +}; diff --git a/board/st/stm32mp1/Kconfig b/board/st/stm32mp1/Kconfig index 87216c0963..4fa2360b4f 100644 --- a/board/st/stm32mp1/Kconfig +++ b/board/st/stm32mp1/Kconfig @@ -22,4 +22,8 @@ config CMD_STBOARD This compile the stboard command to read and write the board in the OTP. +config TARGET_STM32MP157C_DK2 + bool "support of STMicroelectronics STM32MP157C-DK2 Discovery Board" + default y + endif diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index fdc4af3b64..e075f004b7 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -505,6 +505,73 @@ static void sysconf_init(void) #endif } +#ifdef CONFIG_DM_REGULATOR +/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */ +static int dk2_i2c1_fix(void) +{ + ofnode node; + struct gpio_desc hdmi, audio; + int ret = 0; + + node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39"); + if (!ofnode_valid(node)) { + pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__); + return -ENOENT; + } + + if (gpio_request_by_name_nodev(node, "reset-gpios", 0, + &hdmi, GPIOD_IS_OUT)) { + pr_debug("%s: could not find reset-gpios\n", + __func__); + return -ENOENT; + } + + node = ofnode_path("/soc/i2c@40012000/cs42l51@4a"); + if (!ofnode_valid(node)) { + pr_debug("%s: no cs42l51@4a ?\n", __func__); + return -ENOENT; + } + + if (gpio_request_by_name_nodev(node, "reset-gpios", 0, + &audio, GPIOD_IS_OUT)) { + pr_debug("%s: could not find reset-gpios\n", + __func__); + return -ENOENT; + } + + /* before power up, insure that HDMI and AUDIO IC is under reset */ + ret = dm_gpio_set_value(&hdmi, 1); + if (ret) { + pr_err("%s: can't set_value for hdmi_nrst gpio", __func__); + goto error; + } + ret = dm_gpio_set_value(&audio, 1); + if (ret) { + pr_err("%s: can't set_value for audio_nrst gpio", __func__); + goto error; + } + + /* power-up audio IC */ + regulator_autoset_by_name("v1v8_audio", NULL); + + /* power-up HDMI IC */ + regulator_autoset_by_name("v1v2_hdmi", NULL); + regulator_autoset_by_name("v3v3_hdmi", NULL); + +error: + return ret; +} + +static bool board_is_dk2(void) +{ + if (CONFIG_IS_ENABLED(TARGET_STM32MP157C_DK2) && + of_machine_is_compatible("st,stm32mp157c-dk2")) + return true; + + return false; +} +#endif + /* board dependent setup after realloc */ int board_init(void) { @@ -523,6 +590,9 @@ int board_init(void) board_key_check(); #ifdef CONFIG_DM_REGULATOR + if (board_is_dk2()) + dk2_i2c1_fix(); + regulators_enable_boot_on(_DEBUG); #endif From dd2810851eb1d7a31b13961ef55b50cedf4b340b Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:39 +0200 Subject: [PATCH 35/64] stm32mp1: board: support of error led on ed1/ev1 board Create a function led_error_blink and add node in device tree. Signed-off-by: Patrick Delaunay --- arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 21 +++-------- board/st/stm32mp1/stm32mp1.c | 48 ++++++++++++++++-------- 2 files changed, 39 insertions(+), 30 deletions(-) diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi index 21c89c1ea2..4953a0db55 100644 --- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi @@ -15,31 +15,22 @@ }; config { + u-boot,boot-led = "heartbeat"; + u-boot,error-led = "error"; st,fastboot-gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; st,stm32prog-gpios = <&gpioa 14 GPIO_ACTIVE_LOW>; }; led { - compatible = "gpio-leds"; - red { - label = "stm32mp:red:status"; + label = "error"; gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; default-state = "off"; + status = "okay"; }; - green { - label = "stm32mp:green:user"; - gpios = <&gpioa 14 GPIO_ACTIVE_LOW>; - default-state = "on"; - }; - orange { - label = "stm32mp:orange:status"; - gpios = <&gpioh 7 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; + blue { - label = "stm32mp:blue:user"; - gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>; + default-state = "on"; }; }; }; diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index e075f004b7..6e72e68e09 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -232,6 +233,7 @@ int g_dnl_board_usb_cable_connected(void) } #endif /* CONFIG_USB_GADGET */ +#ifdef CONFIG_LED static int get_led(struct udevice **dev, char *led_string) { char *led_name; @@ -264,12 +266,41 @@ static int setup_led(enum led_state_t cmd) ret = led_set_state(dev, cmd); return ret; } +#endif + +static void __maybe_unused led_error_blink(u32 nb_blink) +{ +#ifdef CONFIG_LED + int ret; + struct udevice *led; + u32 i; +#endif + + if (!nb_blink) + return; + +#ifdef CONFIG_LED + ret = get_led(&led, "u-boot,error-led"); + if (!ret) { + /* make u-boot,error-led blinking */ + /* if U32_MAX and 125ms interval, for 17.02 years */ + for (i = 0; i < 2 * nb_blink; i++) { + led_set_state(led, LEDST_TOGGLE); + mdelay(125); + WATCHDOG_RESET(); + } + } +#endif + + /* infinite: the boot process must be stopped */ + if (nb_blink == U32_MAX) + hang(); +} static int board_check_usb_power(void) { struct ofnode_phandle_args adc_args; struct udevice *adc; - struct udevice *led; ofnode node; unsigned int raw; int max_uV = 0; @@ -395,20 +426,7 @@ static int board_check_usb_power(void) pr_err("****************************************************\n\n"); } - ret = get_led(&led, "u-boot,error-led"); - if (ret) { - /* in unattached case, the boot process must be stopped */ - if (nb_blink == U32_MAX) - hang(); - return ret; - } - - /* make u-boot,error-led blinking */ - for (i = 0; i < nb_blink * 2; i++) { - led_set_state(led, LEDST_TOGGLE); - mdelay(125); - } - led_set_state(led, LEDST_ON); + led_error_blink(nb_blink); return 0; } From 4616ff425cac4b374ef16711a145a4d8db6e3173 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:40 +0200 Subject: [PATCH 36/64] stm32mp1: board: protect the led function calls Avoid compilation issue when CONFIG_LED is not activated Signed-off-by: Patrick Delaunay --- board/st/stm32mp1/stm32mp1.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 6e72e68e09..b3bff5f45e 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -616,7 +616,7 @@ int board_init(void) sysconf_init(); - if (IS_ENABLED(CONFIG_LED)) + if (CONFIG_IS_ENABLED(CONFIG_LED)) led_default_state(); return 0; @@ -665,7 +665,9 @@ int board_late_init(void) void board_quiesce_devices(void) { +#ifdef CONFIG_LED setup_led(LEDST_OFF); +#endif } /* board interface eth init */ From 55f9cd2afe450b768a90788134cb58910943e6c4 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:41 +0200 Subject: [PATCH 37/64] stm32mp1: board: check the boot-source to disable bootdelay Allows to avoid to wait 2 second in U-Boot before to start STM32CubeProgrammer command. Signed-off-by: Patrick Delaunay --- board/st/stm32mp1/stm32mp1.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index b3bff5f45e..1be1160e0a 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -624,6 +624,7 @@ int board_init(void) int board_late_init(void) { + char *boot_device; #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG const void *fdt_compat; int fdt_compat_len; @@ -660,6 +661,11 @@ int board_late_init(void) /* for DK1/DK2 boards */ board_check_usb_power(); + /* Check the boot-source to disable bootdelay */ + boot_device = env_get("boot_device"); + if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb")) + env_set("bootdelay", "0"); + return 0; } From 5e959ab85e56843aff39880430ebf25f4676a44e Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:42 +0200 Subject: [PATCH 38/64] stm32mp1: board: Update the way vdd-supply is retrieved from DT Due to kernel DT alignment, pwr-supply is renamed to vdd-supply and is a subnode of pwr-regulators. Signed-off-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- arch/arm/dts/stm32mp157a-avenger96.dts | 5 ++++- arch/arm/dts/stm32mp157a-dk1.dts | 5 ++++- arch/arm/dts/stm32mp157c-ed1.dts | 5 ++++- board/st/stm32mp1/stm32mp1.c | 8 +++++--- 4 files changed, 17 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/stm32mp157a-avenger96.dts b/arch/arm/dts/stm32mp157a-avenger96.dts index ba86cf5478..5b15a4a915 100644 --- a/arch/arm/dts/stm32mp157a-avenger96.dts +++ b/arch/arm/dts/stm32mp157a-avenger96.dts @@ -283,7 +283,10 @@ }; &pwr { - pwr-supply = <&vdd>; + pwr-regulators { + vdd-supply = <&vdd>; + vdd_3v3_usbfs-supply = <&vdd_usb>; + }; }; &rng1 { diff --git a/arch/arm/dts/stm32mp157a-dk1.dts b/arch/arm/dts/stm32mp157a-dk1.dts index 1d5c1a6d31..ba612a5d91 100644 --- a/arch/arm/dts/stm32mp157a-dk1.dts +++ b/arch/arm/dts/stm32mp157a-dk1.dts @@ -308,7 +308,10 @@ }; &pwr { - pwr-supply = <&vdd>; + pwr-regulators { + vdd-supply = <&vdd>; + vdd_3v3_usbfs-supply = <&vdd_usb>; + }; }; &rng1 { diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index 94ac025da8..3e8b7b5161 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -218,7 +218,10 @@ }; &pwr { - pwr-supply = <&vdd>; + pwr-regulators { + vdd-supply = <&vdd>; + vdd_3v3_usbfs-supply = <&vdd_usb>; + }; }; &rng1 { diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 1be1160e0a..1f6ee3f742 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -472,7 +472,9 @@ static void sysconf_init(void) * => U-Boot set the register only if VDD < 2.7V (in DT) * but this value need to be consistent with board design */ - ret = syscon_get_by_driver_data(STM32MP_SYSCON_PWR, &pwr_dev); + ret = uclass_get_device_by_driver(UCLASS_PMIC, + DM_GET_DRIVER(stm32mp_pwr_pmic), + &pwr_dev); if (!ret) { ret = uclass_get_device_by_driver(UCLASS_MISC, DM_GET_DRIVER(stm32mp_bsec), @@ -486,8 +488,8 @@ static void sysconf_init(void) if (!ret) otp = otp & BIT(13); - /* get VDD = pwr-supply */ - ret = device_get_supply_regulator(pwr_dev, "pwr-supply", + /* get VDD = vdd-supply */ + ret = device_get_supply_regulator(pwr_dev, "vdd-supply", &pwr_reg); /* check if VDD is Low Voltage */ From 415424737128bd2d17ca3a91f847a106aa615d67 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:43 +0200 Subject: [PATCH 39/64] stm32mp1: board: remove board_check_usb_power when ADC is not activated Avoid compilation issue when CONFIG_ADC is not activated Signed-off-by: Patrick Delaunay --- board/st/stm32mp1/stm32mp1.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 1f6ee3f742..12974a6471 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -297,6 +297,7 @@ static void __maybe_unused led_error_blink(u32 nb_blink) hang(); } +#ifdef CONFIG_ADC static int board_check_usb_power(void) { struct ofnode_phandle_args adc_args; @@ -430,6 +431,7 @@ static int board_check_usb_power(void) return 0; } +#endif /* CONFIG_ADC */ static void sysconf_init(void) { @@ -660,8 +662,10 @@ int board_late_init(void) } #endif +#ifdef CONFIG_ADC /* for DK1/DK2 boards */ board_check_usb_power(); +#endif /* CONFIG_ADC */ /* Check the boot-source to disable bootdelay */ boot_device = env_get("boot_device"); From d1a597fcb7977dd837700b64ab1b6f729e648246 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:44 +0200 Subject: [PATCH 40/64] stm32mp1: board: cosmetic: cleanup file - reorder include files - remove one comment Signed-off-by: Patrick Delaunay --- board/st/stm32mp1/stm32mp1.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 12974a6471..654c48940b 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -5,8 +5,8 @@ #include #include #include -#include #include +#include #include #include #include @@ -683,7 +683,6 @@ void board_quiesce_devices(void) } /* board interface eth init */ -/* this is a weak define that we are overriding */ int board_interface_eth_init(phy_interface_t interface_type, bool eth_clk_sel_reg, bool eth_ref_clk_sel_reg) { From 48ac723a6fe4c31353371ec97b666b57eff65b51 Mon Sep 17 00:00:00 2001 From: Christophe Kerello Date: Tue, 30 Jul 2019 19:16:45 +0200 Subject: [PATCH 41/64] mmc: stm32_sdmmc2: reload watchdog This patch solves a watchdog reset issue during mmc erase command. Signed-off-by: Christophe Kerello Signed-off-by: Patrick Delaunay --- drivers/mmc/stm32_sdmmc2.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c index 0ade1b160e..32434a4762 100644 --- a/drivers/mmc/stm32_sdmmc2.c +++ b/drivers/mmc/stm32_sdmmc2.c @@ -14,6 +14,7 @@ #include #include #include +#include struct stm32_sdmmc2_plat { struct mmc_config cfg; @@ -432,6 +433,8 @@ static int stm32_sdmmc2_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, u32 cmdat = data ? SDMMC_CMD_CMDTRANS : 0; int ret, retry = 3; + WATCHDOG_RESET(); + retry_cmd: ctx.data_length = 0; ctx.dpsm_abort = false; From 132518f36b046f7b9523872ff04262713389a780 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:46 +0200 Subject: [PATCH 42/64] serial: stm32: add Framing error support Add management of Bit 1 of USART_ISR = FE: Framing error This bit is set by hardware when a de-synchronization, excessive noise or a break character is detected. It is cleared by software, writing 1 to the FECF bit in the USART_ICR register (for stm32 after f4). Signed-off-by: Patrick Delaunay --- drivers/serial/serial_stm32.c | 5 +++-- drivers/serial/serial_stm32.h | 2 ++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index 3ab536a52a..00a8e7249b 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -106,10 +106,11 @@ static int stm32_serial_getc(struct udevice *dev) if ((isr & USART_ISR_RXNE) == 0) return -EAGAIN; - if (isr & (USART_ISR_PE | USART_ISR_ORE)) { + if (isr & (USART_ISR_PE | USART_ISR_ORE | USART_ISR_FE)) { if (!stm32f4) setbits_le32(base + ICR_OFFSET, - USART_ICR_PCECF | USART_ICR_ORECF); + USART_ICR_PCECF | USART_ICR_ORECF | + USART_ICR_FECF); else readl(base + RDR_OFFSET(stm32f4)); return -EIO; diff --git a/drivers/serial/serial_stm32.h b/drivers/serial/serial_stm32.h index 5549f8c536..7b0c53145e 100644 --- a/drivers/serial/serial_stm32.h +++ b/drivers/serial/serial_stm32.h @@ -67,6 +67,7 @@ struct stm32x7_serial_platdata { #define USART_ISR_TXE BIT(7) #define USART_ISR_RXNE BIT(5) #define USART_ISR_ORE BIT(3) +#define USART_ISR_FE BIT(1) #define USART_ISR_PE BIT(0) #define USART_BRR_F_MASK GENMASK(7, 0) @@ -74,6 +75,7 @@ struct stm32x7_serial_platdata { #define USART_BRR_M_MASK GENMASK(15, 4) #define USART_ICR_ORECF BIT(3) +#define USART_ICR_FECF BIT(1) #define USART_ICR_PCECF BIT(0) #endif From 64dbd402187a9c7c084eeef04ed1aedac44492d1 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:47 +0200 Subject: [PATCH 43/64] serial: stm32: remove unused include The "serial_stm32.h" is only used by drivers/serial/serial_stm32.c and it is the file ./drivers/serial/serial_stm32.h Signed-off-by: Patrick Delaunay --- include/dm/platform_data/serial_stm32.h | 15 --------------- 1 file changed, 15 deletions(-) delete mode 100644 include/dm/platform_data/serial_stm32.h diff --git a/include/dm/platform_data/serial_stm32.h b/include/dm/platform_data/serial_stm32.h deleted file mode 100644 index 85153df527..0000000000 --- a/include/dm/platform_data/serial_stm32.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2015 - * Kamil Lulko, - */ - -#ifndef __SERIAL_STM32_H -#define __SERIAL_STM32_H - -/* Information about a serial port */ -struct stm32_serial_platdata { - struct stm32_usart *base; /* address of registers in physical memory */ -}; - -#endif /* __SERIAL_STM32_H */ From 375c28ac764c5595cd158c13f6dc158033984df9 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:48 +0200 Subject: [PATCH 44/64] stm32mp1: ram: cosmetic: remove unused prototype Signed-off-by: Patrick Delaunay --- drivers/ram/stm32mp1/stm32mp1_ddr.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.h b/drivers/ram/stm32mp1/stm32mp1_ddr.h index a8eed89e3c..52b748f3ca 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ddr.h +++ b/drivers/ram/stm32mp1/stm32mp1_ddr.h @@ -197,10 +197,6 @@ void stm32mp1_edit_param(const struct stm32mp1_ddr_config *config, char *name, char *string); -void stm32mp1_dump_info( - const struct ddr_info *priv, - const struct stm32mp1_ddr_config *config); - bool stm32mp1_ddr_interactive( void *priv, enum stm32mp1_ddr_interact_step step, From 4b0496fe79a749b151126f38ceaccef4911aa504 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:49 +0200 Subject: [PATCH 45/64] stm32mp1: ram: fix address issue in 2 tests If user choose to test memory size is 1GByte (0x40000000), memory address would overflow in test "Random" and test "FrequencySelectivePattern". Thus the system would hangs up when running DDR test. Signed-off-by: Patrick Delaunay Signed-off-by: Bossen WU --- drivers/ram/stm32mp1/stm32mp1_tests.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/ram/stm32mp1/stm32mp1_tests.c b/drivers/ram/stm32mp1/stm32mp1_tests.c index b6fb2a9c58..691c63c3ae 100644 --- a/drivers/ram/stm32mp1/stm32mp1_tests.c +++ b/drivers/ram/stm32mp1/stm32mp1_tests.c @@ -578,27 +578,29 @@ static enum test_result test_random(struct stm32mp1_ddrctl *ctl, u32 error = 0; unsigned int seed; - if (get_bufsize(string, argc, argv, 0, &bufsize, 4 * 1024)) + if (get_bufsize(string, argc, argv, 0, &bufsize, 8 * 1024)) return TEST_ERROR; if (get_nb_loop(string, argc, argv, 1, &nb_loop, 1)) return TEST_ERROR; if (get_addr(string, argc, argv, 2, &addr)) return TEST_ERROR; - printf("running %d loops at 0x%x\n", nb_loop, addr); + bufsize /= 2; + printf("running %d loops copy from 0x%x to 0x%x (buffer size=0x%x)\n", + nb_loop, addr, addr + bufsize, bufsize); while (!error) { seed = rand(); - for (offset = addr; offset < addr + bufsize; offset += 4) - writel(rand(), offset); + for (offset = 0; offset < bufsize; offset += 4) + writel(rand(), addr + offset); memcpy((void *)addr + bufsize, (void *)addr, bufsize); srand(seed); - for (offset = addr; offset < addr + 2 * bufsize; offset += 4) { - if (offset == (addr + bufsize)) + for (offset = 0; offset < 2 * bufsize; offset += 4) { + if (offset == bufsize) srand(seed); value = rand(); - error = check_addr(offset, value); + error = check_addr(addr + offset, value); if (error) break; if (progress(offset)) @@ -607,6 +609,7 @@ static enum test_result test_random(struct stm32mp1_ddrctl *ctl, if (test_loop_end(&loop, nb_loop, 100)) break; } + putc('\n'); if (error) { sprintf(string, @@ -791,9 +794,9 @@ static enum test_result test_loop(const u32 *pattern, u32 *address, int i; int j; enum test_result res = TEST_PASSED; - u32 *offset, testsize, remaining; + u32 offset, testsize, remaining; - offset = address; + offset = (u32)address; remaining = bufsize; while (remaining) { testsize = bufsize > 0x1000000 ? 0x1000000 : bufsize; @@ -809,7 +812,7 @@ static enum test_result test_loop(const u32 *pattern, u32 *address, __asm__("stmia r1!, {R3-R10}"); __asm__("stmia r1!, {R3-R10}"); __asm__("stmia r1!, {R3-R10}"); - __asm__("subs r2, r2, #8"); + __asm__("subs r2, r2, #128"); __asm__("bge loop2"); __asm__("pop {R0-R10}"); @@ -1388,7 +1391,7 @@ const struct test_desc test[] = { "Verifies r/w and memcopy(burst for pseudo random value.", 3 }, - {test_freq_pattern, "FrequencySelectivePattern ", "[size]", + {test_freq_pattern, "FrequencySelectivePattern", "[size]", "write & test patterns: Mostly Zero, Mostly One and F/n", 1 }, From 37f41ae900388965dd07486004b65e5f11f9a82e Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:50 +0200 Subject: [PATCH 46/64] stm32mp1: ram: update loop management in infinite test Reduce verbosity of the infinite tests to avoid CubeMX issue. test and display loop by 1024*1024 accesses: read or write. Signed-off-by: Patrick Delaunay --- drivers/ram/stm32mp1/stm32mp1_tests.c | 38 ++++++++++++++++++--------- 1 file changed, 25 insertions(+), 13 deletions(-) diff --git a/drivers/ram/stm32mp1/stm32mp1_tests.c b/drivers/ram/stm32mp1/stm32mp1_tests.c index 691c63c3ae..7356802257 100644 --- a/drivers/ram/stm32mp1/stm32mp1_tests.c +++ b/drivers/ram/stm32mp1/stm32mp1_tests.c @@ -1241,6 +1241,7 @@ static enum test_result test_read(struct stm32mp1_ddrctl *ctl, u32 *addr; u32 data; u32 loop = 0; + int i, size = 1024 * 1024; bool random = false; if (get_addr(string, argc, argv, 0, (u32 *)&addr)) @@ -1254,14 +1255,19 @@ static enum test_result test_read(struct stm32mp1_ddrctl *ctl, printf("running at 0x%08x\n", (u32)addr); while (1) { - if (random) - addr = (u32 *)(STM32_DDR_BASE + - (rand() & (STM32_DDR_SIZE - 1) & ~0x3)); - data = readl(addr); - if (test_loop_end(&loop, 0, 1000)) + for (i = 0; i < size; i++) { + if (random) + addr = (u32 *)(STM32_DDR_BASE + + (rand() & (STM32_DDR_SIZE - 1) & ~0x3)); + data = readl(addr); + } + if (test_loop_end(&loop, 0, 1)) break; } - sprintf(string, "0x%x: %x", (u32)addr, data); + if (random) + sprintf(string, "%d loops random", loop); + else + sprintf(string, "%d loops at 0x%x: %x", loop, (u32)addr, data); return TEST_PASSED; } @@ -1280,6 +1286,7 @@ static enum test_result test_write(struct stm32mp1_ddrctl *ctl, u32 *addr; u32 data = 0xA5A5AA55; u32 loop = 0; + int i, size = 1024 * 1024; bool random = false; if (get_addr(string, argc, argv, 0, (u32 *)&addr)) @@ -1293,16 +1300,21 @@ static enum test_result test_write(struct stm32mp1_ddrctl *ctl, printf("running at 0x%08x\n", (u32)addr); while (1) { - if (random) { - addr = (u32 *)(STM32_DDR_BASE + - (rand() & (STM32_DDR_SIZE - 1) & ~0x3)); - data = rand(); + for (i = 0; i < size; i++) { + if (random) { + addr = (u32 *)(STM32_DDR_BASE + + (rand() & (STM32_DDR_SIZE - 1) & ~0x3)); + data = rand(); + } + writel(data, addr); } - writel(data, addr); - if (test_loop_end(&loop, 0, 1000)) + if (test_loop_end(&loop, 0, 1)) break; } - sprintf(string, "0x%x: %x", (u32)addr, data); + if (random) + sprintf(string, "%d loops random", loop); + else + sprintf(string, "%d loops at 0x%x: %x", loop, (u32)addr, data); return TEST_PASSED; } From 25331ae1c1d9cd200ad5117efa285c7a8c32f3ee Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:51 +0200 Subject: [PATCH 47/64] stm32mp1: ram: reload watchdog during ddr test Avoid watchdog during infinite DDR test. Signed-off-by: Patrick Delaunay --- drivers/ram/stm32mp1/stm32mp1_tests.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/ram/stm32mp1/stm32mp1_tests.c b/drivers/ram/stm32mp1/stm32mp1_tests.c index 7356802257..f947b5d373 100644 --- a/drivers/ram/stm32mp1/stm32mp1_tests.c +++ b/drivers/ram/stm32mp1/stm32mp1_tests.c @@ -4,6 +4,7 @@ */ #include #include +#include #include #include #include "stm32mp1_tests.h" @@ -154,6 +155,8 @@ static int test_loop_end(u32 *loop, u32 nb_loop, u32 progress) return 1; } printf("loop #%d\n", *loop); + WATCHDOG_RESET(); + return 0; } From 757bca8d196fee46d84ee07e0ab220d4992d9dd9 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:52 +0200 Subject: [PATCH 48/64] stm32mp1: ram: add pattern parameter in infinite write test Add pattern for infinite test_read and test_write, that allow to change the pattern to test without recompilation; default pattern is 0xA5A5AA55. Signed-off-by: Patrick Delaunay --- drivers/ram/stm32mp1/stm32mp1_tests.c | 39 ++++++++++++++++----------- 1 file changed, 24 insertions(+), 15 deletions(-) diff --git a/drivers/ram/stm32mp1/stm32mp1_tests.c b/drivers/ram/stm32mp1/stm32mp1_tests.c index f947b5d373..581ee4897f 100644 --- a/drivers/ram/stm32mp1/stm32mp1_tests.c +++ b/drivers/ram/stm32mp1/stm32mp1_tests.c @@ -1250,12 +1250,17 @@ static enum test_result test_read(struct stm32mp1_ddrctl *ctl, if (get_addr(string, argc, argv, 0, (u32 *)&addr)) return TEST_ERROR; - if ((u32)addr == ADDR_INVALID) { - printf("random "); - random = true; - } + if (get_pattern(string, argc, argv, 1, &data, 0xA5A5AA55)) + return TEST_ERROR; - printf("running at 0x%08x\n", (u32)addr); + if ((u32)addr == ADDR_INVALID) { + printf("running random\n"); + random = true; + } else { + printf("running at 0x%08x with pattern=0x%08x\n", + (u32)addr, data); + writel(data, addr); + } while (1) { for (i = 0; i < size; i++) { @@ -1287,7 +1292,7 @@ static enum test_result test_write(struct stm32mp1_ddrctl *ctl, char *string, int argc, char *argv[]) { u32 *addr; - u32 data = 0xA5A5AA55; + u32 data; u32 loop = 0; int i, size = 1024 * 1024; bool random = false; @@ -1295,12 +1300,16 @@ static enum test_result test_write(struct stm32mp1_ddrctl *ctl, if (get_addr(string, argc, argv, 0, (u32 *)&addr)) return TEST_ERROR; - if ((u32)addr == ADDR_INVALID) { - printf("random "); - random = true; - } + if (get_pattern(string, argc, argv, 1, &data, 0xA5A5AA55)) + return TEST_ERROR; - printf("running at 0x%08x\n", (u32)addr); + if ((u32)addr == ADDR_INVALID) { + printf("running random\n"); + random = true; + } else { + printf("running at 0x%08x with pattern 0x%08x\n", + (u32)addr, data); + } while (1) { for (i = 0; i < size; i++) { @@ -1435,10 +1444,10 @@ const struct test_desc test[] = { 3 }, /* need to the the 2 last one (infinite) : skipped for test all */ - {test_read, "infinite read", "[addr]", - "basic test : infinite read access", 1}, - {test_write, "infinite write", "[addr]", - "basic test : infinite write access", 1}, + {test_read, "infinite read", "[addr] [pattern]", + "basic test : infinite read access (random: addr=0xFFFFFFFF)", 2}, + {test_write, "infinite write", "[addr] [pattern]", + "basic test : infinite write access (random: addr=0xFFFFFFFF)", 2}, }; const int test_nb = ARRAY_SIZE(test); From 4d401e96cff387e1cb57f5b2102862e8f24a3c02 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:53 +0200 Subject: [PATCH 49/64] stm32mp1: Makefile cleanup Don't compile psci for SPL build. Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index ad5fd46ccd..eee39c27c3 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -12,7 +12,8 @@ obj-y += spl.o else obj-y += bsec.o obj-$(CONFIG_CMD_STM32KEY) += cmd_stm32key.o -endif obj-$(CONFIG_ARMV7_PSCI) += psci.o +endif + obj-$(CONFIG_$(SPL_)DM_REGULATOR) += pwr_regulator.o obj-$(CONFIG_OF_SYSTEM_SETUP) += fdt.o From 7879a7d09c5efe6c02227df4cd99394e4156561e Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:54 +0200 Subject: [PATCH 50/64] stm32mp1: clk: remove debug traces Remove many debug trace. Signed-off-by: Patrick Delaunay --- drivers/clk/clk_stm32mp1.c | 21 ++++----------------- 1 file changed, 4 insertions(+), 17 deletions(-) diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index 5806d48696..359c2b98aa 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -759,9 +759,6 @@ static ulong stm32mp1_clk_get_fixed(struct stm32mp1_clk_priv *priv, int idx) return 0; } - debug("%s: clk id %d = %x : %ld kHz\n", __func__, idx, - (u32)priv->osc[idx], priv->osc[idx] / 1000); - return priv->osc[idx]; } @@ -863,8 +860,6 @@ static ulong pll_get_fref_ck(struct stm32mp1_clk_priv *priv, src = selr & RCC_SELR_SRC_MASK; refclk = stm32mp1_clk_get_fixed(priv, pll[pll_id].refclk[src]); - debug("PLL%d : selr=%x refclk = %d kHz\n", - pll_id, selr, (u32)(refclk / 1000)); return refclk; } @@ -889,9 +884,6 @@ static ulong pll_get_fvco(struct stm32mp1_clk_priv *priv, divm = (cfgr1 & (RCC_PLLNCFGR1_DIVM_MASK)) >> RCC_PLLNCFGR1_DIVM_SHIFT; divn = cfgr1 & RCC_PLLNCFGR1_DIVN_MASK; - debug("PLL%d : cfgr1=%x fracr=%x DIVN=%d DIVM=%d\n", - pll_id, cfgr1, fracr, divn, divm); - refclk = pll_get_fref_ck(priv, pll_id); /* with FRACV : @@ -908,7 +900,6 @@ static ulong pll_get_fvco(struct stm32mp1_clk_priv *priv, } else { fvco = (ulong)(refclk * (divn + 1) / (divm + 1)); } - debug("PLL%d : %s = %ld\n", pll_id, __func__, fvco); return fvco; } @@ -921,17 +912,13 @@ static ulong stm32mp1_read_pll_freq(struct stm32mp1_clk_priv *priv, ulong dfout; u32 cfgr2; - debug("%s(%d, %d)\n", __func__, pll_id, div_id); if (div_id >= _DIV_NB) return 0; cfgr2 = readl(priv->base + pll[pll_id].pllxcfgr2); divy = (cfgr2 >> RCC_PLLNCFGR2_SHIFT(div_id)) & RCC_PLLNCFGR2_DIVX_MASK; - debug("PLL%d : cfgr2=%x DIVY=%d\n", pll_id, cfgr2, divy); - dfout = pll_get_fvco(priv, pll_id) / (divy + 1); - debug(" => dfout = %d kHz\n", (u32)(dfout / 1000)); return dfout; } @@ -1574,9 +1561,6 @@ static void stgen_config(struct stm32mp1_clk_priv *priv) /* need to update gd->arch.timer_rate_hz with new frequency */ timer_init(); - pr_debug("gd->arch.timer_rate_hz = %x\n", - (u32)gd->arch.timer_rate_hz); - pr_debug("Tick = %x\n", (u32)(get_ticks())); } } @@ -1882,7 +1866,6 @@ static int pll_set_output_rate(struct udevice *dev, if (div > 128) div = 128; - debug("fvco = %ld, clk_rate = %ld, div=%d\n", fvco, clk_rate, div); /* stop the requested output */ clrbits_le32(pllxcr, 0x1 << div_id << RCC_PLLNCR_DIVEN_SHIFT); /* change divider */ @@ -1915,6 +1898,9 @@ static ulong stm32mp1_clk_set_rate(struct clk *clk, unsigned long clk_rate) } p = stm32mp1_clk_get_parent(priv, clk->id); +#ifdef DEBUG + debug("%s: parent = %d:%s\n", __func__, p, stm32mp1_clk_parent_name[p]); +#endif if (p < 0) return -EINVAL; @@ -1932,6 +1918,7 @@ static ulong stm32mp1_clk_set_rate(struct clk *clk, unsigned long clk_rate) return result; } #endif + case _PLL4_Q: /* for LTDC_PX and DSI_PX case */ return pll_set_output_rate(clk->dev, _PLL4, _DIV_Q, clk_rate); From 4de076ed0958d98168820d5b2b5d96c16f928605 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:55 +0200 Subject: [PATCH 51/64] stm32mp1: clk: use gd to store frequency information Use existing gd structure to store frequency information which can be used in drivers or arch without new request. Signed-off-by: Patrick Delaunay --- drivers/clk/clk_stm32mp1.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index 359c2b98aa..e87307fa60 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -15,6 +15,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #ifndef CONFIG_STM32MP1_TRUSTED #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) /* activate clock tree initialization in the driver */ @@ -2042,22 +2044,22 @@ static int stm32mp1_clk_probe(struct udevice *dev) stm32mp1_clk_dump(priv); #endif + gd->cpu_clk = stm32mp1_clk_get(priv, _CK_MPU); + gd->bus_clk = stm32mp1_clk_get(priv, _ACLK); + /* DDRPHYC father */ + gd->mem_clk = stm32mp1_clk_get(priv, _PLL2_R); #if defined(CONFIG_DISPLAY_CPUINFO) if (gd->flags & GD_FLG_RELOC) { char buf[32]; printf("Clocks:\n"); - printf("- MPU : %s MHz\n", - strmhz(buf, stm32mp1_clk_get(priv, _CK_MPU))); + printf("- MPU : %s MHz\n", strmhz(buf, gd->cpu_clk)); printf("- MCU : %s MHz\n", strmhz(buf, stm32mp1_clk_get(priv, _CK_MCU))); - printf("- AXI : %s MHz\n", - strmhz(buf, stm32mp1_clk_get(priv, _ACLK))); + printf("- AXI : %s MHz\n", strmhz(buf, gd->bus_clk)); printf("- PER : %s MHz\n", strmhz(buf, stm32mp1_clk_get(priv, _CK_PER))); - /* DDRPHYC father */ - printf("- DDR : %s MHz\n", - strmhz(buf, stm32mp1_clk_get(priv, _PLL2_R))); + printf("- DDR : %s MHz\n", strmhz(buf, gd->mem_clk)); } #endif /* CONFIG_DISPLAY_CPUINFO */ #endif From 8c018234ea712aa9afd7c23905f125f121577c77 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Tue, 30 Jul 2019 19:16:56 +0200 Subject: [PATCH 52/64] MAINTAINERS: update ARM STM STM32MP and STM32MP1 BOARD Add the missing driver and files for mach-stm32mp / stm32mp1 product. Signed-off-by: Patrick Delaunay --- MAINTAINERS | 19 +++++++++++++++++-- board/st/stm32mp1/MAINTAINERS | 5 +++-- 2 files changed, 20 insertions(+), 4 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 74a1423f50..08222fd569 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -321,14 +321,19 @@ ARM STM STM32MP M: Patrick Delaunay M: Patrice Chotard L: uboot-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers) -T: git https://gitlab.denx.de/u-boot/custodians/u-boot-stm +T: git https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git S: Maintained F: arch/arm/mach-stm32mp/ +F: drivers/adc/stm32-adc* F: drivers/clk/clk_stm32mp1.c +F: drivers/gpio/stm32_gpio.c +F: drivers/hwspinlock/stm32_hwspinlock.c F: drivers/i2c/stm32f7_i2c.c F: drivers/mailbox/stm32-ipcc.c F: drivers/misc/stm32mp_fuse.c +F: drivers/misc/stm32_rcc.c F: drivers/mmc/stm32_sdmmc2.c +F: drivers/mtd/nand/raw/stm32_fmc2_nand.c F: drivers/phy/phy-stm32-usbphyc.c F: drivers/pinctrl/pinctrl_stm32.c F: drivers/power/pmic/stpmic1.c @@ -336,11 +341,21 @@ F: drivers/power/regulator/stm32-vrefbuf.c F: drivers/power/regulator/stpmic1.c F: drivers/ram/stm32mp1/ F: drivers/remoteproc/stm32_copro.c -F: drivers/misc/stm32_rcc.c F: drivers/reset/stm32-reset.c +F: drivers/rtc/stm32_rtc.c +F: drivers/serial/serial_stm32.* F: drivers/spi/stm32_qspi.c F: drivers/spi/stm32_spi.c +F: drivers/video/stm32/stm32_ltdc.c F: drivers/watchdog/stm32mp_wdt.c +F: include/dt-bindings/clock/stm32fx-clock.h +F: include/dt-bindings/clock/stm32mp1-clks.h +F: include/dt-bindings/clock/stm32mp1-clksrc.h +F: include/dt-bindings/pinctrl/stm32-pinfunc.h +F: include/dt-bindings/reset/stm32mp1-resets.h +F: include/stm32_rcc.h +F: tools/stm32image.c + ARM STM STV0991 M: Vikas Manocha diff --git a/board/st/stm32mp1/MAINTAINERS b/board/st/stm32mp1/MAINTAINERS index 3bf4c21b60..2930947716 100644 --- a/board/st/stm32mp1/MAINTAINERS +++ b/board/st/stm32mp1/MAINTAINERS @@ -1,9 +1,10 @@ STM32MP1 BOARD M: Patrick Delaunay L: uboot-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers) +T: git https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git S: Maintained -F: arch/arm/dts/stm32mp157* -F: board/st/stm32mp1 +F: arch/arm/dts/stm32mp15* +F: board/st/stm32mp1/ F: configs/stm32mp15_basic_defconfig F: configs/stm32mp15_optee_defconfig F: configs/stm32mp15_trusted_defconfig From 0c8620d2ffe1440165156c7a0d95424c7eabe60b Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 2 Aug 2019 13:08:02 +0200 Subject: [PATCH 53/64] bsec: update after MISC u-class update Since the commit 8729b1ae2cbd ("misc: Update read() and write() methods to return bytes xfered"); The misc bsec driver need to be adapted to reflect the number of transferred bytes. Signed-off-by: Patrick Delaunay --- arch/arm/mach-stm32mp/bsec.c | 34 ++++++++++++++++++---------------- drivers/misc/stm32mp_fuse.c | 30 +++++++++++++++++------------- 2 files changed, 35 insertions(+), 29 deletions(-) diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index 8018366885..a77c706a1a 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -364,15 +364,13 @@ static int stm32mp_bsec_read(struct udevice *dev, int offset, offs -= STM32_BSEC_OTP_OFFSET; shadow = false; } + + if (offs < 0 || (offs % 4) || (size % 4)) + return -EINVAL; + otp = offs / sizeof(u32); - if (otp < 0 || (otp + nb_otp - 1) > BSEC_OTP_MAX_VALUE) { - dev_err(dev, "wrong value for otp, max value : %i\n", - BSEC_OTP_MAX_VALUE); - return -EINVAL; - } - - for (i = otp; i < (otp + nb_otp); i++) { + for (i = otp; i < (otp + nb_otp) && i <= BSEC_OTP_MAX_VALUE; i++) { u32 *addr = &((u32 *)buf)[i - otp]; if (shadow) @@ -383,7 +381,10 @@ static int stm32mp_bsec_read(struct udevice *dev, int offset, if (ret) break; } - return ret; + if (ret) + return ret; + else + return (i - otp) * 4; } static int stm32mp_bsec_write(struct udevice *dev, int offset, @@ -400,15 +401,13 @@ static int stm32mp_bsec_write(struct udevice *dev, int offset, offs -= STM32_BSEC_OTP_OFFSET; shadow = false; } + + if (offs < 0 || (offs % 4) || (size % 4)) + return -EINVAL; + otp = offs / sizeof(u32); - if (otp < 0 || (otp + nb_otp - 1) > BSEC_OTP_MAX_VALUE) { - dev_err(dev, "wrong value for otp, max value : %d\n", - BSEC_OTP_MAX_VALUE); - return -EINVAL; - } - - for (i = otp; i < otp + nb_otp; i++) { + for (i = otp; i < otp + nb_otp && i <= BSEC_OTP_MAX_VALUE; i++) { u32 *val = &((u32 *)buf)[i - otp]; if (shadow) @@ -418,7 +417,10 @@ static int stm32mp_bsec_write(struct udevice *dev, int offset, if (ret) break; } - return ret; + if (ret) + return ret; + else + return (i - otp) * 4; } static const struct misc_ops stm32mp_bsec_ops = { diff --git a/drivers/misc/stm32mp_fuse.c b/drivers/misc/stm32mp_fuse.c index 801d946b77..a1a27d148a 100644 --- a/drivers/misc/stm32mp_fuse.c +++ b/drivers/misc/stm32mp_fuse.c @@ -20,7 +20,7 @@ */ int fuse_read(u32 bank, u32 word, u32 *val) { - int ret = 0; + int ret; struct udevice *dev; switch (bank) { @@ -32,9 +32,10 @@ int fuse_read(u32 bank, u32 word, u32 *val) return ret; ret = misc_read(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET, val, 4); - if (ret < 0) - return ret; - ret = 0; + if (ret != 4) + ret = -EINVAL; + else + ret = 0; break; #ifdef CONFIG_PMIC_STPMIC1 @@ -67,9 +68,10 @@ int fuse_prog(u32 bank, u32 word, u32 val) return ret; ret = misc_write(dev, word * 4 + STM32_BSEC_OTP_OFFSET, &val, 4); - if (ret < 0) - return ret; - ret = 0; + if (ret != 4) + ret = -EINVAL; + else + ret = 0; break; #ifdef CONFIG_PMIC_STPMIC1 @@ -100,9 +102,10 @@ int fuse_sense(u32 bank, u32 word, u32 *val) if (ret) return ret; ret = misc_read(dev, word * 4 + STM32_BSEC_OTP_OFFSET, val, 4); - if (ret < 0) - return ret; - ret = 0; + if (ret != 4) + ret = -EINVAL; + else + ret = 0; break; #ifdef CONFIG_PMIC_STPMIC1 @@ -135,9 +138,10 @@ int fuse_override(u32 bank, u32 word, u32 val) return ret; ret = misc_write(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET, &val, 4); - if (ret < 0) - return ret; - ret = 0; + if (ret != 4) + ret = -EINVAL; + else + ret = 0; break; #ifdef CONFIG_PMIC_STPMIC1 From 234a60244c62ffce5c5c1d5b80d200f4568c5cfd Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 2 Aug 2019 13:08:03 +0200 Subject: [PATCH 54/64] pmu: stpmic1: change specific NVM api to MISC Use MISC u-class to export the NVM register (starting at 0xF8 offset) and avoid specific API. - SHADOW have offset < 0. - NVM have register > 0 Signed-off-by: Patrick Delaunay --- drivers/misc/stm32mp_fuse.c | 44 +++++++++++++-- drivers/power/pmic/stpmic1.c | 106 ++++++++++++++++++++--------------- include/power/stpmic1.h | 7 --- 3 files changed, 100 insertions(+), 57 deletions(-) diff --git a/drivers/misc/stm32mp_fuse.c b/drivers/misc/stm32mp_fuse.c index a1a27d148a..0eed345973 100644 --- a/drivers/misc/stm32mp_fuse.c +++ b/drivers/misc/stm32mp_fuse.c @@ -40,8 +40,17 @@ int fuse_read(u32 bank, u32 word, u32 *val) #ifdef CONFIG_PMIC_STPMIC1 case STM32MP_NVM_BANK: + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stpmic1_nvm), + &dev); + if (ret) + return ret; *val = 0; - ret = stpmic1_shadow_read_byte(word, (u8 *)val); + ret = misc_read(dev, -word, val, 1); + if (ret != 1) + ret = -EINVAL; + else + ret = 0; break; #endif /* CONFIG_PMIC_STPMIC1 */ @@ -76,7 +85,16 @@ int fuse_prog(u32 bank, u32 word, u32 val) #ifdef CONFIG_PMIC_STPMIC1 case STM32MP_NVM_BANK: - ret = stpmic1_nvm_write_byte(word, (u8 *)&val); + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stpmic1_nvm), + &dev); + if (ret) + return ret; + ret = misc_write(dev, word, &val, 1); + if (ret != 1) + ret = -EINVAL; + else + ret = 0; break; #endif /* CONFIG_PMIC_STPMIC1 */ @@ -110,8 +128,17 @@ int fuse_sense(u32 bank, u32 word, u32 *val) #ifdef CONFIG_PMIC_STPMIC1 case STM32MP_NVM_BANK: + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stpmic1_nvm), + &dev); + if (ret) + return ret; *val = 0; - ret = stpmic1_nvm_read_byte(word, (u8 *)val); + ret = misc_read(dev, word, val, 1); + if (ret != 1) + ret = -EINVAL; + else + ret = 0; break; #endif /* CONFIG_PMIC_STPMIC1 */ @@ -146,7 +173,16 @@ int fuse_override(u32 bank, u32 word, u32 val) #ifdef CONFIG_PMIC_STPMIC1 case STM32MP_NVM_BANK: - ret = stpmic1_shadow_write_byte(word, (u8 *)&val); + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stpmic1_nvm), + &dev); + if (ret) + return ret; + ret = misc_write(dev, -word, &val, 1); + if (ret != 1) + ret = -EINVAL; + else + ret = 0; break; #endif /* CONFIG_PMIC_STPMIC1 */ diff --git a/drivers/power/pmic/stpmic1.c b/drivers/power/pmic/stpmic1.c index c3381489dd..509baed7ec 100644 --- a/drivers/power/pmic/stpmic1.c +++ b/drivers/power/pmic/stpmic1.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -69,6 +70,7 @@ static int stpmic1_read(struct udevice *dev, uint reg, uint8_t *buff, int len) static int stpmic1_bind(struct udevice *dev) { + int ret; #if CONFIG_IS_ENABLED(DM_REGULATOR) ofnode regulators_node; int children; @@ -86,6 +88,13 @@ static int stpmic1_bind(struct udevice *dev) dev_dbg(dev, "no child found\n"); #endif /* DM_REGULATOR */ + if (!IS_ENABLED(CONFIG_SPL_BUILD)) { + ret = device_bind_driver(dev, "stpmic1-nvm", + "stpmic1-nvm", NULL); + if (ret) + return ret; + } + if (CONFIG_IS_ENABLED(SYSRESET)) return device_bind_driver(dev, "stpmic1-sysreset", "stpmic1-sysreset", NULL); @@ -113,32 +122,38 @@ U_BOOT_DRIVER(pmic_stpmic1) = { }; #ifndef CONFIG_SPL_BUILD -static int stpmic1_nvm_rw(u8 addr, u8 *buf, int buf_len, enum pmic_nvm_op op) +static int stpmic1_nvm_rw(struct udevice *dev, u8 addr, u8 *buf, int buf_len, + enum pmic_nvm_op op) { - struct udevice *dev; unsigned long timeout; u8 cmd = STPMIC1_NVM_CMD_READ; - int ret; - - ret = uclass_get_device_by_driver(UCLASS_PMIC, - DM_GET_DRIVER(pmic_stpmic1), &dev); - if (ret) - /* No PMIC on power discrete board */ - return -EOPNOTSUPP; + int ret, len = buf_len; if (addr < STPMIC1_NVM_START_ADDRESS) return -EACCES; + if (addr + buf_len > STPMIC1_NVM_START_ADDRESS + STPMIC1_NVM_SIZE) + len = STPMIC1_NVM_START_ADDRESS + STPMIC1_NVM_SIZE - addr; - if (op == SHADOW_READ) - return pmic_read(dev, addr, buf, buf_len); + if (op == SHADOW_READ) { + ret = pmic_read(dev, addr, buf, len); + if (ret < 0) + return ret; + else + return len; + } - if (op == SHADOW_WRITE) - return pmic_write(dev, addr, buf, buf_len); + if (op == SHADOW_WRITE) { + ret = pmic_write(dev, addr, buf, len); + if (ret < 0) + return ret; + else + return len; + } if (op == NVM_WRITE) { cmd = STPMIC1_NVM_CMD_PROGRAM; - ret = pmic_write(dev, addr, buf, buf_len); + ret = pmic_write(dev, addr, buf, len); if (ret < 0) return ret; } @@ -168,51 +183,50 @@ static int stpmic1_nvm_rw(u8 addr, u8 *buf, int buf_len, enum pmic_nvm_op op) return -ETIMEDOUT; if (op == NVM_READ) { - ret = pmic_read(dev, addr, buf, buf_len); + ret = pmic_read(dev, addr, buf, len); if (ret < 0) return ret; } - return 0; + return len; } -int stpmic1_shadow_read_byte(u8 addr, u8 *buf) +static int stpmic1_nvm_read(struct udevice *dev, int offset, + void *buf, int size) { - return stpmic1_nvm_rw(addr, buf, 1, SHADOW_READ); + enum pmic_nvm_op op = NVM_READ; + + if (offset < 0) { + op = SHADOW_READ; + offset = -offset; + } + + return stpmic1_nvm_rw(dev->parent, offset, buf, size, op); } -int stpmic1_shadow_write_byte(u8 addr, u8 *buf) +static int stpmic1_nvm_write(struct udevice *dev, int offset, + const void *buf, int size) { - return stpmic1_nvm_rw(addr, buf, 1, SHADOW_WRITE); + enum pmic_nvm_op op = NVM_WRITE; + + if (offset < 0) { + op = SHADOW_WRITE; + offset = -offset; + } + + return stpmic1_nvm_rw(dev->parent, offset, (void *)buf, size, op); } -int stpmic1_nvm_read_byte(u8 addr, u8 *buf) -{ - return stpmic1_nvm_rw(addr, buf, 1, NVM_READ); -} +static const struct misc_ops stpmic1_nvm_ops = { + .read = stpmic1_nvm_read, + .write = stpmic1_nvm_write, +}; -int stpmic1_nvm_write_byte(u8 addr, u8 *buf) -{ - return stpmic1_nvm_rw(addr, buf, 1, NVM_WRITE); -} - -int stpmic1_nvm_read_all(u8 *buf, int buf_len) -{ - if (buf_len != STPMIC1_NVM_SIZE) - return -EINVAL; - - return stpmic1_nvm_rw(STPMIC1_NVM_START_ADDRESS, - buf, buf_len, NVM_READ); -} - -int stpmic1_nvm_write_all(u8 *buf, int buf_len) -{ - if (buf_len != STPMIC1_NVM_SIZE) - return -EINVAL; - - return stpmic1_nvm_rw(STPMIC1_NVM_START_ADDRESS, - buf, buf_len, NVM_WRITE); -} +U_BOOT_DRIVER(stpmic1_nvm) = { + .name = "stpmic1-nvm", + .id = UCLASS_MISC, + .ops = &stpmic1_nvm_ops, +}; #endif /* CONFIG_SPL_BUILD */ #ifdef CONFIG_SYSRESET diff --git a/include/power/stpmic1.h b/include/power/stpmic1.h index d90a1a9c93..dc8b5a7459 100644 --- a/include/power/stpmic1.h +++ b/include/power/stpmic1.h @@ -108,11 +108,4 @@ enum { STPMIC1_PWR_SW2, STPMIC1_MAX_PWR_SW, }; - -int stpmic1_shadow_read_byte(u8 addr, u8 *buf); -int stpmic1_shadow_write_byte(u8 addr, u8 *buf); -int stpmic1_nvm_read_byte(u8 addr, u8 *buf); -int stpmic1_nvm_write_byte(u8 addr, u8 *buf); -int stpmic1_nvm_read_all(u8 *buf, int buf_len); -int stpmic1_nvm_write_all(u8 *buf, int buf_len); #endif From ef32dcf1195efba19e896f993a6bc4882280f081 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 2 Aug 2019 13:08:04 +0200 Subject: [PATCH 55/64] stpmic1: simplify stpmic1_sysreset_request Retrieve parent device from dev->parent instead of calling uclass_get_device_by_driver() Signed-off-by: Patrick Delaunay --- drivers/power/pmic/stpmic1.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/power/pmic/stpmic1.c b/drivers/power/pmic/stpmic1.c index 509baed7ec..de31934f41 100644 --- a/drivers/power/pmic/stpmic1.c +++ b/drivers/power/pmic/stpmic1.c @@ -232,19 +232,12 @@ U_BOOT_DRIVER(stpmic1_nvm) = { #ifdef CONFIG_SYSRESET static int stpmic1_sysreset_request(struct udevice *dev, enum sysreset_t type) { - struct udevice *pmic_dev; + struct udevice *pmic_dev = dev->parent; int ret; if (type != SYSRESET_POWER && type != SYSRESET_POWER_OFF) return -EPROTONOSUPPORT; - ret = uclass_get_device_by_driver(UCLASS_PMIC, - DM_GET_DRIVER(pmic_stpmic1), - &pmic_dev); - - if (ret) - return -EOPNOTSUPP; - ret = pmic_reg_read(pmic_dev, STPMIC1_MAIN_CR); if (ret < 0) return ret; From 19efa395569963c0dcde9441ae877ce57c65f8f1 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 2 Aug 2019 13:08:05 +0200 Subject: [PATCH 56/64] stm32mp1: update test on misc_read result Update the stm32mp1 baord after the commit 8729b1ae2cbd ("misc: Update read() and write() methods to return bytes xfered") Signed-off-by: Patrick Delaunay --- board/st/stm32mp1/stm32mp1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 654c48940b..d994d386b5 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -103,7 +103,7 @@ int checkboard(void) if (!ret) ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD), &otp, sizeof(otp)); - if (!ret && otp) { + if (ret > 0 && otp) { printf("Board: MB%04x Var%d Rev.%c-%02d\n", otp >> 16, (otp >> 12) & 0xF, From ff6618e9b244ca98c744044123e47986839c5d9b Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 2 Aug 2019 13:08:06 +0200 Subject: [PATCH 57/64] stm32mp1: update sysconf_init on misc_read result Update management of misc_read in sysconf_init, which now return length of data after the commit 8729b1ae2cbd ("misc: Update read() and write() methods to return bytes xfered") Signed-off-by: Patrick Delaunay --- board/st/stm32mp1/stm32mp1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index d994d386b5..95e6078174 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -487,7 +487,7 @@ static void sysconf_init(void) } ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4); - if (!ret) + if (ret > 0) otp = otp & BIT(13); /* get VDD = vdd-supply */ From 781a91773880bfc8f4176bbd247febe4048da9c0 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 2 Aug 2019 13:08:07 +0200 Subject: [PATCH 58/64] stm32mp1: board update command stboard on misc_read result Update management of misc_read, which now return length of data after the commit 8729b1ae2cbd ("misc: Update read() and write() methods to return bytes xfered") Signed-off-by: Patrick Delaunay --- board/st/stm32mp1/cmd_stboard.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/st/stm32mp1/cmd_stboard.c b/board/st/stm32mp1/cmd_stboard.c index f781c364cf..04352ae8ed 100644 --- a/board/st/stm32mp1/cmd_stboard.c +++ b/board/st/stm32mp1/cmd_stboard.c @@ -60,7 +60,7 @@ static int do_stboard(cmd_tbl_t *cmdtp, int flag, int argc, ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD), &otp, sizeof(otp)); - if (ret) { + if (ret < 0) { puts("OTP read error"); return CMD_RET_FAILURE; } From 1323470b74c93554afe55ca638eaba933397d9dd Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 2 Aug 2019 13:08:08 +0200 Subject: [PATCH 59/64] misc: change RCC form MISC to NOP uclass The RCC driver have no operation so the new NOP uclass is more appropriate. It only used as parent for clock and reset driver. Signed-off-by: Patrick Delaunay --- drivers/misc/stm32_rcc.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c index 13d70696f6..e7efcdeafa 100644 --- a/drivers/misc/stm32_rcc.c +++ b/drivers/misc/stm32_rcc.c @@ -68,8 +68,6 @@ static int stm32_rcc_bind(struct udevice *dev) dev_ofnode(dev), &child); } -static const struct misc_ops stm32_rcc_ops = { -}; static const struct udevice_id stm32_rcc_ids[] = { {.compatible = "st,stm32f42xx-rcc", .data = (ulong)&stm32_rcc_clk_f42x }, @@ -82,8 +80,7 @@ static const struct udevice_id stm32_rcc_ids[] = { U_BOOT_DRIVER(stm32_rcc) = { .name = "stm32-rcc", - .id = UCLASS_MISC, + .id = UCLASS_NOP, .of_match = stm32_rcc_ids, .bind = stm32_rcc_bind, - .ops = &stm32_rcc_ops, }; From 5d2901a4b653a5ee47b1a789054414f4e7b8cb85 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 2 Aug 2019 15:07:18 +0200 Subject: [PATCH 60/64] stm32mp1: Add remoteproc support for m4 coprocessor Alignment with kernel patch proposal for binding: [PATCH v4 0/8] stm32 m4 remoteproc on STM32MP157c https://lkml.org/lkml/2019/5/14/159 Signed-off-by: Patrick Delaunay --- arch/arm/dts/stm32mp157a-dk1.dts | 6 ++++++ arch/arm/dts/stm32mp157c-ed1.dts | 6 ++++++ arch/arm/dts/stm32mp157c.dtsi | 20 ++++++++++++++++++++ configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_optee_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + drivers/remoteproc/stm32_copro.c | 2 +- 7 files changed, 36 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/stm32mp157a-dk1.dts b/arch/arm/dts/stm32mp157a-dk1.dts index ba612a5d91..c210acc0aa 100644 --- a/arch/arm/dts/stm32mp157a-dk1.dts +++ b/arch/arm/dts/stm32mp157a-dk1.dts @@ -307,6 +307,12 @@ }; }; +&m4_rproc { + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; + mbox-names = "vq0", "vq1", "shutdown"; + status = "okay"; +}; + &pwr { pwr-regulators { vdd-supply = <&vdd>; diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index 3e8b7b5161..1d9cc734f1 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -217,6 +217,12 @@ status = "okay"; }; +&m4_rproc { + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; + mbox-names = "vq0", "vq1", "shutdown"; + status = "okay"; +}; + &pwr { pwr-regulators { vdd-supply = <&vdd>; diff --git a/arch/arm/dts/stm32mp157c.dtsi b/arch/arm/dts/stm32mp157c.dtsi index bcd8c1a59c..a6045dd682 100644 --- a/arch/arm/dts/stm32mp157c.dtsi +++ b/arch/arm/dts/stm32mp157c.dtsi @@ -1543,4 +1543,24 @@ status = "disabled"; }; }; + + mlahb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + dma-ranges = <0x00000000 0x38000000 0x10000>, + <0x10000000 0x10000000 0x60000>, + <0x30000000 0x30000000 0x60000>; + + m4_rproc: m4@10000000 { + compatible = "st,stm32mp1-m4"; + reg = <0x10000000 0x40000>, + <0x30000000 0x40000>, + <0x38000000 0x10000>; + resets = <&rcc MCU_R>; + st,syscfg-holdboot = <&rcc 0x10C 0x1>; + st,syscfg-tz = <&rcc 0x000 0x1>; + status = "disabled"; + }; + }; }; diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index cf3988dafe..09785b5dc1 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y diff --git a/configs/stm32mp15_optee_defconfig b/configs/stm32mp15_optee_defconfig index e5b9be78d4..177cbc7d5f 100644 --- a/configs/stm32mp15_optee_defconfig +++ b/configs/stm32mp15_optee_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 2d9be045a6..71ad1157ec 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y diff --git a/drivers/remoteproc/stm32_copro.c b/drivers/remoteproc/stm32_copro.c index de3b9729f3..ad941f67e8 100644 --- a/drivers/remoteproc/stm32_copro.c +++ b/drivers/remoteproc/stm32_copro.c @@ -243,7 +243,7 @@ static const struct dm_rproc_ops stm32_copro_ops = { }; static const struct udevice_id stm32_copro_ids[] = { - {.compatible = "st,stm32mp1-rproc"}, + {.compatible = "st,stm32mp1-m4"}, {} }; From e7fabe75aec1380f7e2bd440a8477f0f15db528b Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 2 Aug 2019 15:07:19 +0200 Subject: [PATCH 61/64] image: add new "copro" image type Define new image type for coprocessor images. It is used in FIT to identify the files loaded with remoteproc command (elf or bin). Signed-off-by: Loic Pallardy Signed-off-by: Patrick Delaunay Reviewed-by: Simon Glass --- common/image.c | 1 + include/image.h | 1 + 2 files changed, 2 insertions(+) diff --git a/common/image.c b/common/image.c index 645584b5ba..179eef0bd2 100644 --- a/common/image.c +++ b/common/image.c @@ -176,6 +176,7 @@ static const table_entry_t uimage_type[] = { { IH_TYPE_PMMC, "pmmc", "TI Power Management Micro-Controller Firmware",}, { IH_TYPE_STM32IMAGE, "stm32image", "STMicroelectronics STM32 Image" }, { IH_TYPE_MTKIMAGE, "mtk_image", "MediaTek BootROM loadable Image" }, + { IH_TYPE_COPRO, "copro", "Coprocessor Image"}, { -1, "", "", }, }; diff --git a/include/image.h b/include/image.h index 404b7338e6..c1065c06f9 100644 --- a/include/image.h +++ b/include/image.h @@ -284,6 +284,7 @@ enum { IH_TYPE_MTKIMAGE, /* MediaTek BootROM loadable Image */ IH_TYPE_IMX8MIMAGE, /* Freescale IMX8MBoot Image */ IH_TYPE_IMX8IMAGE, /* Freescale IMX8Boot Image */ + IH_TYPE_COPRO, /* Coprocessor Image for remoteproc*/ IH_TYPE_COUNT, /* Number of image types */ }; From a68ae8dceb1e82ffdfdbfb1d2c23603124c8e70a Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 2 Aug 2019 15:07:20 +0200 Subject: [PATCH 62/64] stm32mp1: Add copro image support for M4 firmware Implements copro image loading with FIT. Once image is loaded with remoteproc, the M4 coprocessor is automatically started. Signed-off-by: Loic Pallardy Signed-off-by: Patrick Delaunay --- board/st/stm32mp1/stm32mp1.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 95e6078174..fc14ad375c 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -891,3 +892,26 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; } #endif + +static void board_copro_image_process(ulong fw_image, size_t fw_size) +{ + int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */ + + if (!rproc_is_initialized()) + if (rproc_init()) { + printf("Remote Processor %d initialization failed\n", + id); + return; + } + + ret = rproc_load(id, fw_image, fw_size); + printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n", + id, fw_image, fw_size, ret ? " Failed!" : " Success!"); + + if (!ret) { + rproc_start(id); + env_set("copro_state", "booted"); + } +} + +U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process); From 0e6522cbd1bfccd7281acdf8ab5ebbd37d29eab1 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 2 Aug 2019 15:07:21 +0200 Subject: [PATCH 63/64] stm32mp1: add example files for FIT generation Add example of its files to generate FIT to start kernel on ev1 or dk2 board with - only kernel and dtb = fit_copro_kernel_dtb.its - kernel, M4 copro firmware and dtb = it_copro_kernel_dtb.its Add extlinux example to manage config in generated FIT. Signed-off-by: Loic Pallardy Signed-off-by: Patrick Delaunay --- board/st/stm32mp1/extlinux.conf | 20 ++++ board/st/stm32mp1/fit_copro_kernel_dtb.its | 103 +++++++++++++++++++++ board/st/stm32mp1/fit_kernel_dtb.its | 82 ++++++++++++++++ 3 files changed, 205 insertions(+) create mode 100644 board/st/stm32mp1/extlinux.conf create mode 100644 board/st/stm32mp1/fit_copro_kernel_dtb.its create mode 100644 board/st/stm32mp1/fit_kernel_dtb.its diff --git a/board/st/stm32mp1/extlinux.conf b/board/st/stm32mp1/extlinux.conf new file mode 100644 index 0000000000..2b4632804d --- /dev/null +++ b/board/st/stm32mp1/extlinux.conf @@ -0,0 +1,20 @@ +# Generic Distro Configuration for STM32MP157 +menu title Select the boot mode +TIMEOUT 20 +DEFAULT stm32mp157c-ev1 + +LABEL stm32mp157c-ev1 + KERNEL /fit_kernel_dtb.itb#ev1 + APPEND root=/dev/mmcblk0p6 rootwait rw earlyprintk console=ttyS3,115200 + +LABEL stm32mp157c-ev1-m4 + KERNEL /fit_copro_kernel_dtb.itb#ev1-m4 + APPEND root=/dev/mmcblk0p6 rootwait rw earlyprintk console=ttyS3,115200 + +LABEL stm32mp157c-dk2 + KERNEL /fit_kernel_dtb.itb#dk2 + APPEND root=/dev/mmcblk0p6 rootwait rw earlyprintk console=ttyS3,115200 + +LABEL stm32mp157c-dk2-m4 + KERNEL /fit_copro_kernel_dtb.itb#dk2-m4 + APPEND root=/dev/mmcblk0p6 rootwait rw earlyprintk console=ttyS3,115200 diff --git a/board/st/stm32mp1/fit_copro_kernel_dtb.its b/board/st/stm32mp1/fit_copro_kernel_dtb.its new file mode 100644 index 0000000000..3e08fd943e --- /dev/null +++ b/board/st/stm32mp1/fit_copro_kernel_dtb.its @@ -0,0 +1,103 @@ +/* + * Compilation: + * mkimage -f fit_copro_kernel_dtb.its fit_copro_kernel_dtb.itb + */ + +/dts-v1/; +/ { + description = "U-Boot fitImage for stm32mp157"; + #address-cells = <1>; + + images { + + copro { + description = "M4 copro"; + data = /incbin/("rproc-m4-fw.elf"); + type = "copro"; + arch = "arm"; + compression = "none"; + load = <0xC0800000>; + hash-1 { + algo = "sha1"; + }; + }; + + kernel { + description = "Linux kernel"; + data = /incbin/("zImage"); + type = "kernel"; + arch = "arm"; + os = "linux"; + compression = "none"; + load = <0xC0008000>; + entry = <0xC0008000>; + hash-1 { + algo = "sha1"; + }; + }; + + fdt-dk2 { + description = "FDT dk2"; + data = /incbin/("stm32mp157c-dk2.dtb"); + type = "flat_dt"; + arch = "arm"; + compression = "none"; + hash-1 { + algo = "sha1"; + }; + }; + + fdt-ev1 { + description = "FDT ev1"; + data = /incbin/("stm32mp157c-ev1.dtb"); + type = "flat_dt"; + arch = "arm"; + compression = "none"; + hash-1 { + algo = "sha1"; + }; + }; + }; + + configurations { + default = "dk2-m4"; + + dk2-m4 { + description = "dk2-m4"; + loadables = "copro"; + kernel = "kernel"; + fdt = "fdt-dk2"; + hash-1 { + algo = "sha1"; + }; + }; + + dk2 { + description = "dk2"; + kernel = "kernel"; + fdt = "fdt-dk2"; + hash-1 { + algo = "sha1"; + }; + }; + + ev1-m4 { + description = "ev1-m4"; + loadables = "copro"; + kernel = "kernel"; + fdt = "fdt-ev1"; + hash-1 { + algo = "sha1"; + }; + }; + + ev1 { + description = "ev1"; + kernel = "kernel"; + fdt = "fdt-ev1"; + hash-1 { + algo = "sha1"; + }; + }; + }; +}; diff --git a/board/st/stm32mp1/fit_kernel_dtb.its b/board/st/stm32mp1/fit_kernel_dtb.its new file mode 100644 index 0000000000..18d03ebf3c --- /dev/null +++ b/board/st/stm32mp1/fit_kernel_dtb.its @@ -0,0 +1,82 @@ +/* + * Compilation: + * mkimage -f fit_kernel_dtb.its fit_kernel_dtb.itb + * + * Files in linux build dir: + * - arch/arm/boot/zImage + * - arch/arm/boot/dts/stm32mp157c-dk2.dtb + * - arch/arm/boot/dts/stm32mp157c-ev1.dtb + * + * load mmc 0:4 $kernel_addr_r fit_kernel_dtb.itb + * bootm $kernel_addr_r + * bootm $kernel_addr_r#dk2 + * bootm $kernel_addr_r#ev1 + * + * or use extlinux.conf in this directory + */ + +/dts-v1/; +/ { + description = "U-Boot fitImage for stm32mp157"; + #address-cells = <1>; + + images { + kernel { + description = "Linux kernel"; + data = /incbin/("zImage"); + type = "kernel"; + arch = "arm"; + os = "linux"; + compression = "none"; + load = <0xC0008000>; + entry = <0xC0008000>; + hash-1 { + algo = "sha1"; + }; + }; + + fdt-dk2 { + description = "FDT dk2"; + data = /incbin/("stm32mp157c-dk2.dtb"); + type = "flat_dt"; + arch = "arm"; + compression = "none"; + hash-1 { + algo = "sha1"; + }; + }; + + fdt-ev1 { + description = "FDT ev1"; + data = /incbin/("stm32mp157c-ev1.dtb"); + type = "flat_dt"; + arch = "arm"; + compression = "none"; + hash-1 { + algo = "sha1"; + }; + }; + }; + + configurations { + default = "dk2"; + + dk2 { + description = "dk2"; + kernel = "kernel"; + fdt = "fdt-dk2"; + hash-1 { + algo = "sha1"; + }; + }; + + ev1 { + description = "ev1"; + kernel = "kernel"; + fdt = "fdt-ev1"; + hash-1 { + algo = "sha1"; + }; + }; + }; +}; From 06d1dd2cdc3c69122e58b38fd11b2a4e524a37e2 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 2 Aug 2019 15:07:22 +0200 Subject: [PATCH 64/64] stm32mp1: update README for remoteproc support Add information for remoteproc usage to load firmware in M4 coprocessor on stm32mp157. Signed-off-by: Patrick Delaunay --- board/st/stm32mp1/README | 36 ++++++++++++++++++++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-) diff --git a/board/st/stm32mp1/README b/board/st/stm32mp1/README index 428357cfa0..c807e0842e 100644 --- a/board/st/stm32mp1/README +++ b/board/st/stm32mp1/README @@ -139,7 +139,6 @@ the supported device trees for stm32mp157 are: # make DEVICE_TREE= all - example: a) trusted boot on ev1 # export KBUILD_OUTPUT=stm32mp15_trusted @@ -190,7 +189,7 @@ the supported device trees for stm32mp157 are: 6. Switch Setting for Boot Mode =============================== -You can select the boot mode, on the board ed1 with the switch SW1 +You can select the boot mode, on the board with one switch : - on the daugther board ed1 with the switch SW1 : BOOT0, BOOT1, BOOT2 @@ -358,3 +357,36 @@ on bank 0 to access to internal OTP: 4 check env update STM32MP> print ethaddr ethaddr=12:34:56:78:9a:bc + +10. Coprocessor firmware +======================== + +U-Boot can boot the coprocessor before the kernel (coprocessor early boot). + +A/ Manuallly by using rproc commands (update the bootcmd) + Configurations + # env set name_copro "rproc-m4-fw.elf" + # env set dev_copro 0 + # env set loadaddr_copro 0xC1000000 + + Load binary from bootfs partition (number 4) on SDCard (mmc 0) + # ext4load mmc 0:4 ${loadaddr_copro} ${name_copro} + => ${filesize} updated with the size of the loaded file + + Start M4 firmware with remote proc command + # rproc init + # rproc load ${dev_copro} ${loadaddr_copro} ${filesize} + # rproc start ${dev_copro} + +B/ Automatically by using FIT feature and generic DISTRO bootcmd + + see examples in this directory : + + Generate FIT including kernel + device tree + M4 firmware + with cfg with M4 boot + $> mkimage -f fit_copro_kernel_dtb.its fit_copro_kernel_dtb.itb + + Then using DISTRO configuration file: see extlinux.conf to select + the correct configuration + => stm32mp157c-ev1-m4 + => stm32mp157c-dk2-m4