dm: dts: Convert driver model tags to use new schema

Now that Linux has accepted these tags, move the device tree files in
U-Boot over to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2023-02-13 08:56:33 -07:00
parent c74e03417b
commit 8c103c33fb
564 changed files with 4216 additions and 4216 deletions

View file

@ -18,7 +18,7 @@
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <500000000>; clock-frequency = <500000000>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };

View file

@ -11,7 +11,7 @@
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <750000000>; clock-frequency = <750000000>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };

View file

@ -11,7 +11,7 @@
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <100000000>; clock-frequency = <100000000>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };

View file

@ -13,11 +13,11 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0x00000000 0xe0000000 0x10000000>; ranges = <0x00000000 0xe0000000 0x10000000>;
u-boot,dm-pre-reloc; bootph-all;
clocks { clocks {
compatible = "simple-bus"; compatible = "simple-bus";
u-boot,dm-pre-reloc; bootph-all;
apbclk: apbclk { apbclk: apbclk {
compatible = "fixed-clock"; compatible = "fixed-clock";
@ -29,7 +29,7 @@
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <33333333>; clock-frequency = <33333333>;
#clock-cells = <0>; #clock-cells = <0>;
u-boot,dm-pre-reloc; bootph-all;
}; };
mmcclk_ciu: mmcclk-ciu { mmcclk_ciu: mmcclk-ciu {

View file

@ -21,7 +21,7 @@
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <40000000>; clock-frequency = <40000000>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };

View file

@ -23,7 +23,7 @@
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <500000000>; clock-frequency = <500000000>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };

View file

@ -19,7 +19,7 @@
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <144000000>; clock-frequency = <144000000>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };

View file

@ -18,7 +18,7 @@
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <70000000>; clock-frequency = <70000000>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };

View file

@ -14,7 +14,7 @@
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
u-boot,dm-pre-reloc; bootph-all;
timer@0 { timer@0 {
compatible = "snps,arc-timer"; compatible = "snps,arc-timer";

View file

@ -6,69 +6,69 @@
/ { / {
ocp { ocp {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
&l4_wkup { &l4_wkup {
u-boot,dm-pre-reloc; bootph-all;
segment@200000 { segment@200000 {
u-boot,dm-pre-reloc; bootph-all;
target-module@0 target-module@0
{ {
u-boot,dm-pre-reloc; bootph-all;
compatible = "simple-bus"; compatible = "simple-bus";
}; };
target-module@7000 { target-module@7000 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "simple-bus"; compatible = "simple-bus";
}; };
target-module@9000 { target-module@9000 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "simple-bus"; compatible = "simple-bus";
}; };
}; };
}; };
&wkup_cm { &wkup_cm {
u-boot,dm-pre-reloc; bootph-all;
}; };
&l4_wkup_clkctrl { &l4_wkup_clkctrl {
u-boot,dm-pre-reloc; bootph-all;
}; };
&l4_per { &l4_per {
u-boot,dm-pre-reloc; bootph-all;
segment@0 { segment@0 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "simple-bus"; compatible = "simple-bus";
target-module@4c000 { target-module@4c000 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "simple-bus"; compatible = "simple-bus";
}; };
}; };
segment@100000 { segment@100000 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "simple-bus"; compatible = "simple-bus";
target-module@ac000 { target-module@ac000 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "simple-bus"; compatible = "simple-bus";
}; };
target-module@ae000 { target-module@ae000 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "simple-bus"; compatible = "simple-bus";
}; };
}; };
}; };
&prcm { &prcm {
u-boot,dm-pre-reloc; bootph-all;
}; };
&gpio0_target { &gpio0_target {
u-boot,dm-pre-reloc; bootph-all;
}; };
&prcm_clocks { &prcm_clocks {
@ -80,33 +80,33 @@
}; };
&i2c0 { &i2c0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart0 { &uart0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc1 { &mmc1 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc2 { &mmc2 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&gpio0 { &gpio0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&gpio1 { &gpio1 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&gpio2 { &gpio2 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&gpio3 { &gpio3 {
u-boot,dm-pre-reloc; bootph-all;
}; };

View file

@ -122,7 +122,7 @@
}; };
&uart0 { /* console uart */ &uart0 { /* console uart */
u-boot,dm-spl; bootph-pre-ram;
status = "okay"; status = "okay";
}; };
@ -139,12 +139,12 @@
}; };
&i2c0 { &i2c0 {
u-boot,dm-spl; bootph-pre-ram;
status = "okay"; status = "okay";
clock-frequency = <100000>; clock-frequency = <100000>;
tps: tps@24 { /* PMIC controller */ tps: tps@24 { /* PMIC controller */
u-boot,dm-spl; bootph-pre-ram;
reg = <0x24>; reg = <0x24>;
compatible = "ti,tps65217"; compatible = "ti,tps65217";
}; };
@ -176,12 +176,12 @@
}; };
&i2c1 { &i2c1 {
u-boot,dm-spl; bootph-pre-ram;
status = "okay"; status = "okay";
}; };
&spi0 { &spi0 {
u-boot,dm-spl; bootph-pre-ram;
status = "okay"; status = "okay";
cs-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>, cs-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>,
@ -192,8 +192,8 @@
spi-max-frequency = <24000000>; spi-max-frequency = <24000000>;
spi_flash: spiflash@0 { spi_flash: spiflash@0 {
u-boot,dm-spl; bootph-pre-ram;
u-boot,dm-pre-reloc; bootph-all;
compatible = "spidev", "spi-flash"; compatible = "spidev", "spi-flash";
spi-max-frequency = <24000000>; spi-max-frequency = <24000000>;
reg = <0>; reg = <0>;
@ -201,7 +201,7 @@
}; };
&spi1 { &spi1 {
u-boot,dm-spl; bootph-pre-ram;
status = "okay"; status = "okay";
cs-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>, cs-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>,
<&gpio0 19 GPIO_ACTIVE_HIGH>, <&gpio0 19 GPIO_ACTIVE_HIGH>,
@ -302,10 +302,10 @@
segment@300000 { segment@300000 {
target-module@e000 { target-module@e000 {
u-boot,dm-pre-reloc; bootph-all;
lcdc: lcdc@0 { lcdc: lcdc@0 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
ti,no-reset-on-init; ti,no-reset-on-init;
ti,no-idle-on-init; ti,no-idle-on-init;
@ -327,22 +327,22 @@
}; };
&gpio0 { &gpio0 {
u-boot,dm-spl; bootph-pre-ram;
ti,no-reset-on-init; ti,no-reset-on-init;
}; };
&gpio1 { &gpio1 {
u-boot,dm-spl; bootph-pre-ram;
ti,no-reset-on-init; ti,no-reset-on-init;
}; };
&gpio2 { &gpio2 {
u-boot,dm-spl; bootph-pre-ram;
ti,no-reset-on-init; ti,no-reset-on-init;
}; };
&gpio3 { &gpio3 {
u-boot,dm-spl; bootph-pre-ram;
ti,no-reset-on-init; ti,no-reset-on-init;
}; };

View file

@ -113,7 +113,7 @@
}; };
&uart0 { /* console uart */ &uart0 { /* console uart */
u-boot,dm-spl; bootph-pre-ram;
status = "okay"; status = "okay";
}; };
@ -130,12 +130,12 @@
}; };
&i2c0 { &i2c0 {
u-boot,dm-spl; bootph-pre-ram;
status = "okay"; status = "okay";
clock-frequency = <100000>; clock-frequency = <100000>;
tps: tps@24 { /* PMIC controller */ tps: tps@24 { /* PMIC controller */
u-boot,dm-spl; bootph-pre-ram;
reg = <0x24>; reg = <0x24>;
compatible = "ti,tps65217"; compatible = "ti,tps65217";
@ -233,7 +233,7 @@
}; };
&mmc1 { &mmc1 {
u-boot,dm-pre-reloc; bootph-all;
vmmc-supply = <&vmmcsd_fixed>; vmmc-supply = <&vmmcsd_fixed>;
bus-width = <0x4>; bus-width = <0x4>;
ti,non-removable; ti,non-removable;
@ -243,7 +243,7 @@
}; };
&mmc2 { &mmc2 {
u-boot,dm-pre-reloc; bootph-all;
vmmc-supply = <&vmmcsd_fixed>; vmmc-supply = <&vmmcsd_fixed>;
bus-width = <0x8>; bus-width = <0x8>;
ti,non-removable; ti,non-removable;
@ -257,10 +257,10 @@
segment@300000 { segment@300000 {
target-module@e000 { target-module@e000 {
u-boot,dm-pre-reloc; bootph-all;
lcdc: lcdc@0 { lcdc: lcdc@0 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
ti,no-reset-on-init; ti,no-reset-on-init;
ti,no-idle-on-init; ti,no-idle-on-init;
@ -282,22 +282,22 @@
}; };
&gpio0 { &gpio0 {
u-boot,dm-spl; bootph-pre-ram;
ti,no-reset-on-init; ti,no-reset-on-init;
}; };
&gpio1 { &gpio1 {
u-boot,dm-spl; bootph-pre-ram;
ti,no-reset-on-init; ti,no-reset-on-init;
}; };
&gpio2 { &gpio2 {
u-boot,dm-spl; bootph-pre-ram;
ti,no-reset-on-init; ti,no-reset-on-init;
}; };
&gpio3 { &gpio3 {
u-boot,dm-spl; bootph-pre-ram;
ti,no-reset-on-init; ti,no-reset-on-init;
}; };

View file

@ -6,14 +6,14 @@
#include "am33xx-u-boot.dtsi" #include "am33xx-u-boot.dtsi"
&l4_per { &l4_per {
u-boot,dm-pre-reloc; bootph-all;
segment@300000 { segment@300000 {
u-boot,dm-pre-reloc; bootph-all;
target-module@e000 { target-module@e000 {
u-boot,dm-pre-reloc; bootph-all;
lcdc: lcdc@0 { lcdc: lcdc@0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };
@ -28,27 +28,27 @@
}; };
&i2c0 { &i2c0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&l4_wkup { &l4_wkup {
u-boot,dm-pre-reloc; bootph-all;
segment@200000 { segment@200000 {
u-boot,dm-pre-reloc; bootph-all;
target-module@9000 { target-module@9000 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };
&uart0 { &uart0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc1 { &mmc1 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc2 { &mmc2 {
u-boot,dm-pre-reloc; bootph-all;
}; };

View file

@ -12,10 +12,10 @@
segment@300000 { segment@300000 {
target-module@e000 { target-module@e000 {
u-boot,dm-pre-reloc; bootph-all;
lcdc: lcdc@0 { lcdc: lcdc@0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };

View file

@ -8,12 +8,12 @@
/ { / {
ocp { ocp {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
&l4_wkup { &l4_wkup {
u-boot,dm-pre-reloc; bootph-all;
}; };
&l4_per { &l4_per {
@ -21,25 +21,25 @@
segment@300000 { segment@300000 {
target-module@e000 { target-module@e000 {
u-boot,dm-pre-reloc; bootph-all;
lcdc: lcdc@0 { lcdc: lcdc@0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };
}; };
&mmc1 { &mmc1 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc1_pins { &mmc1_pins {
u-boot,dm-pre-reloc; bootph-all;
}; };
&scm { &scm {
u-boot,dm-pre-reloc; bootph-all;
}; };
&spi0 { &spi0 {
@ -54,31 +54,31 @@
}; };
&uart0 { &uart0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart0_pins { &uart0_pins {
u-boot,dm-pre-reloc; bootph-all;
}; };
&usb { &usb {
u-boot,dm-pre-reloc; bootph-all;
}; };
&usb_ctrl_mod { &usb_ctrl_mod {
u-boot,dm-pre-reloc; bootph-all;
}; };
&usb0 { &usb0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&usb0_phy { &usb0_phy {
u-boot,dm-pre-reloc; bootph-all;
}; };
&am33xx_pinmux { &am33xx_pinmux {
u-boot,dm-pre-reloc; bootph-all;
lcd0_pins: pinmux_lcd0_pins { lcd0_pins: pinmux_lcd0_pins {
pinctrl-single,pins = < pinctrl-single,pins = <

View file

@ -6,65 +6,65 @@
#include "am33xx-u-boot.dtsi" #include "am33xx-u-boot.dtsi"
&l4_wkup { &l4_wkup {
u-boot,dm-pre-reloc; bootph-all;
segment@200000 { segment@200000 {
target-module@10000 { target-module@10000 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };
&l4_per { &l4_per {
u-boot,dm-pre-reloc; bootph-all;
segment@100000 { segment@100000 {
u-boot,dm-pre-reloc; bootph-all;
target-module@a6000 { target-module@a6000 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
segment@300000 { segment@300000 {
target-module@e000 { target-module@e000 {
u-boot,dm-pre-reloc; bootph-all;
lcdc: lcdc@0 { lcdc: lcdc@0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };
}; };
&scm { &scm {
u-boot,dm-pre-reloc; bootph-all;
}; };
&am33xx_pinmux { &am33xx_pinmux {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart3_pins { &uart3_pins {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart3 { &uart3 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc1 { &mmc1 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc1_pins { &mmc1_pins {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc2 { &mmc2 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc2_pins { &mmc2_pins {
u-boot,dm-pre-reloc; bootph-all;
}; };

View file

@ -12,10 +12,10 @@
segment@300000 { segment@300000 {
target-module@e000 { target-module@e000 {
u-boot,dm-pre-reloc; bootph-all;
lcdc: lcdc@0 { lcdc: lcdc@0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };

View file

@ -15,19 +15,19 @@
}; };
ocp { ocp {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
&i2c0 { &i2c0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart0 { &uart0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc1 { &mmc1 {
u-boot,dm-pre-reloc; bootph-all;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
}; };

View file

@ -12,10 +12,10 @@
segment@300000 { segment@300000 {
target-module@e000 { target-module@e000 {
u-boot,dm-pre-reloc; bootph-all;
lcdc: lcdc@0 { lcdc: lcdc@0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };

View file

@ -9,36 +9,36 @@
&l4_wkup { &l4_wkup {
segment@200000 { segment@200000 {
target-module@0 { target-module@0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };
&prcm { &prcm {
u-boot,dm-pre-reloc; bootph-all;
}; };
&per_cm { &per_cm {
u-boot,dm-pre-reloc; bootph-all;
}; };
&l4ls_clkctrl { &l4ls_clkctrl {
u-boot,dm-pre-reloc; bootph-all;
}; };
&l4_per { &l4_per {
u-boot,dm-pre-reloc; bootph-all;
segment@0 { segment@0 {
u-boot,dm-pre-reloc; bootph-all;
target-module@30000 { target-module@30000 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };
&spi0 { &spi0 {
u-boot,dm-pre-reloc; bootph-all;
channel@0 { channel@0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };

View file

@ -7,45 +7,45 @@
/ { / {
ocp { ocp {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
&l4_wkup { &l4_wkup {
u-boot,dm-pre-reloc; bootph-all;
}; };
&scm { &scm {
u-boot,dm-pre-reloc; bootph-all;
}; };
&am33xx_pinmux { &am33xx_pinmux {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart0_pins { &uart0_pins {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart0 { &uart0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc1 { &mmc1 {
u-boot,dm-pre-reloc; bootph-all;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
}; };
&emmc_pins { &emmc_pins {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc2 { &mmc2 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc1_pins { &mmc1_pins {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc3 { &mmc3 {

View file

@ -15,16 +15,16 @@
}; };
ocp { ocp {
u-boot,dm-pre-reloc; bootph-all;
l4_wkup@44c00000 { l4_wkup@44c00000 {
u-boot,dm-pre-reloc; bootph-all;
segment@200000 { segment@200000 {
u-boot,dm-pre-reloc; bootph-all;
target-module@9000 { target-module@9000 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };
@ -32,14 +32,14 @@
}; };
&i2c0 { &i2c0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart0 { &uart0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mmc1 { &mmc1 {
u-boot,dm-pre-reloc; bootph-all;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
}; };

View file

@ -6,7 +6,7 @@
/ { / {
ocp { ocp {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };

View file

@ -18,37 +18,37 @@
}; };
&gpio1 { &gpio1 {
/delete-property/ u-boot,dm-spl; /delete-property/ bootph-pre-ram;
}; };
&gpio2 { &gpio2 {
/delete-property/ u-boot,dm-spl; /delete-property/ bootph-pre-ram;
}; };
&gpio3 { &gpio3 {
/delete-property/ u-boot,dm-spl; /delete-property/ bootph-pre-ram;
}; };
&gpio5 { &gpio5 {
/delete-property/ u-boot,dm-spl; /delete-property/ bootph-pre-ram;
}; };
&gpio6 { &gpio6 {
/delete-property/ u-boot,dm-spl; /delete-property/ bootph-pre-ram;
}; };
&mmc2 { &mmc2 {
/delete-property/ u-boot,dm-spl; /delete-property/ bootph-pre-ram;
}; };
&mmc3 { &mmc3 {
/delete-property/ u-boot,dm-spl; /delete-property/ bootph-pre-ram;
}; };
&uart1 { &uart1 {
/delete-property/ u-boot,dm-spl; /delete-property/ bootph-pre-ram;
}; };
&uart2 { &uart2 {
/delete-property/ u-boot,dm-spl; /delete-property/ bootph-pre-ram;
}; };

View file

@ -7,10 +7,10 @@
/{ /{
ocp { ocp {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
&i2c0 { &i2c0 {
u-boot,dm-pre-reloc; bootph-all;
}; };

View file

@ -27,41 +27,41 @@
}; };
&dwc3_1 { &dwc3_1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb1 { &usb1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb2_phy1 { &usb2_phy1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&am43xx_control_usb2phy1 { &am43xx_control_usb2phy1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&ocp2scp0 { &ocp2scp0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&dwc3_2 { &dwc3_2 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb2 { &usb2 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb2_phy2 { &usb2_phy2 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&am43xx_control_usb2phy2 { &am43xx_control_usb2phy2 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&ocp2scp1 { &ocp2scp1 {
u-boot,dm-spl; bootph-pre-ram;
}; };

View file

@ -11,50 +11,50 @@
/{ /{
ocp { ocp {
u-boot,dm-spl; bootph-pre-ram;
}; };
}; };
&uart0 { &uart0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc1 { &mmc1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mac { &mac {
u-boot,dm-spl; bootph-pre-ram;
}; };
&davinci_mdio { &davinci_mdio {
u-boot,dm-spl; bootph-pre-ram;
}; };
&cpsw_emac0 { &cpsw_emac0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&phy_sel { &phy_sel {
u-boot,dm-spl; bootph-pre-ram;
}; };
&i2c0 { &i2c0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&l4_wkup { &l4_wkup {
u-boot,dm-spl; bootph-pre-ram;
}; };
&scm { &scm {
u-boot,dm-spl; bootph-pre-ram;
}; };
&scm_conf { &scm_conf {
u-boot,dm-spl; bootph-pre-ram;
}; };
&ethphy0 { &ethphy0 {
u-boot,dm-spl; bootph-pre-ram;
}; };

View file

@ -7,7 +7,7 @@
/{ /{
ocp { ocp {
u-boot,dm-spl; bootph-pre-ram;
}; };
xtal25mhz: xtal25mhz { xtal25mhz: xtal25mhz {
@ -18,11 +18,11 @@
}; };
&uart0 { &uart0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&i2c0 { &i2c0 {
u-boot,dm-spl; bootph-pre-ram;
cdce913: cdce913@65 { cdce913: cdce913@65 {
compatible = "ti,cdce913"; compatible = "ti,cdce913";
@ -34,5 +34,5 @@
}; };
&mmc1 { &mmc1 {
u-boot,dm-spl; bootph-pre-ram;
}; };

View file

@ -7,18 +7,18 @@
/{ /{
ocp { ocp {
u-boot,dm-spl; bootph-pre-ram;
}; };
}; };
&uart0 { &uart0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&i2c0 { &i2c0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc1 { &mmc1 {
u-boot,dm-spl; bootph-pre-ram;
}; };

View file

@ -21,15 +21,15 @@
}; };
&spi0 { &spi0 {
u-boot,dm-pre-reloc; bootph-all;
spi-flash@0 { spi-flash@0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
&sdhci0 { &sdhci0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&eth0 { &eth0 {

View file

@ -21,15 +21,15 @@
}; };
&spi0 { &spi0 {
u-boot,dm-pre-reloc; bootph-all;
spi-flash@0 { spi-flash@0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
&sdhci0 { &sdhci0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pinctrl_sb { &pinctrl_sb {

View file

@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0 // SPDX-License-Identifier: GPL-2.0
&watchdog { &watchdog {
u-boot,dm-pre-reloc; bootph-all;
}; };
#include "mvebu-u-boot.dtsi" #include "mvebu-u-boot.dtsi"

View file

@ -12,24 +12,24 @@
}; };
&i2c0 { &i2c0 {
u-boot,dm-pre-reloc; bootph-all;
i2cmux: i2cmux@70 { i2cmux: i2cmux@70 {
u-boot,dm-pre-reloc; bootph-all;
i2c@0 { i2c@0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
i2c@1 { i2c@1 {
u-boot,dm-pre-reloc; bootph-all;
}; };
i2c@5 { i2c@5 {
u-boot,dm-pre-reloc; bootph-all;
crypto@64 { crypto@64 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };

View file

@ -1,38 +1,38 @@
// SPDX-License-Identifier: GPL-2.0+ // SPDX-License-Identifier: GPL-2.0+
&spi1 { &spi1 {
u-boot,dm-spl; bootph-pre-ram;
spi-flash@0 { spi-flash@0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
}; };
&sdhci { &sdhci {
u-boot,dm-spl; bootph-pre-ram;
}; };
&gpio0 { &gpio0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&ahci0 { &ahci0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&ahci1 { &ahci1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&i2c0 { &i2c0 {
u-boot,dm-spl; bootph-pre-ram;
eeprom@52 { eeprom@52 {
u-boot,dm-spl; bootph-pre-ram;
}; };
eeprom@53 { eeprom@53 {
u-boot,dm-spl; bootph-pre-ram;
}; };
}; };

View file

@ -5,41 +5,41 @@
}; };
&spi1 { &spi1 {
u-boot,dm-spl; bootph-pre-ram;
spi-flash@0 { spi-flash@0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
}; };
&w25q32 { &w25q32 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&gpio0 { &gpio0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&ahci0 { &ahci0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&ahci1 { &ahci1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&sdhci { &sdhci {
u-boot,dm-spl; bootph-pre-ram;
}; };
&i2c0 { &i2c0 {
u-boot,dm-spl; bootph-pre-ram;
eeprom@52 { eeprom@52 {
u-boot,dm-spl; bootph-pre-ram;
}; };
eeprom@53 { eeprom@53 {
u-boot,dm-spl; bootph-pre-ram;
}; };
}; };

View file

@ -1,25 +1,25 @@
&gpio0 { &gpio0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&gpio1 { &gpio1 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart1 { &uart1 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&spi1 { &spi1 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&I2C0 { &I2C0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&PCA22 { &PCA22 {
u-boot,dm-pre-reloc; bootph-all;
}; };
#include "mvebu-u-boot.dtsi" #include "mvebu-u-boot.dtsi"

View file

@ -18,7 +18,7 @@
cpu@000 { cpu@000 {
clocks; clocks;
u-boot,dm-pre-reloc; bootph-all;
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8"; compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x000>; reg = <0x000>;
@ -26,7 +26,7 @@
}; };
cpu@001 { cpu@001 {
clocks; clocks;
u-boot,dm-pre-reloc; bootph-all;
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8"; compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x001>; reg = <0x001>;
@ -34,7 +34,7 @@
}; };
cpu@100 { cpu@100 {
clocks; clocks;
u-boot,dm-pre-reloc; bootph-all;
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8"; compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x100>; reg = <0x100>;
@ -42,7 +42,7 @@
}; };
cpu@101 { cpu@101 {
clocks; clocks;
u-boot,dm-pre-reloc; bootph-all;
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a72", "arm,armv8"; compatible = "arm,cortex-a72", "arm,armv8";
reg = <0x101>; reg = <0x101>;

View file

@ -1,5 +1,5 @@
&lcd0 { &lcd0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
#include "mvebu-u-boot.dtsi" #include "mvebu-u-boot.dtsi"

View file

@ -19,7 +19,7 @@
}; };
&uart5 { &uart5 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };
@ -28,17 +28,17 @@
}; };
&wdt1 { &wdt1 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };
&wdt2 { &wdt2 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };
&wdt3 { &wdt3 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -8,19 +8,19 @@
scu: clock-controller@1e6e2000 { scu: clock-controller@1e6e2000 {
compatible = "aspeed,ast2500-scu"; compatible = "aspeed,ast2500-scu";
reg = <0x1e6e2000 0x1000>; reg = <0x1e6e2000 0x1000>;
u-boot,dm-pre-reloc; bootph-all;
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
}; };
rst: reset-controller { rst: reset-controller {
u-boot,dm-pre-reloc; bootph-all;
compatible = "aspeed,ast2500-reset"; compatible = "aspeed,ast2500-reset";
#reset-cells = <1>; #reset-cells = <1>;
}; };
sdrammc: sdrammc@1e6e0000 { sdrammc: sdrammc@1e6e0000 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "aspeed,ast2500-sdrammc"; compatible = "aspeed,ast2500-sdrammc";
reg = <0x1e6e0000 0x174 reg = <0x1e6e0000 0x174
0x1e6e0200 0x1d4 >; 0x1e6e0200 0x1d4 >;
@ -51,7 +51,7 @@
}; };
&timer { &timer {
u-boot,dm-pre-reloc; bootph-all;
}; };
&mac0 { &mac0 {

View file

@ -58,7 +58,7 @@
}; };
&uart5 { &uart5 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };
@ -258,11 +258,11 @@
}; };
&hace { &hace {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };
&acry { &acry {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -8,21 +8,21 @@
scu: clock-controller@1e6e2000 { scu: clock-controller@1e6e2000 {
compatible = "aspeed,ast2600-scu"; compatible = "aspeed,ast2600-scu";
reg = <0x1e6e2000 0x1000>; reg = <0x1e6e2000 0x1000>;
u-boot,dm-pre-reloc; bootph-all;
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
uart-clk-source = <0x0>; /* uart clock source selection: 0: uxclk 1: huxclk*/ uart-clk-source = <0x0>; /* uart clock source selection: 0: uxclk 1: huxclk*/
}; };
rst: reset-controller { rst: reset-controller {
u-boot,dm-pre-reloc; bootph-all;
compatible = "aspeed,ast2600-reset"; compatible = "aspeed,ast2600-reset";
aspeed,wdt = <&wdt1>; aspeed,wdt = <&wdt1>;
#reset-cells = <1>; #reset-cells = <1>;
}; };
sdrammc: sdrammc@1e6e0000 { sdrammc: sdrammc@1e6e0000 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "aspeed,ast2600-sdrammc"; compatible = "aspeed,ast2600-sdrammc";
reg = <0x1e6e0000 0x100 reg = <0x1e6e0000 0x100
0x1e6e0100 0x300 0x1e6e0100 0x300
@ -33,10 +33,10 @@
}; };
ahb { ahb {
u-boot,dm-pre-reloc; bootph-all;
apb { apb {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };

View file

@ -10,70 +10,70 @@
/ { / {
ahb { ahb {
u-boot,dm-pre-reloc; bootph-all;
apb { apb {
u-boot,dm-pre-reloc; bootph-all;
pinctrl { pinctrl {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
&clk32 { &clk32 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&dbgu { &dbgu {
u-boot,dm-pre-reloc; bootph-all;
}; };
&main_rc { &main_rc {
u-boot,dm-pre-reloc; bootph-all;
}; };
&main_xtal { &main_xtal {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pinctrl_dbgu { &pinctrl_dbgu {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pinctrl_sdhci0 { &pinctrl_sdhci0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pioA { &pioA {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pioB { &pioB {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pit64b0 { &pit64b0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pmc { &pmc {
u-boot,dm-pre-reloc; bootph-all;
}; };
&sdhci0 { &sdhci0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&slow_rc_osc { &slow_rc_osc {
u-boot,dm-pre-reloc; bootph-all;
}; };
&slow_xtal { &slow_xtal {
u-boot,dm-pre-reloc; bootph-all;
}; };

View file

@ -22,7 +22,7 @@
}; };
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
stdout-path = &uart1; stdout-path = &uart1;
}; };
@ -32,7 +32,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>; pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
}; };
apb { apb {
@ -41,7 +41,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>; pinctrl-0 = <&pinctrl_uart1_default>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
}; };
i2c0: i2c@f8028000 { i2c0: i2c@f8028000 {
@ -65,12 +65,12 @@
pit: timer@f8048030 { pit: timer@f8048030 {
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
}; };
sfr: sfr@f8030000 { sfr: sfr@f8030000 {
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
}; };
pioA: pinctrl@fc038000 { pioA: pinctrl@fc038000 {
@ -82,14 +82,14 @@
<PIN_PA20__SDMMC1_DAT2>, <PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>; <PIN_PA21__SDMMC1_DAT3>;
bias-pull-up; bias-pull-up;
u-boot,dm-pre-reloc; bootph-all;
}; };
ck_cd { ck_cd {
pinmux = <PIN_PA22__SDMMC1_CK>, pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>; <PIN_PA30__SDMMC1_CD>;
bias-disable; bias-disable;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
@ -97,7 +97,7 @@
pinmux = <PIN_PD2__URXD1>, pinmux = <PIN_PD2__URXD1>,
<PIN_PD3__UTXD1>; <PIN_PD3__UTXD1>;
bias-disable; bias-disable;
u-boot,dm-pre-reloc; bootph-all;
}; };
pinctrl_i2c0_default: i2c0_default { pinctrl_i2c0_default: i2c0_default {

View file

@ -51,7 +51,7 @@
compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d2", "atmel,sama5"; compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d2", "atmel,sama5";
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
stdout-path = &uart1; stdout-path = &uart1;
}; };
@ -85,7 +85,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_default>; pinctrl-0 = <&pinctrl_sdmmc0_default>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
}; };
sdmmc1: sdio-host@b0000000 { sdmmc1: sdio-host@b0000000 {
@ -93,7 +93,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>; pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "okay"; /* conflict with qspi0 */ status = "okay"; /* conflict with qspi0 */
u-boot,dm-pre-reloc; bootph-all;
}; };
apb { apb {
@ -103,10 +103,10 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>; pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
display-timings { display-timings {
u-boot,dm-pre-reloc; bootph-all;
480x272 { 480x272 {
clock-frequency = <9000000>; clock-frequency = <9000000>;
hactive = <480>; hactive = <480>;
@ -117,7 +117,7 @@
vfront-porch = <2>; vfront-porch = <2>;
vback-porch = <2>; vback-porch = <2>;
vsync-len = <11>; vsync-len = <11>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };
@ -126,7 +126,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>; pinctrl-0 = <&pinctrl_uart1_default>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
}; };
pioA: pinctrl@fc038000 { pioA: pinctrl@fc038000 {
@ -178,7 +178,7 @@
<PIN_PA8__SDMMC0_DAT6>, <PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>; <PIN_PA9__SDMMC0_DAT7>;
bias-pull-up; bias-pull-up;
u-boot,dm-pre-reloc; bootph-all;
}; };
ck_cd { ck_cd {
@ -186,7 +186,7 @@
<PIN_PA10__SDMMC0_RSTN>, <PIN_PA10__SDMMC0_RSTN>,
<PIN_PA13__SDMMC0_CD>; <PIN_PA13__SDMMC0_CD>;
bias-disable; bias-disable;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
@ -198,14 +198,14 @@
<PIN_PA20__SDMMC1_DAT2>, <PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>; <PIN_PA21__SDMMC1_DAT3>;
bias-pull-up; bias-pull-up;
u-boot,dm-pre-reloc; bootph-all;
}; };
ck_cd { ck_cd {
pinmux = <PIN_PA22__SDMMC1_CK>, pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>; <PIN_PA30__SDMMC1_CD>;
bias-disable; bias-disable;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
@ -213,7 +213,7 @@
pinmux = <PIN_PD2__URXD1>, pinmux = <PIN_PD2__URXD1>,
<PIN_PD3__UTXD1>; <PIN_PD3__UTXD1>;
bias-disable; bias-disable;
u-boot,dm-pre-reloc; bootph-all;
}; };
pinctrl_usb_default: usb_default { pinctrl_usb_default: usb_default {

View file

@ -9,42 +9,42 @@
/ { / {
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
&hlcdc { &hlcdc {
u-boot,dm-pre-reloc; bootph-all;
}; };
&qspi1 { &qspi1 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&qspi1_flash { &qspi1_flash {
u-boot,dm-pre-reloc; bootph-all;
}; };
&sdmmc0 { &sdmmc0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart0 { &uart0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&sfr { &sfr {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pinctrl_sdmmc0_default { &pinctrl_sdmmc0_default {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pinctrl_uart0_default { &pinctrl_uart0_default {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pinctrl_qspi1_default { &pinctrl_qspi1_default {
u-boot,dm-pre-reloc; bootph-all;
}; };

View file

@ -9,39 +9,39 @@
/ { / {
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
&pinctrl_mikrobus1_uart { &pinctrl_mikrobus1_uart {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pinctrl_qspi1_sck_cs_default { &pinctrl_qspi1_sck_cs_default {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pinctrl_qspi1_dat_default { &pinctrl_qspi1_dat_default {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pinctrl_sdmmc0_default { &pinctrl_sdmmc0_default {
u-boot,dm-pre-reloc; bootph-all;
}; };
&qspi1 { &qspi1 {
u-boot,dm-pre-reloc; bootph-all;
flash@0 { flash@0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
&sdmmc0 { &sdmmc0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart0 { /* mikrobus1 uart */ &uart0 { /* mikrobus1 uart */
u-boot,dm-pre-reloc; bootph-all;
}; };

View file

@ -52,7 +52,7 @@
compatible = "atmel,sama5d2-ptc_ek", "atmel,sama5d2", "atmel,sama5"; compatible = "atmel,sama5d2-ptc_ek", "atmel,sama5d2", "atmel,sama5";
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
stdout-path = &uart0; stdout-path = &uart0;
}; };
@ -96,7 +96,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_default>; pinctrl-0 = <&pinctrl_sdmmc0_default>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
}; };
sdmmc1: sdio-host@b0000000 { sdmmc1: sdio-host@b0000000 {
@ -104,7 +104,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>; pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "disabled"; /* conflicts with nand and qspi0*/ status = "disabled"; /* conflicts with nand and qspi0*/
u-boot,dm-pre-reloc; bootph-all;
}; };
apb { apb {
@ -123,7 +123,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0_default>; pinctrl-0 = <&pinctrl_uart0_default>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
}; };
i2c1: i2c@fc028000 { i2c1: i2c@fc028000 {
@ -175,7 +175,7 @@
<PIN_PA8__SDMMC0_DAT6>, <PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>; <PIN_PA9__SDMMC0_DAT7>;
bias-pull-up; bias-pull-up;
u-boot,dm-pre-reloc; bootph-all;
}; };
ck_cd { ck_cd {
@ -184,7 +184,7 @@
<PIN_PA11__SDMMC0_VDDSEL>, <PIN_PA11__SDMMC0_VDDSEL>,
<PIN_PA13__SDMMC0_CD>; <PIN_PA13__SDMMC0_CD>;
bias-disable; bias-disable;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
@ -196,14 +196,14 @@
<PIN_PA20__SDMMC1_DAT2>, <PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>; <PIN_PA21__SDMMC1_DAT3>;
bias-pull-up; bias-pull-up;
u-boot,dm-pre-reloc; bootph-all;
}; };
ck_cd { ck_cd {
pinmux = <PIN_PA22__SDMMC1_CK>, pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>; <PIN_PA30__SDMMC1_CD>;
bias-disable; bias-disable;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
@ -211,7 +211,7 @@
pinmux = <PIN_PB26__URXD0>, pinmux = <PIN_PB26__URXD0>,
<PIN_PB27__UTXD0>; <PIN_PB27__UTXD0>;
bias-disable; bias-disable;
u-boot,dm-pre-reloc; bootph-all;
}; };
pinctrl_usb_default: usb_default { pinctrl_usb_default: usb_default {

View file

@ -8,7 +8,7 @@
compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5"; compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
stdout-path = &uart1; stdout-path = &uart1;
}; };
@ -46,7 +46,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_default>; pinctrl-0 = <&pinctrl_sdmmc0_default>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
}; };
sdmmc1: sdio-host@b0000000 { sdmmc1: sdio-host@b0000000 {
@ -54,7 +54,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>; pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "okay"; /* conflict with qspi0 */ status = "okay"; /* conflict with qspi0 */
u-boot,dm-pre-reloc; bootph-all;
}; };
apb { apb {
@ -64,10 +64,10 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>; pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
display-timings { display-timings {
u-boot,dm-pre-reloc; bootph-all;
480x272 { 480x272 {
clock-frequency = <9000000>; clock-frequency = <9000000>;
hactive = <480>; hactive = <480>;
@ -78,7 +78,7 @@
vfront-porch = <2>; vfront-porch = <2>;
vback-porch = <2>; vback-porch = <2>;
vsync-len = <11>; vsync-len = <11>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };
@ -87,7 +87,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi0_sck_cs_default &pinctrl_qspi0_dat_default>; pinctrl-0 = <&pinctrl_qspi0_sck_cs_default &pinctrl_qspi0_dat_default>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
flash@0 { flash@0 {
compatible = "jedec,spi-nor"; compatible = "jedec,spi-nor";
@ -95,7 +95,7 @@
spi-max-frequency = <83000000>; spi-max-frequency = <83000000>;
spi-rx-bus-width = <4>; spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>; spi-tx-bus-width = <4>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
@ -104,13 +104,13 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0_default>; pinctrl-0 = <&pinctrl_spi0_default>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
spi_flash@0 { spi_flash@0 {
compatible = "jedec,spi-nor"; compatible = "jedec,spi-nor";
reg = <0>; reg = <0>;
spi-max-frequency = <50000000>; spi-max-frequency = <50000000>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
@ -129,7 +129,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>; pinctrl-0 = <&pinctrl_uart1_default>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
}; };
i2c1: i2c@fc028000 { i2c1: i2c@fc028000 {
@ -208,7 +208,7 @@
pinmux = <PIN_PA22__QSPI0_SCK>, pinmux = <PIN_PA22__QSPI0_SCK>,
<PIN_PA23__QSPI0_CS>; <PIN_PA23__QSPI0_CS>;
bias-disable; bias-disable;
u-boot,dm-pre-reloc; bootph-all;
}; };
pinctrl_qspi0_dat_default: qspi0_dat_default { pinctrl_qspi0_dat_default: qspi0_dat_default {
@ -217,7 +217,7 @@
<PIN_PA26__QSPI0_IO2>, <PIN_PA26__QSPI0_IO2>,
<PIN_PA27__QSPI0_IO3>; <PIN_PA27__QSPI0_IO3>;
bias-pull-up; bias-pull-up;
u-boot,dm-pre-reloc; bootph-all;
}; };
pinctrl_sdmmc0_default: sdmmc0_default { pinctrl_sdmmc0_default: sdmmc0_default {
@ -232,7 +232,7 @@
<PIN_PA8__SDMMC0_DAT6>, <PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>; <PIN_PA9__SDMMC0_DAT7>;
bias-pull-up; bias-pull-up;
u-boot,dm-pre-reloc; bootph-all;
}; };
ck_cd_default { ck_cd_default {
@ -241,7 +241,7 @@
<PIN_PA11__SDMMC0_VDDSEL>, <PIN_PA11__SDMMC0_VDDSEL>,
<PIN_PA13__SDMMC0_CD>; <PIN_PA13__SDMMC0_CD>;
bias-disable; bias-disable;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
@ -253,14 +253,14 @@
<PIN_PA20__SDMMC1_DAT2>, <PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>; <PIN_PA21__SDMMC1_DAT3>;
bias-pull-up; bias-pull-up;
u-boot,dm-pre-reloc; bootph-all;
}; };
ck_cd { ck_cd {
pinmux = <PIN_PA22__SDMMC1_CK>, pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>; <PIN_PA30__SDMMC1_CD>;
bias-disable; bias-disable;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
@ -269,14 +269,14 @@
<PIN_PA15__SPI0_MOSI>, <PIN_PA15__SPI0_MOSI>,
<PIN_PA16__SPI0_MISO>; <PIN_PA16__SPI0_MISO>;
bias-disable; bias-disable;
u-boot,dm-pre-reloc; bootph-all;
}; };
pinctrl_uart1_default: uart1_default { pinctrl_uart1_default: uart1_default {
pinmux = <PIN_PD2__URXD1>, pinmux = <PIN_PD2__URXD1>,
<PIN_PD3__UTXD1>; <PIN_PD3__UTXD1>;
bias-disable; bias-disable;
u-boot,dm-pre-reloc; bootph-all;
}; };
pinctrl_usb_default: usb_default { pinctrl_usb_default: usb_default {

View file

@ -14,7 +14,7 @@
compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5"; compatible = "atmel,sama5d3-xplained", "atmel,sama5d3", "atmel,sama5";
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
stdout-path = &dbgu; stdout-path = &dbgu;
}; };
@ -51,7 +51,7 @@
ahb { ahb {
apb { apb {
mmc0: mmc@f0000000 { mmc0: mmc@f0000000 {
u-boot,dm-pre-reloc; bootph-all;
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd>; pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7 &pinctrl_mmc0_cd>;
vmmc-supply = <&vcc_mmc0_reg>; vmmc-supply = <&vcc_mmc0_reg>;
vqmmc-supply = <&vcc_3v3_reg>; vqmmc-supply = <&vcc_3v3_reg>;
@ -64,7 +64,7 @@
}; };
mmc1: mmc@f8000000 { mmc1: mmc@f8000000 {
u-boot,dm-pre-reloc; bootph-all;
vmmc-supply = <&vcc_3v3_reg>; vmmc-supply = <&vcc_3v3_reg>;
vqmmc-supply = <&vcc_3v3_reg>; vqmmc-supply = <&vcc_3v3_reg>;
status = "disabled"; status = "disabled";
@ -215,13 +215,13 @@
}; };
dbgu: serial@ffffee00 { dbgu: serial@ffffee00 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };
pinctrl@fffff200 { pinctrl@fffff200 {
board { board {
u-boot,dm-pre-reloc; bootph-all;
pinctrl_i2c0_pu: i2c0_pu { pinctrl_i2c0_pu: i2c0_pu {
atmel,pins = atmel,pins =
<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
@ -240,13 +240,13 @@
}; };
pinctrl_mmc0_cd: mmc0_cd { pinctrl_mmc0_cd: mmc0_cd {
u-boot,dm-pre-reloc; bootph-all;
atmel,pins = atmel,pins =
<AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; <AT91_PIOE 0 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
}; };
pinctrl_mmc1_cd: mmc1_cd { pinctrl_mmc1_cd: mmc1_cd {
u-boot,dm-pre-reloc; bootph-all;
atmel,pins = atmel,pins =
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
}; };

View file

@ -54,7 +54,7 @@
}; };
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
stdout-path = &usart3; stdout-path = &usart3;
}; };
@ -92,10 +92,10 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>; pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
display-timings { display-timings {
u-boot,dm-pre-reloc; bootph-all;
480x272 { 480x272 {
clock-frequency = <9000000>; clock-frequency = <9000000>;
hactive = <480>; hactive = <480>;
@ -106,17 +106,17 @@
vfront-porch = <2>; vfront-porch = <2>;
vback-porch = <2>; vback-porch = <2>;
vsync-len = <11>; vsync-len = <11>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };
spi0: spi@f8010000 { spi0: spi@f8010000 {
u-boot,dm-pre-reloc; bootph-all;
cs-gpios = <&pioC 3 0>, <0>, <0>, <0>; cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
status = "okay"; status = "okay";
spi_flash@0 { spi_flash@0 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "jedec,spi-nor"; compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>; spi-max-frequency = <50000000>;
reg = <0>; reg = <0>;
@ -146,7 +146,7 @@
}; };
mmc1: mmc@fc000000 { mmc1: mmc@fc000000 {
u-boot,dm-pre-reloc; bootph-all;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
vmmc-supply = <&vcc_mmc1_reg>; vmmc-supply = <&vcc_mmc1_reg>;
@ -160,7 +160,7 @@
}; };
usart3: serial@fc00c000 { usart3: serial@fc00c000 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };
@ -193,9 +193,9 @@
pinctrl@fc06a000 { pinctrl@fc06a000 {
board { board {
u-boot,dm-pre-reloc; bootph-all;
pinctrl_mmc1_cd: mmc1_cd { pinctrl_mmc1_cd: mmc1_cd {
u-boot,dm-pre-reloc; bootph-all;
atmel,pins = atmel,pins =
<AT91_PIOE 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; <AT91_PIOE 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
}; };

View file

@ -54,7 +54,7 @@
}; };
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
stdout-path = &usart3; stdout-path = &usart3;
}; };
@ -82,10 +82,10 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>; pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
display-timings { display-timings {
u-boot,dm-pre-reloc; bootph-all;
800x480 { 800x480 {
clock-frequency = <33260000>; clock-frequency = <33260000>;
hactive = <800>; hactive = <800>;
@ -96,7 +96,7 @@
vfront-porch = <23>; vfront-porch = <23>;
vback-porch = <22>; vback-porch = <22>;
vsync-len = <5>; vsync-len = <5>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };
@ -132,11 +132,11 @@
}; };
spi0: spi@f8010000 { spi0: spi@f8010000 {
u-boot,dm-pre-reloc; bootph-all;
cs-gpios = <&pioC 3 0>, <0>, <0>, <0>; cs-gpios = <&pioC 3 0>, <0>, <0>, <0>;
status = "okay"; status = "okay";
spi_flash@0 { spi_flash@0 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "jedec,spi-nor"; compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>; spi-max-frequency = <50000000>;
reg = <0>; reg = <0>;
@ -186,7 +186,7 @@
}; };
mmc1: mmc@fc000000 { mmc1: mmc@fc000000 {
u-boot,dm-pre-reloc; bootph-all;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>;
status = "okay"; status = "okay";
@ -202,7 +202,7 @@
}; };
usart3: serial@fc00c000 { usart3: serial@fc00c000 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };
@ -216,7 +216,7 @@
pinctrl@fc06a000 { pinctrl@fc06a000 {
board { board {
u-boot,dm-pre-reloc; bootph-all;
pinctrl_macb0_phy_irq: macb0_phy_irq { pinctrl_macb0_phy_irq: macb0_phy_irq {
atmel,pins = atmel,pins =
<AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
@ -226,7 +226,7 @@
<AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; <AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
}; };
pinctrl_mmc1_cd: mmc1_cd { pinctrl_mmc1_cd: mmc1_cd {
u-boot,dm-pre-reloc; bootph-all;
atmel,pins = atmel,pins =
<AT91_PIOE 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; <AT91_PIOE 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
}; };

View file

@ -16,7 +16,7 @@
/ { / {
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
}; };
utmi { utmi {
@ -68,7 +68,7 @@
}; };
soc { soc {
u-boot,dm-pre-reloc; bootph-all;
usb2: usb@400000 { usb2: usb@400000 {
compatible = "microchip,sama7g5-ohci", "usb-ohci"; compatible = "microchip,sama7g5-ohci", "usb-ohci";
@ -96,23 +96,23 @@
}; };
&main_rc { &main_rc {
u-boot,dm-pre-reloc; bootph-all;
}; };
&main_xtal { &main_xtal {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pioA { &pioA {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pinctrl_flx3_default { &pinctrl_flx3_default {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pioA { &pioA {
u-boot,dm-pre-reloc; bootph-all;
pinctrl_usb_default: usb_default { pinctrl_usb_default: usb_default {
pinmux = <PIN_PC6__GPIO>; pinmux = <PIN_PC6__GPIO>;
@ -121,23 +121,23 @@
}; };
&pit64b0 { &pit64b0 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&pmc { &pmc {
u-boot,dm-pre-reloc; bootph-all;
}; };
&slow_rc_osc { &slow_rc_osc {
u-boot,dm-pre-reloc; bootph-all;
}; };
&slow_xtal { &slow_xtal {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart3 { &uart3 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&usb2 { &usb2 {

View file

@ -18,7 +18,7 @@
compatible = "atmel,at91sam9260", "atmel,at91sam9"; compatible = "atmel,at91sam9260", "atmel,at91sam9";
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
stdout-path = &dbgu; stdout-path = &dbgu;
}; };
@ -49,7 +49,7 @@
}; };
dbgu: serial@fffff200 { dbgu: serial@fffff200 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -77,14 +77,14 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
apb { apb {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
aic: interrupt-controller@fffff000 { aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>; #interrupt-cells = <3>;
@ -107,7 +107,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
u-boot,dm-pre-reloc; bootph-all;
main_osc: main_osc { main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc"; compatible = "atmel,at91rm9200-clk-main-osc";
@ -165,7 +165,7 @@
clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 105000000>; atmel,clk-output-range = <0 105000000>;
atmel,clk-divisors = <1 2 4 0>; atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc; bootph-all;
}; };
usb: usbck { usb: usbck {
@ -230,24 +230,24 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&mck>; clocks = <&mck>;
u-boot,dm-pre-reloc; bootph-all;
pioA_clk: pioA_clk@2 { pioA_clk: pioA_clk@2 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <2>; reg = <2>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioB_clk: pioB_clk@3 { pioB_clk: pioB_clk@3 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <3>; reg = <3>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioC_clk: pioC_clk@4 { pioC_clk: pioC_clk@4 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <4>; reg = <4>;
u-boot,dm-pre-reloc; bootph-all;
}; };
adc_clk: adc_clk@5 { adc_clk: adc_clk@5 {
@ -410,7 +410,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioA_clk>; clocks = <&pioA_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioB: gpio@fffff600 { pioB: gpio@fffff600 {
@ -422,7 +422,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioB_clk>; clocks = <&pioB_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioC: gpio@fffff800 { pioC: gpio@fffff800 {
@ -434,7 +434,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioC_clk>; clocks = <&pioC_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pinctrl: pinctrl@fffff400 { pinctrl: pinctrl@fffff400 {
@ -453,11 +453,11 @@
0xffffffff 0x7fff3ccf /* pioB */ 0xffffffff 0x7fff3ccf /* pioB */
0xffffffff 0x007fffff /* pioC */ 0xffffffff 0x007fffff /* pioC */
>; >;
u-boot,dm-pre-reloc; bootph-all;
/* shared pinctrl settings */ /* shared pinctrl settings */
dbgu { dbgu {
u-boot,dm-pre-reloc; bootph-all;
pinctrl_dbgu: dbgu-0 { pinctrl_dbgu: dbgu-0 {
atmel,pins = atmel,pins =
<AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */ <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */

View file

@ -50,7 +50,7 @@
compatible = "atmel,at91sam9260ek", "atmel,at91sam9260", "atmel,at91sam9"; compatible = "atmel,at91sam9260ek", "atmel,at91sam9260", "atmel,at91sam9";
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
stdout-path = &dbgu; stdout-path = &dbgu;
}; };
@ -124,7 +124,7 @@
}; };
dbgu: serial@fffff200 { dbgu: serial@fffff200 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -68,7 +68,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
usb0: ohci@00500000 { usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci"; compatible = "atmel,at91rm9200-ohci", "usb-ohci";
@ -111,7 +111,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
tcb0: timer@fffa0000 { tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb"; compatible = "atmel,at91rm9200-tcb";
@ -295,7 +295,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioA_clk>; clocks = <&pioA_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioB: gpio@fffff600 { pioB: gpio@fffff600 {
@ -307,7 +307,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioB_clk>; clocks = <&pioB_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioC: gpio@fffff800 { pioC: gpio@fffff800 {
@ -319,7 +319,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioC_clk>; clocks = <&pioC_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pinctrl@fffff400 { pinctrl@fffff400 {
@ -336,11 +336,11 @@
<0xffffffff 0xfffffff7>, /* pioA */ <0xffffffff 0xfffffff7>, /* pioA */
<0xffffffff 0xfffffff4>, /* pioB */ <0xffffffff 0xfffffff4>, /* pioB */
<0xffffffff 0xffffff07>; /* pioC */ <0xffffffff 0xffffff07>; /* pioC */
u-boot,dm-pre-reloc; bootph-all;
/* shared pinctrl settings */ /* shared pinctrl settings */
dbgu { dbgu {
u-boot,dm-pre-reloc; bootph-all;
pinctrl_dbgu: dbgu-0 { pinctrl_dbgu: dbgu-0 {
atmel,pins = atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
@ -583,7 +583,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
u-boot,dm-pre-reloc; bootph-all;
main_osc: main_osc { main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc"; compatible = "atmel,at91rm9200-clk-main-osc";
@ -628,7 +628,7 @@
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 94000000>; atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 0>; atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc; bootph-all;
}; };
usb: usbck { usb: usbck {
@ -729,24 +729,24 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&mck>; clocks = <&mck>;
u-boot,dm-pre-reloc; bootph-all;
pioA_clk: pioA_clk@2 { pioA_clk: pioA_clk@2 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <2>; reg = <2>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioB_clk: pioB_clk@3 { pioB_clk: pioB_clk@3 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <3>; reg = <3>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioC_clk: pioC_clk@4 { pioC_clk: pioC_clk@4 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <4>; reg = <4>;
u-boot,dm-pre-reloc; bootph-all;
}; };
usart0_clk: usart0_clk@6 { usart0_clk: usart0_clk@6 {

View file

@ -75,14 +75,14 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
apb { apb {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
aic: interrupt-controller@fffff000 { aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>; #interrupt-cells = <3>;
@ -100,7 +100,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
u-boot,dm-pre-reloc; bootph-all;
main_osc: main_osc { main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc"; compatible = "atmel,at91rm9200-clk-main-osc";
@ -146,7 +146,7 @@
clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
atmel,clk-output-range = <0 120000000>; atmel,clk-output-range = <0 120000000>;
atmel,clk-divisors = <1 2 4 0>; atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc; bootph-all;
}; };
usb: usbck { usb: usbck {
@ -235,24 +235,24 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&mck>; clocks = <&mck>;
u-boot,dm-pre-reloc; bootph-all;
pioA_clk: pioA_clk@2 { pioA_clk: pioA_clk@2 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <2>; reg = <2>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioB_clk: pioB_clk@3 { pioB_clk: pioB_clk@3 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <3>; reg = <3>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioCDE_clk: pioCDE_clk@4 { pioCDE_clk: pioCDE_clk@4 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <4>; reg = <4>;
u-boot,dm-pre-reloc; bootph-all;
}; };
usart0_clk: usart0_clk@7 { usart0_clk: usart0_clk@7 {
@ -730,7 +730,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioA_clk>; clocks = <&pioA_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioB: gpio@fffff400 { pioB: gpio@fffff400 {
@ -742,7 +742,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioB_clk>; clocks = <&pioB_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioC: gpio@fffff600 { pioC: gpio@fffff600 {
@ -754,7 +754,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioCDE_clk>; clocks = <&pioCDE_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioD: gpio@fffff800 { pioD: gpio@fffff800 {
@ -766,7 +766,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioCDE_clk>; clocks = <&pioCDE_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioE: gpio@fffffa00 { pioE: gpio@fffffa00 {
@ -778,7 +778,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioCDE_clk>; clocks = <&pioCDE_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
dbgu: serial@ffffee00 { dbgu: serial@ffffee00 {

View file

@ -15,7 +15,7 @@
chosen { chosen {
bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs"; bootargs = "mem=64M root=/dev/mtdblock5 rw rootfstype=ubifs";
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc; bootph-all;
}; };
memory { memory {
@ -35,7 +35,7 @@
ahb { ahb {
apb { apb {
dbgu: serial@ffffee00 { dbgu: serial@ffffee00 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -18,7 +18,7 @@
ahb { ahb {
apb { apb {
hlcdc: hlcdc@f8038000 { hlcdc: hlcdc@f8038000 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };
}; };

View file

@ -18,7 +18,7 @@
compatible = "atmel,at91sam9g20", "atmel,at91sam9"; compatible = "atmel,at91sam9g20", "atmel,at91sam9";
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
stdout-path = &dbgu; stdout-path = &dbgu;
}; };
@ -58,7 +58,7 @@
}; };
&pinctrl { &pinctrl {
u-boot,dm-pre-reloc; bootph-all;
board { board {
pinctrl_pck0_as_mck: pck0_as_mck { pinctrl_pck0_as_mck: pck0_as_mck {
atmel,pins = atmel,pins =
@ -114,7 +114,7 @@
}; };
&watchdog { &watchdog {
u-boot,dm-pre-reloc; bootph-all;
timeout-sec = <15>; timeout-sec = <15>;
status = "okay"; status = "okay";
}; };

View file

@ -9,7 +9,7 @@
/ { / {
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
stdout-path = &dbgu; stdout-path = &dbgu;
}; };
@ -47,7 +47,7 @@
}; };
dbgu: serial@fffff200 { dbgu: serial@fffff200 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0+ // SPDX-License-Identifier: GPL-2.0+
&dbgu { &dbgu {
u-boot,dm-pre-reloc; bootph-all;
}; };

View file

@ -23,7 +23,7 @@
}; };
hlcdc: hlcdc@f8038000 { hlcdc: hlcdc@f8038000 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };
}; };

View file

@ -17,7 +17,7 @@
compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9"; compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
chosen { chosen {
u-boot,dm-pre-reloc; bootph-all;
stdout-path = &dbgu; stdout-path = &dbgu;
}; };
@ -38,7 +38,7 @@
ahb { ahb {
apb { apb {
dbgu: serial@ffffee00 { dbgu: serial@ffffee00 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -32,10 +32,10 @@
}; };
ahb { ahb {
u-boot,dm-pre-reloc; bootph-all;
fb@0x00500000 { fb@0x00500000 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
display-timings { display-timings {
rev1 { rev1 {

View file

@ -81,14 +81,14 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
apb { apb {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
aic: interrupt-controller@fffff000 { aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>; #interrupt-cells = <3>;
@ -120,7 +120,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
u-boot,dm-pre-reloc; bootph-all;
main_osc: main_osc { main_osc: main_osc {
compatible = "atmel,at91rm9200-clk-main-osc"; compatible = "atmel,at91rm9200-clk-main-osc";
@ -173,7 +173,7 @@
clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>; clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
atmel,clk-output-range = <0 133333333>; atmel,clk-output-range = <0 133333333>;
atmel,clk-divisors = <1 2 4 3>; atmel,clk-divisors = <1 2 4 3>;
u-boot,dm-pre-reloc; bootph-all;
}; };
usb: usbck { usb: usbck {
@ -441,7 +441,7 @@
0xfffff800 0x200 0xfffff800 0x200
0xfffffa00 0x200 0xfffffa00 0x200
>; >;
u-boot,dm-pre-reloc; bootph-all;
atmel,mux-mask = < atmel,mux-mask = <
/* A B */ /* A B */
@ -484,7 +484,7 @@
}; };
dbgu { dbgu {
u-boot,dm-pre-reloc; bootph-all;
pinctrl_dbgu: dbgu-0 { pinctrl_dbgu: dbgu-0 {
atmel,pins = atmel,pins =
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP

View file

@ -17,7 +17,7 @@
chosen { chosen {
bootargs = "mem=64M root=/dev/mtdblock1 rw rootfstype=jffs2"; bootargs = "mem=64M root=/dev/mtdblock1 rw rootfstype=jffs2";
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc; bootph-all;
}; };
memory { memory {
@ -38,7 +38,7 @@
apb { apb {
dbgu: serial@ffffee00 { dbgu: serial@ffffee00 {
status = "okay"; status = "okay";
u-boot,dm-pre-reloc; bootph-all;
}; };
usart1: serial@fff90000 { usart1: serial@fff90000 {

View file

@ -72,14 +72,14 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
apb { apb {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
aic: interrupt-controller@fffff000 { aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>; #interrupt-cells = <3>;
@ -104,7 +104,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
u-boot,dm-pre-reloc; bootph-all;
main_rc_osc: main_rc_osc { main_rc_osc: main_rc_osc {
compatible = "atmel,at91sam9x5-clk-main-rc-osc"; compatible = "atmel,at91sam9x5-clk-main-rc-osc";
@ -171,7 +171,7 @@
atmel,clk-output-range = <0 133333333>; atmel,clk-output-range = <0 133333333>;
atmel,clk-divisors = <1 2 4 3>; atmel,clk-divisors = <1 2 4 3>;
atmel,master-clk-have-div3-pres; atmel,master-clk-have-div3-pres;
u-boot,dm-pre-reloc; bootph-all;
}; };
usb: usbck { usb: usbck {
@ -247,18 +247,18 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&mck>; clocks = <&mck>;
u-boot,dm-pre-reloc; bootph-all;
pioAB_clk: pioAB_clk@2 { pioAB_clk: pioAB_clk@2 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <2>; reg = <2>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioCD_clk: pioCD_clk@3 { pioCD_clk: pioCD_clk@3 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <3>; reg = <3>;
u-boot,dm-pre-reloc; bootph-all;
}; };
fuse_clk: fuse_clk@4 { fuse_clk: fuse_clk@4 {
@ -505,11 +505,11 @@
0xfdffffff 0x07c00000 0xb83fffff /* pioC */ 0xfdffffff 0x07c00000 0xb83fffff /* pioC */
0x003fffff 0x003f8000 0x00000000 /* pioD */ 0x003fffff 0x003f8000 0x00000000 /* pioD */
>; >;
u-boot,dm-pre-reloc; bootph-all;
/* shared pinctrl settings */ /* shared pinctrl settings */
dbgu { dbgu {
u-boot,dm-pre-reloc; bootph-all;
pinctrl_dbgu: dbgu-0 { pinctrl_dbgu: dbgu-0 {
atmel,pins = atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
@ -806,7 +806,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioAB_clk>; clocks = <&pioAB_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioB: gpio@fffff600 { pioB: gpio@fffff600 {
@ -818,7 +818,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioAB_clk>; clocks = <&pioAB_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioC: gpio@fffff800 { pioC: gpio@fffff800 {
@ -830,7 +830,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioCD_clk>; clocks = <&pioCD_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioD: gpio@fffffa00 { pioD: gpio@fffffa00 {
@ -842,7 +842,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioCD_clk>; clocks = <&pioCD_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
dbgu: serial@fffff200 { dbgu: serial@fffff200 {

View file

@ -16,7 +16,7 @@
chosen { chosen {
bootargs = "root=/dev/mtdblock1 rw rootfstype=jffs2"; bootargs = "root=/dev/mtdblock1 rw rootfstype=jffs2";
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc; bootph-all;
}; };
memory { memory {
@ -36,7 +36,7 @@
ahb { ahb {
apb { apb {
dbgu: serial@fffff200 { dbgu: serial@fffff200 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -78,7 +78,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
fb0: fb@00500000 { fb0: fb@00500000 {
compatible = "atmel,at91sam9rl-lcdc"; compatible = "atmel,at91sam9rl-lcdc";
@ -113,7 +113,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
tcb0: timer@fffa0000 { tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb"; compatible = "atmel,at91rm9200-tcb";
@ -398,7 +398,7 @@
<0xffffffff 0x0000c780>, /* pioB */ <0xffffffff 0x0000c780>, /* pioB */
<0xffffffff 0xe3ffff0e>, /* pioC */ <0xffffffff 0xe3ffff0e>, /* pioC */
<0x003fffff 0x0001ff3c>; /* pioD */ <0x003fffff 0x0001ff3c>; /* pioD */
u-boot,dm-pre-reloc; bootph-all;
/* shared pinctrl settings */ /* shared pinctrl settings */
adc0 { adc0 {
@ -440,7 +440,7 @@
}; };
dbgu { dbgu {
u-boot,dm-pre-reloc; bootph-all;
pinctrl_dbgu: dbgu-0 { pinctrl_dbgu: dbgu-0 {
atmel,pins = atmel,pins =
<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
@ -779,7 +779,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioA_clk>; clocks = <&pioA_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioB: gpio@fffff600 { pioB: gpio@fffff600 {
@ -791,7 +791,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioB_clk>; clocks = <&pioB_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioC: gpio@fffff800 { pioC: gpio@fffff800 {
@ -803,7 +803,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioC_clk>; clocks = <&pioC_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioD: gpio@fffffa00 { pioD: gpio@fffffa00 {
@ -815,7 +815,7 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
clocks = <&pioD_clk>; clocks = <&pioD_clk>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pmc: pmc@fffffc00 { pmc: pmc@fffffc00 {
@ -826,7 +826,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
u-boot,dm-pre-reloc; bootph-all;
main: mainck { main: mainck {
compatible = "atmel,at91rm9200-clk-main"; compatible = "atmel,at91rm9200-clk-main";
@ -862,7 +862,7 @@
clocks = <&clk32k>, <&main>, <&plla>, <&utmi>; clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
atmel,clk-output-range = <0 94000000>; atmel,clk-output-range = <0 94000000>;
atmel,clk-divisors = <1 2 4 0>; atmel,clk-divisors = <1 2 4 0>;
u-boot,dm-pre-reloc; bootph-all;
}; };
prog: progck { prog: progck {
@ -909,30 +909,30 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&mck>; clocks = <&mck>;
u-boot,dm-pre-reloc; bootph-all;
pioA_clk: pioA_clk@2 { pioA_clk: pioA_clk@2 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <2>; reg = <2>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioB_clk: pioB_clk@3 { pioB_clk: pioB_clk@3 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <3>; reg = <3>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioC_clk: pioC_clk@4 { pioC_clk: pioC_clk@4 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <4>; reg = <4>;
u-boot,dm-pre-reloc; bootph-all;
}; };
pioD_clk: pioD_clk@5 { pioD_clk: pioD_clk@5 {
#clock-cells = <0>; #clock-cells = <0>;
reg = <5>; reg = <5>;
u-boot,dm-pre-reloc; bootph-all;
}; };
usart0_clk: usart0_clk@6 { usart0_clk: usart0_clk@6 {

View file

@ -15,7 +15,7 @@
chosen { chosen {
bootargs = "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw"; bootargs = "rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw";
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc; bootph-all;
}; };
memory { memory {
@ -162,7 +162,7 @@
}; };
dbgu: serial@fffff200 { dbgu: serial@fffff200 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -22,7 +22,7 @@
status = "okay"; status = "okay";
}; };
hlcdc: hlcdc@f8038000 { hlcdc: hlcdc@f8038000 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };
}; };

View file

@ -81,14 +81,14 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
apb { apb {
compatible = "simple-bus"; compatible = "simple-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges; ranges;
u-boot,dm-pre-reloc; bootph-all;
aic: interrupt-controller@fffff000 { aic: interrupt-controller@fffff000 {
#interrupt-cells = <3>; #interrupt-cells = <3>;
@ -113,7 +113,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
u-boot,dm-pre-reloc; bootph-all;
main_rc_osc: main_rc_osc { main_rc_osc: main_rc_osc {
compatible = "atmel,at91sam9x5-clk-main-rc-osc"; compatible = "atmel,at91sam9x5-clk-main-rc-osc";
@ -176,7 +176,7 @@
atmel,clk-output-range = <0 133333333>; atmel,clk-output-range = <0 133333333>;
atmel,clk-divisors = <1 2 4 3>; atmel,clk-divisors = <1 2 4 3>;
atmel,master-clk-have-div3-pres; atmel,master-clk-have-div3-pres;
u-boot,dm-pre-reloc; bootph-all;
}; };
@ -259,7 +259,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&mck>; clocks = <&mck>;
u-boot,dm-pre-reloc; bootph-all;
pioAB_clk: pioAB_clk@2 { pioAB_clk: pioAB_clk@2 {
@ -466,12 +466,12 @@
0xfffff800 0x200 /* pioC */ 0xfffff800 0x200 /* pioC */
0xfffffa00 0x200 /* pioD */ 0xfffffa00 0x200 /* pioD */
>; >;
u-boot,dm-pre-reloc; bootph-all;
/* shared pinctrl settings */ /* shared pinctrl settings */
dbgu { dbgu {
u-boot,dm-pre-reloc; bootph-all;
pinctrl_dbgu: dbgu-0 { pinctrl_dbgu: dbgu-0 {
atmel,pins = atmel,pins =
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP

View file

@ -31,7 +31,7 @@
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>; pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb888>;
display-timings { display-timings {
u-boot,dm-pre-reloc; bootph-all;
800x480 { 800x480 {
clock-frequency = <24000000>; clock-frequency = <24000000>;
hactive = <800>; hactive = <800>;
@ -42,7 +42,7 @@
vfront-porch = <22>; vfront-porch = <22>;
vback-porch = <21>; vback-porch = <21>;
vsync-len = <2>; vsync-len = <2>;
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };

View file

@ -15,7 +15,7 @@
chosen { chosen {
bootargs = "root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs"; bootargs = "root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
u-boot,dm-pre-reloc; bootph-all;
}; };
ahb { ahb {
@ -47,7 +47,7 @@
}; };
dbgu: serial@fffff200 { dbgu: serial@fffff200 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -27,22 +27,22 @@
&uart0 { &uart0 {
skip-init; skip-init;
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart1 { &uart1 {
skip-init; skip-init;
u-boot,dm-pre-reloc; bootph-all;
}; };
&gpio { &gpio {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart0_gpio14 { &uart0_gpio14 {
u-boot,dm-pre-reloc; bootph-all;
}; };
&uart1_gpio14 { &uart1_gpio14 {
u-boot,dm-pre-reloc; bootph-all;
}; };

View file

@ -74,7 +74,7 @@
}; };
clocks { clocks {
u-boot,dm-pre-reloc; bootph-all;
periph_clk: periph-clk { periph_clk: periph-clk {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
@ -134,7 +134,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>; ranges = <0x0 0x0 0xff800000 0x800000>;
u-boot,dm-pre-reloc; bootph-all;
uart0: serial@12000 { uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell"; compatible = "arm,pl011", "arm,primecell";

View file

@ -65,7 +65,7 @@
}; };
clocks: clocks { clocks: clocks {
u-boot,dm-pre-reloc; bootph-all;
periph_clk: periph-clk { periph_clk: periph-clk {
compatible = "fixed-clock"; compatible = "fixed-clock";
@ -126,7 +126,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0xff800000 0x800000>; ranges = <0 0xff800000 0x800000>;
u-boot,dm-pre-reloc; bootph-all;
uart0: serial@12000 { uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell"; compatible = "arm,pl011", "arm,primecell";

View file

@ -55,7 +55,7 @@
}; };
clocks: clocks { clocks: clocks {
u-boot,dm-pre-reloc; bootph-all;
periph_clk:periph-clk { periph_clk:periph-clk {
compatible = "fixed-clock"; compatible = "fixed-clock";
@ -109,7 +109,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>; ranges = <0x0 0x0 0xff800000 0x800000>;
u-boot,dm-pre-reloc; bootph-all;
uart0: serial@640 { uart0: serial@640 {
compatible = "brcm,bcm6345-uart"; compatible = "brcm,bcm6345-uart";

View file

@ -74,7 +74,7 @@
}; };
clocks { clocks {
u-boot,dm-pre-reloc; bootph-all;
periph_clk: periph_clk { periph_clk: periph_clk {
compatible = "fixed-clock"; compatible = "fixed-clock";
@ -128,7 +128,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>; ranges = <0x0 0x0 0xff800000 0x800000>;
u-boot,dm-pre-reloc; bootph-all;
uart0: serial@640 { uart0: serial@640 {
compatible = "brcm,bcm6345-uart"; compatible = "brcm,bcm6345-uart";

View file

@ -28,7 +28,7 @@
}; };
&uart0 { &uart0 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -26,7 +26,7 @@
}; };
&uart0 { &uart0 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -26,7 +26,7 @@
}; };
&uart0 { &uart0 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -70,13 +70,13 @@
}; };
&sdhci0 { &sdhci0 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
disable-wp; disable-wp;
}; };
&uart1 { &uart1 {
u-boot,dm-pre-reloc; bootph-all;
status = "okay"; status = "okay";
}; };

View file

@ -40,7 +40,7 @@
}; };
uart0: serial@0xf4329148 { uart0: serial@0xf4329148 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "cortina,ca-uart"; compatible = "cortina,ca-uart";
reg = <0x0 0xf4329148 0x30>; reg = <0x0 0xf4329148 0x30>;
status = "okay"; status = "okay";

View file

@ -8,7 +8,7 @@
/ { / {
soc@1c00000 { soc@1c00000 {
u-boot,dm-spl; bootph-pre-ram;
}; };
nand { nand {
@ -16,7 +16,7 @@
}; };
panel { panel {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
@ -29,17 +29,17 @@
}; };
&mmc0 { &mmc0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&serial2 { &serial2 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&spi1 { &spi1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&gpio { &gpio {
u-boot,dm-spl; bootph-pre-ram;
}; };

View file

@ -13,7 +13,7 @@
}; };
soc@1c00000 { soc@1c00000 {
u-boot,dm-spl; bootph-pre-ram;
}; };
nand { nand {
@ -22,13 +22,13 @@
}; };
&mmc0 { &mmc0 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&serial2 { &serial2 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&gpio { &gpio {
u-boot,dm-spl; bootph-pre-ram;
}; };

View file

@ -7,6 +7,6 @@
/ { / {
ocp { ocp {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };

View file

@ -15,38 +15,38 @@
}; };
&mmc2_pins_default { &mmc2_pins_default {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_pins_hs { &mmc2_pins_hs {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_pins_ddr_rev20 { &mmc2_pins_ddr_rev20 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_pins_hs200 { &mmc2_pins_hs200 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_iodelay_hs200_rev20_conf { &mmc2_iodelay_hs200_rev20_conf {
u-boot,dm-spl; bootph-pre-ram;
}; };
&omap_dwc3_1 { &omap_dwc3_1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb1 { &usb1 {
u-boot,dm-spl; bootph-pre-ram;
dr_mode = "peripheral"; dr_mode = "peripheral";
}; };
&usb2_phy1 { &usb2_phy1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb3_phy1 { &usb3_phy1 {
u-boot,dm-spl; bootph-pre-ram;
}; };

View file

@ -9,7 +9,7 @@
}; };
fs_loader0: fs_loader@0 { fs_loader0: fs_loader@0 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "u-boot,fs-loader"; compatible = "u-boot,fs-loader";
phandlepart = <&mmc1 1>; phandlepart = <&mmc1 1>;
}; };
@ -18,14 +18,14 @@
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
u-boot,dm-spl; bootph-pre-ram;
ipu2_memory_region: ipu2-memory@95800000 { ipu2_memory_region: ipu2-memory@95800000 {
compatible = "shared-dma-pool"; compatible = "shared-dma-pool";
reg = <0x0 0x95800000 0x0 0x3800000>; reg = <0x0 0x95800000 0x0 0x3800000>;
reusable; reusable;
status = "okay"; status = "okay";
u-boot,dm-spl; bootph-pre-ram;
}; };
ipu1_memory_region: ipu1-memory@9d000000 { ipu1_memory_region: ipu1-memory@9d000000 {
@ -33,81 +33,81 @@
reg = <0x0 0x9d000000 0x0 0x2000000>; reg = <0x0 0x9d000000 0x0 0x2000000>;
reusable; reusable;
status = "okay"; status = "okay";
u-boot,dm-spl; bootph-pre-ram;
}; };
ipu1_pgtbl: ipu1-pgtbl@95700000 { ipu1_pgtbl: ipu1-pgtbl@95700000 {
reg = <0x0 0x95700000 0x0 0x40000>; reg = <0x0 0x95700000 0x0 0x40000>;
no-map; no-map;
u-boot,dm-spl; bootph-pre-ram;
}; };
ipu2_pgtbl: ipu2-pgtbl@95740000 { ipu2_pgtbl: ipu2-pgtbl@95740000 {
reg = <0x0 0x95740000 0x0 0x40000>; reg = <0x0 0x95740000 0x0 0x40000>;
no-map; no-map;
u-boot,dm-spl; bootph-pre-ram;
}; };
}; };
}; };
&timer3 { &timer3 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&timer4 { &timer4 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&timer7 { &timer7 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&timer8 { &timer8 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&timer9 { &timer9 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&timer11 { &timer11 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmu_ipu1 { &mmu_ipu1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmu_ipu2 { &mmu_ipu2 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&ipu1 { &ipu1 {
status = "okay"; status = "okay";
memory-region = <&ipu1_memory_region>; memory-region = <&ipu1_memory_region>;
pg-tbl = <&ipu1_pgtbl>; pg-tbl = <&ipu1_pgtbl>;
u-boot,dm-spl; bootph-pre-ram;
}; };
&ipu2 { &ipu2 {
status = "okay"; status = "okay";
memory-region = <&ipu2_memory_region>; memory-region = <&ipu2_memory_region>;
pg-tbl = <&ipu2_pgtbl>; pg-tbl = <&ipu2_pgtbl>;
u-boot,dm-spl; bootph-pre-ram;
}; };
&l4_wkup { &l4_wkup {
u-boot,dm-spl; bootph-pre-ram;
}; };
&prm { &prm {
u-boot,dm-spl; bootph-pre-ram;
}; };
&ipu1_rst { &ipu1_rst {
u-boot,dm-spl; bootph-pre-ram;
}; };
&ipu2_rst { &ipu2_rst {
u-boot,dm-spl; bootph-pre-ram;
}; };

View file

@ -23,42 +23,42 @@
}; };
&mmc2_pins_default { &mmc2_pins_default {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_pins_hs { &mmc2_pins_hs {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_pins_ddr_rev20 { &mmc2_pins_ddr_rev20 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_iodelay_ddr_conf { &mmc2_iodelay_ddr_conf {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_pins_hs200 { &mmc2_pins_hs200 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_iodelay_hs200_rev20_conf { &mmc2_iodelay_hs200_rev20_conf {
u-boot,dm-spl; bootph-pre-ram;
}; };
&omap_dwc3_1 { &omap_dwc3_1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb1 { &usb1 {
u-boot,dm-spl; bootph-pre-ram;
dr_mode = "peripheral"; dr_mode = "peripheral";
}; };
&usb2_phy1 { &usb2_phy1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb3_phy1 { &usb3_phy1 {
u-boot,dm-spl; bootph-pre-ram;
}; };

View file

@ -23,42 +23,42 @@
}; };
&mmc2_pins_default { &mmc2_pins_default {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_pins_hs { &mmc2_pins_hs {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_pins_ddr_rev20 { &mmc2_pins_ddr_rev20 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_iodelay_ddr_conf { &mmc2_iodelay_ddr_conf {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_pins_hs200 { &mmc2_pins_hs200 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_iodelay_hs200_rev20_conf { &mmc2_iodelay_hs200_rev20_conf {
u-boot,dm-spl; bootph-pre-ram;
}; };
&omap_dwc3_1 { &omap_dwc3_1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb1 { &usb1 {
u-boot,dm-spl; bootph-pre-ram;
dr_mode = "peripheral"; dr_mode = "peripheral";
}; };
&usb2_phy1 { &usb2_phy1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb3_phy1 { &usb3_phy1 {
u-boot,dm-spl; bootph-pre-ram;
}; };

View file

@ -6,18 +6,18 @@
#include "omap5-u-boot.dtsi" #include "omap5-u-boot.dtsi"
&omap_dwc3_1 { &omap_dwc3_1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb1 { &usb1 {
u-boot,dm-spl; bootph-pre-ram;
dr_mode = "peripheral"; dr_mode = "peripheral";
}; };
&usb2_phy1 { &usb2_phy1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb3_phy1 { &usb3_phy1 {
u-boot,dm-spl; bootph-pre-ram;
}; };

View file

@ -15,30 +15,30 @@
}; };
&mmc2_pins_default { &mmc2_pins_default {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_pins_hs200 { &mmc2_pins_hs200 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&mmc2_iodelay_hs200_conf { &mmc2_iodelay_hs200_conf {
u-boot,dm-spl; bootph-pre-ram;
}; };
&omap_dwc3_1 { &omap_dwc3_1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb1 { &usb1 {
u-boot,dm-spl; bootph-pre-ram;
dr_mode = "peripheral"; dr_mode = "peripheral";
}; };
&usb2_phy1 { &usb2_phy1 {
u-boot,dm-spl; bootph-pre-ram;
}; };
&usb3_phy1 { &usb3_phy1 {
u-boot,dm-spl; bootph-pre-ram;
}; };

View file

@ -8,26 +8,26 @@
/ { / {
smem { smem {
u-boot,dm-pre-reloc; bootph-all;
}; };
soc { soc {
u-boot,dm-pre-reloc; bootph-all;
pinctrl@1000000 { pinctrl@1000000 {
u-boot,dm-pre-reloc; bootph-all;
uart { uart {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
qcom,gcc@1800000 { qcom,gcc@1800000 {
u-boot,dm-pre-reloc; bootph-all;
}; };
serial@78b0000 { serial@78b0000 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };

View file

@ -7,26 +7,26 @@
/ { / {
smem { smem {
u-boot,dm-pre-reloc; bootph-all;
}; };
soc { soc {
u-boot,dm-pre-reloc; bootph-all;
pinctrl@1010000 { pinctrl@1010000 {
u-boot,dm-pre-reloc; bootph-all;
uart { uart {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
clock-controller@300000 { clock-controller@300000 {
u-boot,dm-pre-reloc; bootph-all;
}; };
serial@75b0000 { serial@75b0000 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };

View file

@ -9,18 +9,18 @@
/ /
{ {
soc { soc {
u-boot,dm-pre-reloc; bootph-all;
serial@a84000 { serial@a84000 {
u-boot,dm-pre-reloc; bootph-all;
}; };
clock-controller@100000 { clock-controller@100000 {
u-boot,dm-pre-reloc; bootph-all;
}; };
pinctrl_north@3900000 { pinctrl_north@3900000 {
u-boot,dm-pre-reloc; bootph-all;
}; };
}; };
}; };

View file

@ -137,7 +137,7 @@
}; };
fimd@14400000 { fimd@14400000 {
u-boot,dm-pre-reloc; bootph-all;
compatible = "samsung,exynos-fimd"; compatible = "samsung,exynos-fimd";
reg = <0x14400000 0x10000>; reg = <0x14400000 0x10000>;
#address-cells = <1>; #address-cells = <1>;
@ -218,7 +218,7 @@
compatible = "samsung,exynos4210-uart"; compatible = "samsung,exynos4210-uart";
reg = <0x12C30000 0x100>; reg = <0x12C30000 0x100>;
interrupts = <0 54 0>; interrupts = <0 54 0>;
u-boot,dm-pre-reloc; bootph-all;
id = <3>; id = <3>;
}; };
}; };

View file

@ -31,7 +31,7 @@
}; };
adc@12D10000 { adc@12D10000 {
u-boot,dm-pre-reloc; bootph-all;
vdd-supply = <&ldo4_reg>; vdd-supply = <&ldo4_reg>;
status = "okay"; status = "okay";
}; };

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