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* Code cleanup:

Browse source 
- remove trailing white space, trailing empty lines, C++ comments, etc.
  - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)

* Patches by Kenneth Johansson, 25 Jun 2003:
  - major rework of command structure
    (work done mostly by Michal Cendrowski and Joakim Kristiansen)
This commit is contained in:
wdenk 2003-06-27 21:31:46 +00:00
parent 993cad9364
commit 8bde7f776c
1246 changed files with 46635 additions and 48962 deletions

22
CHANGELOG
View file

@ -1,11 +1,25 @@
======================================================================
Changes since U-Boot 0.3.1:
Changes since U-Boot 0.4.0:
======================================================================
* Code cleanup:
- remove trailing white space, trailing empty lines, C++ comments, etc.
- split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)
* Patches by Kenneth Johansson, 25 Jun 2003:
- major rework of command structure
(work done mostly by Michal Cendrowski and Joakim Kristiansen)
======================================================================
Changes for U-Boot 0.4.0:
======================================================================
* Patches by Robert Schwebel, 26 Jun 2003:
- logdl
- csb226
- innokom
- csb226 configuration updated
- credits for logodl port updated
- innokom configuration updated
- logodl tree update, still with coding style inconsistencies
- added OCM for ppc405 warning to README
* Patch by Pantelis Antoniou, 25 Jun 2003:
update NetVia with V2 board support

10
MAKEALL
View file

@ -45,10 +45,10 @@ LIST_8xx=" \
LIST_4xx=" \
ADCIOP AR405 ASH405 BUBINGA405EP \
CANBT CPCI405 CPCI4052 CPCI405AB \
CPCI440 CPCIISER4 CRAYL1 DASA_SIM \
DU405 EBONY ERIC MIP405 \
MIP405T ML2 OCRTC ORSG \
CANBT CPCI405 CPCI4052 CPCI405AB \
CPCI440 CPCIISER4 CRAYL1 DASA_SIM \
DU405 EBONY ERIC MIP405 \
MIP405T ML2 OCRTC ORSG \
PCI405 PIP405 PMC405 W7OLMC \
W7OLMG WALNUT405 \
"
@ -58,7 +58,7 @@ LIST_4xx=" \
#########################################################################
LIST_824x=" \
A3000 BMW CPC45 CU824 \
A3000 BMW CPC45 CU824 \
MOUSSE MUSENKI OXC PN62 \
Sandpoint8240 Sandpoint8245 utx8245 \
"

3
Makefile
View file

@ -134,7 +134,8 @@ u-boot.dis: u-boot
$(OBJDUMP) -d $< > $@
u-boot: depend subdirs $(OBJS) $(LIBS) $(LDSCRIPT)
$(LD) $(LDFLAGS) $(OBJS) \
UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) |sed -n -e 's/.*\(__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
$(LD) $(LDFLAGS) $$UNDEF_SYM $(OBJS) \
--start-group $(LIBS) --end-group \
-Map u-boot.map -o u-boot

173
README
View file

@ -735,7 +735,7 @@ The following options need to be configured:
(TEAC FD-05PUB).
- MMC Support:
The MMC controller on the Intel PXA is supported. To
The MMC controller on the Intel PXA is supported. To
enable this define CONFIG_MMC. The MMC can be
accessed from the boot prompt by mapping the device
to physical memory similar to flash. Command line is
@ -782,12 +782,12 @@ The following options need to be configured:
or CONFIG_VIDEO_SED13806_16BPP
- Keyboard Support:
CONFIG_KEYBOARD
CONFIG_KEYBOARD
Define this to enable a custom keyboard support.
This simply calls drv_keyboard_init() which must be
defined in your board-specific files.
The only board using this so far is RBC823.
Define this to enable a custom keyboard support.
This simply calls drv_keyboard_init() which must be
defined in your board-specific files.
The only board using this so far is RBC823.
- LCD Support: CONFIG_LCD
@ -834,14 +834,14 @@ The following options need to be configured:
- Spash Screen Support: CONFIG_SPLASH_SCREEN
If this option is set, the environment is checked for
a variable "splashimage". If found, the usual display
of logo, copyright and system information on the LCD
is supressed and the BMP image at the address
specified in "splashimage" is loaded instead. The
console is redirected to the "nulldev", too. This
allows for a "silent" boot where a splash screen is
loaded very quickly after power-on.
If this option is set, the environment is checked for
a variable "splashimage". If found, the usual display
of logo, copyright and system information on the LCD
is supressed and the BMP image at the address
specified in "splashimage" is loaded instead. The
console is redirected to the "nulldev", too. This
allows for a "silent" boot where a splash screen is
loaded very quickly after power-on.
- Ethernet address:
@ -968,14 +968,14 @@ The following options need to be configured:
CFG_I2C_INIT_BOARD
When a board is reset during an i2c bus transfer
chips might think that the current transfer is still
in progress. On some boards it is possible to access
the i2c SCLK line directly, either by using the
processor pin as a GPIO or by having a second pin
connected to the bus. If this option is defined a
custom i2c_init_board() routine in boards/xxx/board.c
is run early in the boot sequence.
When a board is reset during an i2c bus transfer
chips might think that the current transfer is still
in progress. On some boards it is possible to access
the i2c SCLK line directly, either by using the
processor pin as a GPIO or by having a second pin
connected to the bus. If this option is defined a
custom i2c_init_board() routine in boards/xxx/board.c
is run early in the boot sequence.
- SPI Support: CONFIG_SPI
@ -1006,9 +1006,9 @@ The following options need to be configured:
Used to specify the types of FPGA devices. For
example,
#define CONFIG_FPGA CFG_XILINX_VIRTEX2
#define CONFIG_FPGA CFG_XILINX_VIRTEX2
CFG_FPGA_PROG_FEEDBACK
CFG_FPGA_PROG_FEEDBACK
Enable printing of hash marks during FPGA
configuration.
@ -1054,16 +1054,16 @@ The following options need to be configured:
- FPGA Support: CONFIG_FPGA_COUNT
Specify the number of FPGA devices to support.
Specify the number of FPGA devices to support.
CONFIG_FPGA
CONFIG_FPGA
Used to specify the types of FPGA devices. For example,
#define CONFIG_FPGA CFG_XILINX_VIRTEX2
Used to specify the types of FPGA devices. For example,
#define CONFIG_FPGA CFG_XILINX_VIRTEX2
CFG_FPGA_PROG_FEEDBACK
CFG_FPGA_PROG_FEEDBACK
Enable printing of hash marks during FPGA configuration.
Enable printing of hash marks during FPGA configuration.
CFG_FPGA_CHECK_BUSY
@ -1205,13 +1205,13 @@ The following options need to be configured:
Note:
In the current implementation, the local variables
space and global environment variables space are
separated. Local variables are those you define by
simply typing `name=value'. To access a local
variable later on, you have write `$name' or
`${name}'; to execute the contents of a variable
directly type `$name' at the command prompt.
In the current implementation, the local variables
space and global environment variables space are
separated. Local variables are those you define by
simply typing `name=value'. To access a local
variable later on, you have write `$name' or
`${name}'; to execute the contents of a variable
directly type `$name' at the command prompt.
Global environment variables are those you use
setenv/printenv to work with. To run a command stored
@ -1253,9 +1253,9 @@ The following options need to be configured:
- DataFlash Support
CONFIG_HAS_DATAFLASH
Defining this option enables DataFlash features and
allows to read/write in Dataflash via the standard
commands cp, md...
Defining this option enables DataFlash features and
allows to read/write in Dataflash via the standard
commands cp, md...
- Show boot progress
CONFIG_SHOW_BOOT_PROGRESS
@ -1349,8 +1349,6 @@ Modem Support:
See also: doc/README.Modem
Configuration Settings:
-----------------------
@ -1374,16 +1372,16 @@ Configuration Settings:
List of legal baudrate settings for this board.
- CFG_CONSOLE_INFO_QUIET
Suppress display of console information at boot.
Suppress display of console information at boot.
- CFG_CONSOLE_IS_IN_ENV
If the board specific function
extern int overwrite_console (void);
returns 1, the stdin, stderr and stdout are switched to the
If the board specific function
extern int overwrite_console (void);
returns 1, the stdin, stderr and stdout are switched to the
serial port, else the settings in the environment are used.
- CFG_CONSOLE_OVERWRITE_ROUTINE
Enable the call to overwrite_console().
Enable the call to overwrite_console().
- CFG_CONSOLE_ENV_OVERWRITE
Enable overwrite of previous console environment settings.
@ -1393,7 +1391,7 @@ Configuration Settings:
simple memory test.
- CFG_ALT_MEMTEST:
Enable an alternate, more extensive memory test.
Enable an alternate, more extensive memory test.
- CFG_TFTP_LOADADDR:
Default load address for network file downloads
@ -1418,10 +1416,10 @@ Configuration Settings:
CFG_FLASH_BASE when booting from flash.
- CFG_MONITOR_LEN:
Size of memory reserved for monitor code, used to
determine _at_compile_time_ (!) if the environment is
embedded within the U-Boot image, or in a separate
flash sector.
Size of memory reserved for monitor code, used to
determine _at_compile_time_ (!) if the environment is
embedded within the U-Boot image, or in a separate
flash sector.
- CFG_MALLOC_LEN:
Size of DRAM reserved for malloc() use.
@ -1842,7 +1840,6 @@ Note: for some board special configuration names may exist; check if
etc.
Finally, type "make all", and you should get some working U-Boot
images ready for downlod to / installation on your system:
@ -1906,7 +1903,6 @@ or to build on a native PowerPC system you can type
See also "U-Boot Porting Guide" below.
Monitor Commands - Overview:
============================
@ -2029,13 +2025,13 @@ Some configuration options can be set using Environment Variables:
setenv initrd_high 00c00000
If you set initrd_high to 0xFFFFFFFF, this is an
indication to U-Boot that all addresses are legal
for the Linux kernel, including addresses in flash
memory. In this case U-Boot will NOT COPY the
ramdisk at all. This may be useful to reduce the
boot time on your system, but requires that this
feature is supported by your Linux kernel.
If you set initrd_high to 0xFFFFFFFF, this is an
indication to U-Boot that all addresses are legal
for the Linux kernel, including addresses in flash
memory. In this case U-Boot will NOT COPY the
ramdisk at all. This may be useful to reduce the
boot time on your system, but requires that this
feature is supported by your Linux kernel.
ipaddr - IP address; needed for tftpboot command
@ -2165,7 +2161,6 @@ o If neither SROM nor the environment contain a MAC address, an error
is raised.
Image Formats:
==============
@ -2428,7 +2423,6 @@ corruption happened:
Verifying Checksum ... OK
Boot Linux:
-----------
@ -2518,39 +2512,39 @@ More About U-Boot Image Types:
U-Boot supports the following image types:
"Standalone Programs" are directly runnable in the environment
provided by U-Boot; it is expected that (if they behave
well) you can continue to work in U-Boot after return from
the Standalone Program.
provided by U-Boot; it is expected that (if they behave
well) you can continue to work in U-Boot after return from
the Standalone Program.
"OS Kernel Images" are usually images of some Embedded OS which
will take over control completely. Usually these programs
will install their own set of exception handlers, device
drivers, set up the MMU, etc. - this means, that you cannot
expect to re-enter U-Boot except by resetting the CPU.
will take over control completely. Usually these programs
will install their own set of exception handlers, device
drivers, set up the MMU, etc. - this means, that you cannot
expect to re-enter U-Boot except by resetting the CPU.
"RAMDisk Images" are more or less just data blocks, and their
parameters (address, size) are passed to an OS kernel that is
being started.
parameters (address, size) are passed to an OS kernel that is
being started.
"Multi-File Images" contain several images, typically an OS
(Linux) kernel image and one or more data images like
RAMDisks. This construct is useful for instance when you want
to boot over the network using BOOTP etc., where the boot
server provides just a single image file, but you want to get
for instance an OS kernel and a RAMDisk image.
(Linux) kernel image and one or more data images like
RAMDisks. This construct is useful for instance when you want
to boot over the network using BOOTP etc., where the boot
server provides just a single image file, but you want to get
for instance an OS kernel and a RAMDisk image.
"Multi-File Images" start with a list of image sizes, each
image size (in bytes) specified by an "uint32_t" in network
byte order. This list is terminated by an "(uint32_t)0".
Immediately after the terminating 0 follow the images, one by
one, all aligned on "uint32_t" boundaries (size rounded up to
a multiple of 4 bytes).
"Multi-File Images" start with a list of image sizes, each
image size (in bytes) specified by an "uint32_t" in network
byte order. This list is terminated by an "(uint32_t)0".
Immediately after the terminating 0 follow the images, one by
one, all aligned on "uint32_t" boundaries (size rounded up to
a multiple of 4 bytes).
"Firmware Images" are binary images containing firmware (like
U-Boot or FPGA images) which usually will be programmed to
flash memory.
U-Boot or FPGA images) which usually will be programmed to
flash memory.
"Script files" are command sequences that will be executed by
U-Boot's command interpreter; this feature is especially
useful when you configure U-Boot to use a real shell (hush)
as command interpreter.
U-Boot's command interpreter; this feature is especially
useful when you configure U-Boot to use a real shell (hush)
as command interpreter.
Standalone HOWTO:
@ -2641,7 +2635,6 @@ Hit 'q':
[q, b, e, ?] ## Application terminated, rc = 0x0
Minicom warning:
================
@ -2813,7 +2806,6 @@ On ARM, the following registers are used:
==> U-Boot will use R8 to hold a pointer to the global data
Memory Management:
------------------
@ -2959,7 +2951,6 @@ void no_more_time (int sig)
}
Coding Standards:
-----------------

3
board/LEOX/elpt860/Makefile
View file

@ -1,3 +1,4 @@
#######################################################################
#
# Copyright (C) 2000, 2001, 2002, 2003
@ -35,7 +36,7 @@ LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $^
$(AR) crv $@ $(OBJS)
#########################################################################

60
board/LEOX/elpt860/README.LEOX
View file

@ -1,20 +1,20 @@
=============================================================================
U-Boot port on the LEOX's ELPT860 CPU board
-------------------------------------------
U-Boot port on the LEOX's ELPT860 CPU board
-------------------------------------------
LEOX.org is about the development of free hardware and software resources
for system on chip.
for system on chip.
For more information, contact The LEOX team <team@leox.org>
References:
~~~~~~~~~~
1) Get the last stable release from denx.de:
o ftp://ftp.denx.de/pub/u-boot/u-boot-0.2.0.tar.bz2
o ftp://ftp.denx.de/pub/u-boot/u-boot-0.2.0.tar.bz2
2) Get the current CVS snapshot:
o cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login
o cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot
o cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login
o cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot
=============================================================================
@ -42,7 +42,7 @@ U-Boot, at the address of 0x03000000.
=============================================================================
U-Boot test results
U-Boot test results
=============================================================================
@ -54,7 +54,7 @@ U-Boot, at the address of 0x03000000.
U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming ELPT860
DRAM: 16 MB
FLASH: 512 kB
@ -101,7 +101,7 @@ saveenv - save environment variables to persistent storage
setenv - set environment variables
sleep - delay execution for some time
tftpboot- boot image via network using TFTP protocol
and env variables ipaddr and serverip
and env variables ipaddr and serverip
version - print monitor version
? - alias for 'help'
@ -177,7 +177,7 @@ baudrate = 9600 bps
U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming ELPT860
DRAM: 16 MB
FLASH: 512 kB
@ -219,7 +219,7 @@ Hit any key to exit ...
U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming ELPT860
DRAM: 16 MB
FLASH: 512 kB
@ -237,7 +237,7 @@ TFTP from server 192.168.0.1; our IP address is 192.168.0.30
Filename '/home/leox/uImage'.
Load address: 0x400000
Loading: #################################################################
#############################
#############################
done
Bytes transferred = 477294 (7486e hex)
## Booting image at 00400000 ...
@ -282,8 +282,8 @@ Looking up port of RPC 100005/2 on 192.168.0.1
VFS: Mounted root (nfs filesystem).
Freeing unused kernel memory: 44k init
INIT: version 2.78 booting
Welcome to DENX Embedded Linux Environment
Press 'I' to enter interactive startup.
Welcome to DENX Embedded Linux Environment
Press 'I' to enter interactive startup.
Mounting proc filesystem: [ OK ]
Configuring kernel parameters: [ OK ]
Cannot access the Hardware Clock via any known method.
@ -316,7 +316,7 @@ bash-2.04#
U-Boot 0.2.2 (Jan 19 2003 - 11:08:39)
CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***
Board: ### No HW ID - assuming ELPT860
DRAM: 16 MB
FLASH: 512 kB
@ -334,11 +334,11 @@ TFTP from server 192.168.0.1; our IP address is 192.168.0.30
Filename '/home/leox/pMulti'.
Load address: 0x400000
Loading: #################################################################
#################################################################
#################################################################
#################################################################
#################################################################
########################################################
#################################################################
#################################################################
#################################################################
#################################################################
########################################################
done
Bytes transferred = 1947816 (1db8a8 hex)
## Booting image at 00400000 ...
@ -398,22 +398,22 @@ ELPT860 login: root
Password:
Welcome to Linux-2.4.4 for ELPT CPU board (MPC860T @ 50MHz)
a8888b.
d888888b.
8P"YP"Y88
a8888b.
d888888b.
8P"YP"Y88
_ _ 8|o||o|88
| | |_| 8' .88
| | _ ____ _ _ _ _ 8`._.' Y8.
| | | | _ \| | | |\ \/ / d/ `8b.
| |___ | | | | | |_| |/ \ .dP . Y8b.
|_____||_|_| |_|\____|\_/\_/ d8:' " `::88b.
d8" `Y88b
:8P ' :888
8a. : _a88P
._/"Yaa_ : .| 88P|
\ YP" `| 8P `.
/ \._____.d| .'
`--..__)888888P`._.'
d8" `Y88b
:8P ' :888
8a. : _a88P
._/"Yaa_ : .| 88P|
\ YP" `| 8P `.
/ \._____.d| .'
`--..__)888888P`._.'
login[21]: root login on `ttyS0'

2
board/LEOX/elpt860/flash.c
View file

@ -212,7 +212,7 @@ flash_print_info (flash_info_t *info)
static ulong
flash_get_size (volatile unsigned char *addr,
flash_info_t *info)
flash_info_t *info)
{
short i;
uchar value;

4
board/LEOX/elpt860/u-boot.lds
View file

@ -123,6 +123,10 @@ SECTIONS
_edata = .;
PROVIDE (edata = .);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;

1
board/LEOX/elpt860/u-boot.lds.debug
View file

@ -137,4 +137,3 @@ SECTIONS
_end = . ;
PROVIDE (end = .);
}

83
board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
View file

@ -30,47 +30,47 @@
#include "via686.h"
__asm(" .globl send_kb \n
send_kb: \n
lis r9, 0xfe00 \n
\n
li r4, 0x10 # retries \n
mtctr r4 \n
\n
idle: \n
lbz r4, 0x64(r9) \n
andi. r4, r4, 0x02 \n
bne idle \n
\n
ready: \n
stb r3, 0x60(r9) \n
\n
check: \n
lbz r4, 0x64(r9) \n
andi. r4, r4, 0x01 \n
beq check \n
\n
lbz r4, 0x60(r9) \n
cmpwi r4, 0xfa \n
beq done \n
\n
bdnz idle \n
\n
li r3, 0 \n
blr \n
\n
done: \n
li r3, 1 \n
blr \n
\n
.globl test_kb \n
test_kb: \n
mflr r10 \n
li r3, 0xed \n
bl send_kb \n
li r3, 0x01 \n
bl send_kb \n
mtlr r10 \n
blr \n
send_kb: \n
lis r9, 0xfe00 \n
\n
li r4, 0x10 # retries \n
mtctr r4 \n
\n
idle: \n
lbz r4, 0x64(r9) \n
andi. r4, r4, 0x02 \n
bne idle \n
\n
ready: \n
stb r3, 0x60(r9) \n
\n
check: \n
lbz r4, 0x64(r9) \n
andi. r4, r4, 0x01 \n
beq check \n
\n
lbz r4, 0x60(r9) \n
cmpwi r4, 0xfa \n
beq done \n
\n
bdnz idle \n
\n
li r3, 0 \n
blr \n
\n
done: \n
li r3, 1 \n
blr \n
\n
.globl test_kb \n
test_kb: \n
mflr r10 \n
li r3, 0xed \n
bl send_kb \n
li r3, 0x01 \n
bl send_kb \n
mtlr r10 \n
blr \n
");
@ -86,7 +86,6 @@ long initdram (int board_type)
}
void after_reloc (ulong dest_addr, gd_t *gd)
{
/* HJF: DECLARE_GLOBAL_DATA_PTR; */

1
board/MAI/AmigaOneG3SE/articiaS.h
View file

@ -134,7 +134,6 @@
#define ARTICIAS_ISAIO_PHYS 0xfe002000
/* Prototypes */
long articiaS_ram_init(void);
void articiaS_pci_init(void);

21
board/MAI/AmigaOneG3SE/articiaS_pci.c
View file

@ -123,14 +123,14 @@ struct pci_irq_fixup_table fixuptab [] =
{
{ 0, 0, 0, 0xff}, /* Articia S host bridge */
{ 0, 1, 0, 0xff}, /* Articia S AGP bridge */
// { 0, 6, 0, 0x05}, /* 3COM ethernet */
/* { 0, 6, 0, 0x05}, /###* 3COM ethernet */
{ 0, 7, 0, 0xff}, /* VIA southbridge */
{ 0, 7, 1, 0x0e}, /* IDE controller in legacy mode */
// { 0, 7, 2, 0x05}, /* First USB controller */
// { 0, 7, 3, 0x0c}, /* Second USB controller (shares interrupt with ethernet) */
/* { 0, 7, 2, 0x05}, /###* First USB controller */
/* { 0, 7, 3, 0x0c}, /###* Second USB controller (shares interrupt with ethernet) */
{ 0, 7, 4, 0xff}, /* ACPI Power Management */
// { 0, 7, 5, 0x08}, /* AC97 */
// { 0, 7, 6, 0x08}, /* MC97 */
/* { 0, 7, 5, 0x08}, /###* AC97 */
/* { 0, 7, 6, 0x08}, /###* MC97 */
{ 0xff, 0xff, 0xff, 0xff}
};
@ -287,7 +287,7 @@ void articiaS_pci_init (void)
PRINTF("atriciaS_pci_init\n");
// Why aren't these relocated??
/* Why aren't these relocated?? */
for (i=0; config_table[i].config_device; i++)
{
switch((int)config_table[i].config_device)
@ -335,7 +335,6 @@ void articiaS_pci_init (void)
PCI_REGION_IO);
articiaS_hose.region_count = 4;
pci_setup_indirect(&articiaS_hose, ARTICIAS_PCI_CFGADDR, ARTICIAS_PCI_CFGDATA);
@ -410,8 +409,8 @@ pci_dev_t pci_hose_find_class(struct pci_controller *hose, int bus, short find_c
pci_hose_read_config_byte(hose, dev, 0x0B, &c1);
pci_hose_read_config_byte(hose, dev, 0x0A, &c2);
class = c1<<8 | c2;
//printf("At %02x:%02x:%02x: class %x\n",
// PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class);
/*printf("At %02x:%02x:%02x: class %x\n", */
/* PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class); */
if (class == find_class)
{
if (index == 0)
@ -441,7 +440,7 @@ pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr)
if (hose == NULL) hose = &articiaS_hose;
if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; // Not in range
if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; /* Not in range */
/*
* The bridge must be on a lower bus number
@ -467,7 +466,7 @@ pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr)
if (!PCI_FUNC(dev))
found_multi = header_type & 0x80;
if (header_type == 1) // Bridge device header
if (header_type == 1) /* Bridge device header */
{
pci_hose_read_config_byte(hose, dev, PCI_SECONDARY_BUS, &secondary_bus);
if ((int)secondary_bus == busnr) return dev;

3
board/MAI/AmigaOneG3SE/board_asm_init.S
View file

@ -1,5 +1,4 @@
#include "macros.h"
#include "macros.h"
#define GLOBALINFO0 0x50

8
board/MAI/AmigaOneG3SE/cmd_boota.c
View file

@ -1,6 +1,5 @@
#include <common.h>
#include <command.h>
#include <cmd_boota.h>
#include "../disk/part_amiga.h"
#include <asm/cache.h>
@ -121,3 +120,10 @@ int do_boota (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
return 0;
}
#if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP)
cmd_tbl_t U_BOOT_CMD(BOOTA) = MK_CMD_ENTRY(
"boota", 3, 1, do_boota,
"boota - boot an Amiga kernel\n",
"address disk"
);
#endif /* _CMD_BOOTA_H */

1
board/MAI/AmigaOneG3SE/config.mk
View file

@ -30,4 +30,3 @@ X86EMU = -I../bios_emulator/scitech/include -I../bios_emulator/scitech/src/x86e
TEXT_BASE = 0xfff00000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) -Dprintk=printf #-DDEBUG

180
board/MAI/AmigaOneG3SE/enet.c
View file

@ -36,7 +36,7 @@
/* 3Com Ethernet PCI definitions*/
// #define PCI_VENDOR_ID_3COM 0x10B7
/* #define PCI_VENDOR_ID_3COM 0x10B7 */
#define PCI_DEVICE_ID_3COM_3C905C 0x9200
/* 3Com Commands, top 5 bits are command and bottom 11 bits are parameters */
@ -148,11 +148,11 @@
#define Wn3_Options 8
#define BFEXT(value, offset, bitcount) \
((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
#define BFINS(lhs, rhs, offset, bitcount) \
(((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
(((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
(((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
(((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
#define RAM_SIZE(v) BFEXT(v, 0, 3)
#define RAM_WIDTH(v) BFEXT(v, 3, 1)
@ -196,10 +196,10 @@
#define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
struct rx_desc_3com {
u32 next; /* Last entry points to 0 */
u32 status; /* FSH -> Frame Start Header */
u32 addr; /* Up to 63 addr/len pairs possible */
u32 length; /* Set LAST_FRAG to indicate last pair */
u32 next; /* Last entry points to 0 */
u32 status; /* FSH -> Frame Start Header */
u32 addr; /* Up to 63 addr/len pairs possible */
u32 length; /* Set LAST_FRAG to indicate last pair */
};
/* Values for the Rx status entry. */
@ -214,10 +214,10 @@ struct rx_desc_3com {
#define UDPChksumValid (1<<31)
struct tx_desc_3com {
u32 next; /* Last entry points to 0 */
u32 status; /* bits 0:12 length, others see below */
u32 addr;
u32 length;
u32 next; /* Last entry points to 0 */
u32 status; /* bits 0:12 length, others see below */
u32 addr;
u32 length;
};
/* Values for the Tx status entry. */
@ -243,10 +243,10 @@ struct tx_desc_3com {
#define XCVR_Default 10 /* I don't think this is correct -> should have been 0x10 if Auto Negotiate */
struct descriptor { /* A generic descriptor. */
u32 next; /* Last entry points to 0 */
u32 status; /* FSH -> Frame Start Header */
u32 addr; /* Up to 63 addr/len pairs possible */
u32 length; /* Set LAST_FRAG to indicate last pair */
u32 next; /* Last entry points to 0 */
u32 status; /* FSH -> Frame Start Header */
u32 addr; /* Up to 63 addr/len pairs possible */
u32 length; /* Set LAST_FRAG to indicate last pair */
};
/* Misc. definitions */
@ -348,24 +348,24 @@ static inline void ETH_CMD(struct eth_device* dev, int command)
static int issue_and_wait(struct eth_device* dev, int command)
{
int i, status;
int i, status;
ETH_CMD(dev, command);
for (i = 0; i < 2000; i++) {
status = ETH_STATUS(dev);
//printf ("Issue: status 0x%4x.\n", status);
for (i = 0; i < 2000; i++) {
status = ETH_STATUS(dev);
/*printf ("Issue: status 0x%4x.\n", status); */
if (!(status & CmdInProgress))
return 1;
}
return 1;
}
/* OK, that didn't work. Do it the slow way. One second */
for (i = 0; i < 100000; i++) {
status = ETH_STATUS(dev);
//printf ("Issue: status 0x%4x.\n", status);
return 1;
udelay(10);
}
PRINTF("Ethernet command: 0x%4x did not complete! Status: 0x%4x\n", command, ETH_STATUS(dev) );
/* OK, that didn't work. Do it the slow way. One second */
for (i = 0; i < 100000; i++) {
status = ETH_STATUS(dev);
/*printf ("Issue: status 0x%4x.\n", status); */
return 1;
udelay(10);
}
PRINTF("Ethernet command: 0x%4x did not complete! Status: 0x%4x\n", command, ETH_STATUS(dev) );
return 0;
}
@ -378,7 +378,7 @@ static int auto_negotiate(struct eth_device* dev)
EL3WINDOW(dev, 1);
// Wait for Auto negotiation to complete
/* Wait for Auto negotiation to complete */
for (i = 0; i <= 1000; i++)
{
if (ETH_INW(dev, 2) & 0x04)
@ -393,7 +393,6 @@ static int auto_negotiate(struct eth_device* dev)
}
return 1;
}
@ -430,10 +429,10 @@ void eth_interrupt(struct eth_device *dev)
int eth_3com_initialize(bd_t *bis)
{
u32 eth_iobase = 0, status;
int card_number = 0, ret;
struct eth_device* dev;
pci_dev_t devno;
u32 eth_iobase = 0, status;
int card_number = 0, ret;
struct eth_device* dev;
pci_dev_t devno;
char *s;
s = getenv("3com_base");
@ -453,7 +452,7 @@ int eth_3com_initialize(bd_t *bis)
}
ret = pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, &eth_iobase);
eth_iobase &= ~0xf;
eth_iobase &= ~0xf;
PRINTF("eth: 3Com Found at Address: 0x%x\n", eth_iobase);
@ -481,17 +480,17 @@ int eth_3com_initialize(bd_t *bis)
goto Done;
}
dev = (struct eth_device*) malloc(sizeof(*dev)); //struct eth_device));
dev = (struct eth_device*) malloc(sizeof(*dev)); /*struct eth_device)); */
sprintf(dev->name, "3Com 3c920c#%d", card_number);
dev->iobase = eth_iobase;
dev->priv = (void*) devno;
dev->init = eth_3com_init;
dev->halt = eth_3com_halt;
dev->send = eth_3com_send;
dev->recv = eth_3com_recv;
sprintf(dev->name, "3Com 3c920c#%d", card_number);
dev->iobase = eth_iobase;
dev->priv = (void*) devno;
dev->init = eth_3com_init;
dev->halt = eth_3com_halt;
dev->send = eth_3com_send;
dev->recv = eth_3com_recv;
eth_register(dev);
eth_register(dev);
/* { */
/* char interrupt; */
@ -502,7 +501,7 @@ int eth_3com_initialize(bd_t *bis)
/* irq_install_handler(interrupt, eth_interrupt, dev); */
/* } */
card_number++;
card_number++;
/* Set the latency timer for value */
s = getenv("3com_latency");
@ -560,43 +559,43 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
goto Done;
}
issue_and_wait(dev, TxReset);
issue_and_wait(dev, RxReset|0x04);
issue_and_wait(dev, TxReset);
issue_and_wait(dev, RxReset|0x04);
/* Switch to register set 7 for normal use. */
EL3WINDOW(dev, 7);
/* Switch to register set 7 for normal use. */
EL3WINDOW(dev, 7);
/* Initialize Rx and Tx rings */
init_rx_ring(dev);
purge_tx_ring(dev);
ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm);
issue_and_wait(dev,SetTxStart|0x07ff);
issue_and_wait(dev,SetTxStart|0x07ff);
/* Below sets which indication bits to be seen. */
/* Below sets which indication bits to be seen. */
status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6);
ETH_CMD(dev, status_enable);
status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6);
ETH_CMD(dev, status_enable);
/* Below sets no bits are to cause an interrupt since this is just polling */
intr_enable = SetIntrEnb;
// intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6);
ETH_CMD(dev, intr_enable);
intr_enable = SetIntrEnb;
/* intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6); */
ETH_CMD(dev, intr_enable);
ETH_OUTB(dev, 127, UpPoll);
/* Ack all pending events, and set active indicator mask */
/* Ack all pending events, and set active indicator mask */
ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
ETH_CMD(dev, intr_enable);
ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq);
ETH_CMD(dev, intr_enable);
/* Tell the adapter where the RX ring is located */
issue_and_wait(dev,UpStall); /* Stall and set the UplistPtr */
ETH_OUTL(dev, (u32)&rx_ring[rx_next], UpListPtr);
ETH_CMD(dev, RxEnable); /* Enable the receiver. */
ETH_CMD(dev, RxEnable); /* Enable the receiver. */
issue_and_wait(dev,UpUnstall);
/* Send the Individual Address Setup frame */
@ -612,7 +611,7 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
/* Tell the adapter where the TX ring is located */
ETH_CMD(dev, TxEnable); /* Enable transmitter. */
ETH_CMD(dev, TxEnable); /* Enable transmitter. */
issue_and_wait(dev, DownStall); /* Stall and set the DownListPtr. */
ETH_OUTL(dev, (u32)&tx_ring[tx_cur], DownListPtr);
issue_and_wait(dev, DownUnstall);
@ -627,8 +626,8 @@ static int eth_3com_init(struct eth_device* dev, bd_t *bis)
}
if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
{
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_OUTL(dev, 0, DownListPtr);
issue_and_wait(dev, DownUnstall);
}
@ -673,8 +672,8 @@ int eth_3com_send(struct eth_device* dev, volatile void *packet, int length)
}
if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */
{
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */
issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */
ETH_OUTL(dev, 0, DownListPtr);
issue_and_wait(dev, DownUnstall);
}
@ -758,8 +757,8 @@ void eth_3com_halt(struct eth_device* dev)
issue_and_wait(dev, RxDisable);
issue_and_wait(dev, TxDisable);
// free(tx_ring); /* release memory allocated to the DPD and UPD rings */
// free(rx_ring);
/* free(tx_ring); /###* release memory allocated to the DPD and UPD rings */
/* free(rx_ring); */
Done:
return;
@ -806,32 +805,32 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
unsigned int checksum = 0;
int i, j, timer;
/* Read the station address from the EEPROM. */
/* Read the station address from the EEPROM. */
EL3WINDOW(dev, 0);
EL3WINDOW(dev, 0);
for (i = 0; i < 0x40; i++)
{
ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd);
/* Pause for at least 162 us. for the read to take place. */
for (timer = 10; timer >= 0; timer--)
ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd);
/* Pause for at least 162 us. for the read to take place. */
for (timer = 10; timer >= 0; timer--)
{
udelay(162);
if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0)
break;
}
eeprom[i] = ETH_INW(dev, Wn0EepromData);
}
udelay(162);
if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0)
break;
}
eeprom[i] = ETH_INW(dev, Wn0EepromData);
}
/* Checksum calculation. I'm not sure about this part and there seems to be a bug on the 3com side of things */
for (i = 0; i < 0x21; i++)
checksum ^= eeprom[i];
checksum = (checksum ^ (checksum >> 8)) & 0xff;
for (i = 0; i < 0x21; i++)
checksum ^= eeprom[i];
checksum = (checksum ^ (checksum >> 8)) & 0xff;
if (checksum != 0xbb)
printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum);
if (checksum != 0xbb)
printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum);
for (i = 0, j = 0; i < 3; i++)
for (i = 0, j = 0; i < 3; i++)
{
hw_addr[j++] = (u8)((eeprom[i+10] >> 8) & 0xff);
hw_addr[j++] = (u8)(eeprom[i+10] & 0xff);
@ -839,9 +838,9 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
/* MAC Address is in window 2, write value from EEPROM to window 2 */
EL3WINDOW(dev, 2);
for (i = 0; i < 6; i++)
ETH_OUTB(dev, hw_addr[i], i);
EL3WINDOW(dev, 2);
for (i = 0; i < 6; i++)
ETH_OUTB(dev, hw_addr[i], i);
for (j = 0; j < ETH_ALEN; j+=2)
{
@ -883,4 +882,3 @@ static void read_hw_addr(struct eth_device* dev, bd_t *bis)
Done:
return;
}

13
board/MAI/AmigaOneG3SE/flash_new.c
View file

@ -31,7 +31,6 @@
/*---------------------------------------------------------------------*/
#undef DEBUG_FLASH
//#define DEBUG_FLASH
#ifdef DEBUG_FLASH
#define DEBUGF(fmt,args...) printf(fmt ,##args)
@ -327,7 +326,7 @@ static int flash_get_offsets (ulong base, flash_info_t *info)
/* set sector offsets for uniform sector type */
for (i = 0; i < info->sector_count; i++) {
info->start[i] = base + i * info->size /
info->sector_count;
info->sector_count;
}
break;
default:
@ -478,7 +477,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
}
if ((rc = write_word(info, wp, data)) != 0) {
flash_to_mem();
flash_to_mem();
return (rc);
}
wp += 4;
@ -493,7 +492,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
data = (data << 8) | *src++;
}
if ((rc = write_word(info, wp, data)) != 0) {
flash_to_mem();
flash_to_mem();
return (rc);
}
wp += 4;
@ -582,7 +581,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
*/
static void flash_reset (ulong addr)
{
flash_to_xd();
flash_to_xd();
out8(addr, 0xF0); /* reset bank */
iobarrier_rw();
flash_to_mem();
@ -633,10 +632,10 @@ void flash_print_info (flash_info_t *info)
info->size / 0x100000, info->sector_count);
} else if (info->size % 0x400 == 0) {
printf (" Size: %ld KB in %d Sectors\n",
info->size / 0x400, info->sector_count);
info->size / 0x400, info->sector_count);
} else {
printf (" Size: %ld B in %d Sectors\n",
info->size, info->sector_count);
info->size, info->sector_count);
}
printf (" Sector Start Addresses:");

8
board/MAI/AmigaOneG3SE/i8259.c
View file

@ -75,16 +75,16 @@ void i8259_init(void)
char dummy;
PRINTF("Initializing Interrupt controller\n");
/* init master interrupt controller */
out8(0x20, 0x11); //0x19); // was: 0x11); /* Start init sequence */
out8(0x20, 0x11); /* 0x19); /###* Start init sequence */
out8(0x21, 0x00); /* Vector base */
out8(0x21, 0x04); /* edge tiggered, Cascade (slave) on IRQ2 */
out8(0x21, 0x11); // was: 0x01); /* Select 8086 mode */
out8(0x21, 0x11); /* was: 0x01); /###* Select 8086 mode */
/* init slave interrupt controller */
out8(0xA0, 0x11); //0x19); // was: 0x11); /* Start init sequence */
out8(0xA0, 0x11); /* 0x19); /###* Start init sequence */
out8(0xA1, 0x08); /* Vector base */
out8(0xA1, 0x02); /* edge triggered, Cascade (slave) on IRQ2 */
out8(0xA1, 0x11); // was: 0x01); /* Select 8086 mode */
out8(0xA1, 0x11); /* was: 0x01); /###* Select 8086 mode */
/* always read ISR */
out8(0x20, 0x0B);

6
board/MAI/AmigaOneG3SE/interrupts.c
View file

@ -167,8 +167,8 @@ external_interrupt(struct pt_regs *regs)
int irq, unmask = 1;
irq = i8259_irq(); //i8259_get_irq(regs);
// printf("irq = %d, handler at %p ack=%d\n", irq, irq_handlers[irq].handler, *(volatile unsigned char *)0xFEF00000);
irq = i8259_irq(); /*i8259_get_irq(regs); */
/* printf("irq = %d, handler at %p ack=%d\n", irq, irq_handlers[irq].handler, *(volatile unsigned char *)0xFEF00000); */
i8259_mask_and_ack(irq);
if (irq_handlers[irq].handler != NULL)
@ -264,5 +264,3 @@ do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
{
puts("IRQ related functions are unimplemented currently.\n");
}

48
board/MAI/AmigaOneG3SE/macros.h
View file

@ -5,10 +5,10 @@
/*
** Load a long integer into a register
*/
.macro liw reg, value
lis \reg, \value@h
ori \reg, \reg, \value@l
.endm
.macro liw reg, value
lis \reg, \value@h
ori \reg, \reg, \value@l
.endm
/*
@ -45,40 +45,40 @@
/*
** Write a byte value to an output port
*/
.macro outb port, value
lis r2, 0xfe00
li r0, \value
stb r0, \port(r2)
.endm
.macro outb port, value
lis r2, 0xfe00
li r0, \value
stb r0, \port(r2)
.endm
/*
** Write a register byte value to an output port
*/
.macro outbr port, value
lis r2, 0xfe00
stb \value, \port(r2)
.endm
.macro outbr port, value
lis r2, 0xfe00
stb \value, \port(r2)
.endm
/*
** Read a byte value from a port into a specified register
*/
.macro inb reg, port
lis r2, 0xfe00
lbz \reg, \port(r2)
.endm
.macro inb reg, port
lis r2, 0xfe00
lbz \reg, \port(r2)
.endm
/*
** Write a byte to the SuperIO config area
*/
.macro siowb offset, value
li r3, 0
li r4, (7<<3)
li r5, \offset
li r6, \value
bl pci_write_cfg_byte
.endm
.macro siowb offset, value
li r3, 0
li r4, (7<<3)
li r5, \offset
li r6, \value
bl pci_write_cfg_byte
.endm
#endif

7
board/MAI/AmigaOneG3SE/memio.S
View file

@ -1,7 +1,6 @@
#include "macros.h"
.globl pci_read_cfg_byte
pci_read_cfg_byte:
@ -13,7 +12,6 @@ pci_read_cfg_byte:
blr
.globl pci_write_cfg_byte
pci_write_cfg_byte:
@ -25,7 +23,6 @@ pci_write_cfg_byte:
blr
.globl pci_read_cfg_word
pci_read_cfg_word:
@ -37,7 +34,6 @@ pci_read_cfg_word:
blr
.globl pci_write_cfg_word
pci_write_cfg_word:
@ -49,7 +45,6 @@ pci_write_cfg_word:
blr
.globl pci_read_cfg_long
pci_read_cfg_long:
@ -61,7 +56,6 @@ pci_read_cfg_long:
blr
.globl pci_write_cfg_long
pci_write_cfg_long:
@ -71,4 +65,3 @@ pci_write_cfg_long:
eieio
sync
blr

4
board/MAI/AmigaOneG3SE/memio.h
View file

@ -97,8 +97,8 @@ static inline void write_long_big(volatile uint32 *to, uint32 x)
#define CONFIG_ADDR(bus, devfn, offset) \
write_long_big((uint32 *)0xFEC00CF8, \
((offset & 0xFC)<<24) | (devfn << 16) \
| (bus<<8) | 0x80);
((offset & 0xFC)<<24) | (devfn << 16) \
| (bus<<8) | 0x80);
#define CONFIG_DATA(offset,mask) ((void *)(0xFEE00CFC+(offset & mask)))

1
board/MAI/AmigaOneG3SE/nvram.c
View file

@ -34,4 +34,3 @@ void disable_nvram(void)
{
pci_write_cfg_byte(0, 0, 0x56, 0x0);
}

9
board/MAI/AmigaOneG3SE/ps2kbd.c
View file

@ -48,7 +48,6 @@ void i8259_unmask_irq(unsigned int irq);
#undef KBG_DEBUG
//#define KBG_DEBUG
#ifdef KBG_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)
@ -143,8 +142,6 @@ void i8259_unmask_irq(unsigned int irq);
#define KBD_BUFFER_LEN 0x20 /* size of the keyboardbuffer */
static volatile char kbd_buffer[KBD_BUFFER_LEN];
static volatile int in_pointer = 0;
static volatile int out_pointer = 0;
@ -494,7 +491,6 @@ unsigned char handle_kbd_event(void)
}
/******************************************************************************
* Lowlevel Part of keyboard section
*/
@ -692,8 +688,3 @@ void kbd_interrupt(void)
{
handle_kbd_event();
}
/* eof */

18
board/MAI/AmigaOneG3SE/smbus.c
View file

@ -34,7 +34,7 @@ void sm_write_byte(uint8 writeme)
for (i=0; i<8; i++)
{
if ((writeme & 0x80) == (level<<7))
{
{
/* Bit did not change, rewrite strobe */
out_byte(0xA539, level | 0x02);
out_byte(0xA539, level);
@ -106,36 +106,36 @@ void sm_send_stop(void)
int sm_read_byte_from_device(uint8 addr, uint8 reg, uint8 *storage)
{
// S Addr Wr
/* S Addr Wr */
sm_write_mode();
sm_send_start();
sm_write_byte((addr<<1));
// [A]
/* [A] */
sm_read_mode();
if (sm_get_ack() == FALSE) return FALSE;
// Comm
/* Comm */
sm_write_mode();
sm_write_byte(reg);
// [A]
/* [A] */
sm_read_mode();
if (sm_get_ack() == FALSE) return FALSE;
// S Addr Rd
/* S Addr Rd */
sm_write_mode();
sm_send_start();
sm_write_byte((addr<<1)|1);
// [A]
/* [A] */
sm_read_mode();
if (sm_get_ack() == FALSE) return FALSE;
// [Data]
/* [Data] */
*storage = sm_read_byte();
// NA
/* NA */
sm_write_mode();
sm_write_nack();
sm_send_stop();

177
board/MAI/AmigaOneG3SE/start.txt
View file

@ -1,157 +1,156 @@
/*------------------------------------------------------*/
/* TERON Articia / SDRAM Init */
/*------------------------------------------------------*/
/* TERON Articia / SDRAM Init */
/*------------------------------------------------------*/
* XD_CTL = 0x81000000 (0x74)
* HBUS_ACC_CTL_0 &= 0xFFFFFDFF (0x5c)
/* host bus access ctl reg 2(5e) */
/* set - CPU read from memory data one clock after data is latched */
/* host bus access ctl reg 2(5e) */
/* set - CPU read from memory data one clock after data is latched */
* GLOBL_INFO_0 |= 0x00004000 (0x50)
/* global info register 2 (52), AGP/PCI bus 1 arbiter is addressed in Articia S */
/* global info register 2 (52), AGP/PCI bus 1 arbiter is addressed in Articia S */
PCI_1_SB_CONFIG_0 |= 0x00000400 (0x80d0)
/* PCI1 side band config reg 2 (d2), enable read acces while write buffer not empty */
PCI_1_SB_CONFIG_0 |= 0x00000400 (0x80d0)
/* PCI1 side band config reg 2 (d2), enable read acces while write buffer not empty */
MEM_RAS_CTL_0 |= 0x3f000000 (0xcc)
MEM_RAS_CTL_0 |= 0x3f000000 (0xcc)
&= 0x3fffffff
/* RAS park control reg 0(cc), park access enable is set */
/* RAS park control reg 0(cc), park access enable is set */
HOST_RDBUF_CTL |= 0x10000000 (0x70)
&= 0x10ffffff
/* host read buffer control reg, enable prefetch for CPU read from DRAM control */
HOST_RDBUF_CTL |= 0x10000000 (0x70)
&= 0x10ffffff
/* host read buffer control reg, enable prefetch for CPU read from DRAM control */
HBUS_ACC_CTL_0 |= 0x0100001f (0x5c)
HBUS_ACC_CTL_0 |= 0x0100001f (0x5c)
&= 0xf1ffffff
/* host bus access control register, enable CPU address bus pipe control */
/* two outstanding requests, *** changed to 2 from 3 */
/* enable line merge write control for CPU write to system memory, PCI 1 */
/* and PCI 0 bus memory; enable page merge write control for write to */
/* PCI bus 0 & bus 1 memory */
/* host bus access control register, enable CPU address bus pipe control */
/* two outstanding requests, *** changed to 2 from 3 */
/* enable line merge write control for CPU write to system memory, PCI 1 */
/* and PCI 0 bus memory; enable page merge write control for write to */
/* PCI bus 0 & bus 1 memory */
SRAM_CTL |= 0x00004000 (0xc8)
SRAM_CTL |= 0x00004000 (0xc8)
&= 0xffbff7ff
/* DRAM detail timing control register 1 (ca), bit 3 set to 0 */
/* DRAM start access latency control - wait for one clock */
/* ff9f changed to ffbf */
/* DRAM detail timing control register 1 (ca), bit 3 set to 0 */
/* DRAM start access latency control - wait for one clock */
/* ff9f changed to ffbf */
DIM0_TIM_CTL_0 = 0x737d737d (0xc9)
/* DRAM timing control for dimm0 & dimm1; set wait one clock */
/* cycle for next data access */
DIM0_TIM_CTL_0 = 0x737d737d (0xc9)
/* DRAM timing control for dimm0 & dimm1; set wait one clock */
/* cycle for next data access */
DIM2_TIM_CTL_0 = 0x737d737d (0xca)
/* DRAM timing control for dimm2 & dimm3; set wait one clock */
/* cycle for next data access */
DIM2_TIM_CTL_0 = 0x737d737d (0xca)
/* DRAM timing control for dimm2 & dimm3; set wait one clock */
/* cycle for next data access */
DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB (0x90)
/* set dimm0 bank0 for 128 MB */
DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB (0x90)
/* set dimm0 bank0 for 128 MB */
DIM0_BNK1_CTL_0 = BNK1_RAM_SIZ_128MB (0x94)
/* set dimm0 for bank1 */
DIM0_BNK1_CTL_0 = BNK1_RAM_SIZ_128MB (0x94)
/* set dimm0 for bank1 */
DIM0_TIM_CTL_0 = 0xf3bf0000 (0xc9)
/* dimm0 timing control register; RAS - CAS latency - 4 clock */
/* CAS access latency - 3 wait; pre-charge latency - 3 wait */
/* pre-charge command period control - 5 clock; wait one clock */
/* cycle for next data access; read to write access latency control */
/* - 2 clock cycles */
DIM0_TIM_CTL_0 = 0xf3bf0000 (0xc9)
/* dimm0 timing control register; RAS - CAS latency - 4 clock */
/* CAS access latency - 3 wait; pre-charge latency - 3 wait */
/* pre-charge command period control - 5 clock; wait one clock */
/* cycle for next data access; read to write access latency control */
/* - 2 clock cycles */
DRAM_GBL_CTL_0 |= 0x00000100 (0xc0)
DRAM_GBL_CTL_0 |= 0x00000100 (0xc0)
&= 0xffff01ff
/* memory global control register - support buffer sdram on bank 0 */
/* memory global control register - support buffer sdram on bank 0 */
DRAM_ECC_CTL_0 |= 0x00260000 (0xc4)
DRAM_ECC_CTL_0 |= 0x00260000 (0xc4)
&= 0xff26ffff
/* enable ECC; enable read, modify, write control */
/* enable ECC; enable read, modify, write control */
DRAM_REF_CTL_0 = DRAM_REF_DATA (0xb8)
DRAM_REF_CTL_0 = DRAM_REF_DATA (0xb8)
/* set DRAM refresh parameters *** changed to 00940100 */
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
DRAM_ECC_CTL_0 |= 0x20243280 (0xc4)
/* turn off ecc */
/* for SDRAM bank 0 */
DRAM_ECC_CTL_0 |= 0x20243280 (0xc4)
/* turn off ecc */
/* for SDRAM bank 0 */
DRAM_ECC_CTL_0 |= 0x20243290 (0xc4) ?
/* for SDRAM bank 1 */
DRAM_ECC_CTL_0 |= 0x20243290 (0xc4) ?
/* for SDRAM bank 1 */
/* Additional Stuff...*/
GLOBL_CTRL |= 0x20000b00 (0x54)
GLOBL_CTRL |= 0x20000b00 (0x54)
PCI_0_SB_CONFIG |= 0x04100007 (0xd0)
/* PCI 0 Side band config reg*/
PCI_0_SB_CONFIG |= 0x04100007 (0xd0)
/* PCI 0 Side band config reg*/
0x8000083c |= 0x00080000
/* Disable VGA decode on PCI Bus 1 */
0x8000083c |= 0x00080000
/* Disable VGA decode on PCI Bus 1 */
/*End Additional Stuff..*/
/*--------------------------------------------------------------*/
/* TERON serial port initialization code */
/*--------------------------------------------------------------*/
/*--------------------------------------------------------------*/
/* TERON serial port initialization code */
/*--------------------------------------------------------------*/
0x84380080 |= 0x00030000
/* enable super IO configuration VIA chip Register 85 */
/* enable super IO configuration VIA chip Register 85 */
/* Enable super I/O config mode */
0xfe0003f0 = 0xe2
bl delay1
0xfe0003f1 = 0x0f
0xfe0003f0 = 0xe2
bl delay1
/* enable com1 & com2, parallel port disabled */
0xfe0003f1 = 0x0f
bl delay1
/* enable com1 & com2, parallel port disabled */
0xfe0003f0 = 0xe7
bl delay1
/* let's make com1 base as 0x3f8 */
bl delay1
/* let's make com1 base as 0x3f8 */
0xfe0003f1 = 0xfe
bl delay1
0xfe0003f1 = 0xfe
bl delay1
0xfe0003f0 = 0xe8
bl delay1
0xfe0003f0 = 0xe8
bl delay1
/* let's make com2 base as 0x2f8 */
0xfe0003f1 = 0xbe
0x84380080 &= 0xfffdffff
/* closing super IO configuration VIA chip Register 85 */
/* closing super IO configuration VIA chip Register 85 */
/* -------------------------------*/
0xfe0003fb = 0x83
0xfe0003fb = 0x83
bl delay1
/*latch enable word length -8 bit */ /* set mslab bit */
0xfe0003f8 = 0x0c
/*latch enable word length -8 bit */ /* set mslab bit */
0xfe0003f8 = 0x0c
bl delay1
/* set baud rate lsb for 9600 baud */
0xfe0003f9 = 0x0
/* set baud rate lsb for 9600 baud */
0xfe0003f9 = 0x0
bl delay1
/* set baud rate msb for 9600 baud */
0xfe0003fb = 0x03
/* set baud rate msb for 9600 baud */
0xfe0003fb = 0x03
bl delay1
/* reset mslab */
/* reset mslab */
/*--------------------------------------------------------------*/
/* END TERON Serial Port Initialization Code */
/*--------------------------------------------------------------*/
/* END TERON Serial Port Initialization Code */
/*--------------------------------------------------------------*/
/*--------------------------------------------------------------*/
/* END TERON Articia / SDRAM Initialization code */
/*--------------------------------------------------------------*/
/*--------------------------------------------------------------*/
/* END TERON Articia / SDRAM Initialization code */
/*--------------------------------------------------------------*/
Proposed from Documentation:
@ -197,5 +196,3 @@ write dmem 0xfee00cfc 0x00003280
write dmem 0xfec00cf8 0xc4000080
write dmem 0xfee00cfc 0x00003290

5
board/MAI/AmigaOneG3SE/u-boot.lds
View file

@ -108,6 +108,11 @@ SECTIONS
_edata = .;
PROVIDE (edata = .);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;

3
board/MAI/AmigaOneG3SE/usb_uhci.c
View file

@ -83,7 +83,7 @@
#define USB_MAX_TEMP_INT_TD 32 /* number of temporary TDs for Interrupt transfers */
//#define USB_UHCI_DEBUG
/*#define USB_UHCI_DEBUG */
#ifdef USB_UHCI_DEBUG
#define USB_UHCI_PRINTF(fmt,args...) printf (fmt ,##args)
@ -1115,7 +1115,6 @@ static void usb_display_wValue(unsigned short wValue,unsigned short wIndex)
#endif
#ifdef USB_UHCI_DEBUG
static int usb_display_td(uhci_td_t *td)

2
board/MAI/AmigaOneG3SE/usb_uhci.h
View file

@ -190,5 +190,3 @@ struct virt_root_hub {
#endif /* _USB_UHCI_H_ */

18
board/MAI/AmigaOneG3SE/via686.c
View file

@ -211,18 +211,18 @@ void via_cfgfunc_via686(struct pci_controller *host, pci_dev_t dev, struct pci_c
__asm (" .globl via_calibrate_time_base \n"
"via_calibrate_time_base: \n"
" lis 9, 0xfe00 \n"
" li 0, 0x00 \n"
" lis 9, 0xfe00 \n"
" li 0, 0x00 \n"
" mttbu 0 \n"
" mttbl 0 \n"
"ctb_loop: \n"
" lbz 0, 0x61(9) \n"
" eieio \n"
" andi. 0, 0, 0x20 \n"
" beq ctb_loop \n"
"ctb_done: \n"
" mftb 3 \n"
" blr");
" lbz 0, 0x61(9) \n"
" eieio \n"
" andi. 0, 0, 0x20 \n"
" beq ctb_loop \n"
"ctb_done: \n"
" mftb 3 \n"
" blr");
extern unsigned long via_calibrate_time_base(void);

8
board/MAI/AmigaOneG3SE/video.c
View file

@ -129,11 +129,11 @@ int drv_video_init(void)
int video_init(void)
{
cursor_position = VIDEO_BASE; // Color text display base
cursor_position = VIDEO_BASE; /* Color text display base */
cursor_row = 0;
cursor_col = 0;
current_attr = video_get_attr(); // Currently selected value for attribute.
// video_test();
current_attr = video_get_attr(); /* Currently selected value for attribute. */
/* video_test(); */
video_set_color(current_attr);
return 0;
@ -328,7 +328,7 @@ void video_draw_box(int style, int attr, char *title, int separate, int x, int y
*(fb2+1) = attr; fb2 += 2*VIDEO_COLS;
}
// Draw title
/* Draw title */
if (title)
{
if (separate == 0)

72
board/MAI/bios_emulator/bios.c
View file

@ -130,14 +130,14 @@ static void X86API int1A(int intno)
switch(M.x86.R_AX)
{
case 0xB101: // PCI Bios Present?
case 0xB101: /* PCI Bios Present? */
M.x86.R_AL = 0x00;
M.x86.R_EDX = 0x20494350;
M.x86.R_BX = 0x0210;
M.x86.R_CL = 3;
CLEAR_FLAG(F_CF);
break;
case 0xB102: // Find device
case 0xB102: /* Find device */
device = mypci_find_device(M.x86.R_DX, M.x86.R_CX, M.x86.R_SI);
if (device != -1)
{
@ -151,52 +151,52 @@ static void X86API int1A(int intno)
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
break;
case 0xB103: // Find PCI class code
case 0xB103: /* Find PCI class code */
M.x86.R_AH = PCIBIOS_DEVICE_NOT_FOUND;
//printf("Find by class not yet implmented");
/*printf("Find by class not yet implmented"); */
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
break;
case 0xB108: // read config byte
case 0xB108: /* read config byte */
M.x86.R_CL = mypci_read_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("read_config_byte %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_CL);
/*printf("read_config_byte %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_CL); */
break;
case 0xB109: // read config word
case 0xB109: /* read config word */
M.x86.R_CX = mypci_read_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("read_config_word %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_CX);
/*printf("read_config_word %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_CX); */
break;
case 0xB10A: // read config dword
case 0xB10A: /* read config dword */
M.x86.R_ECX = mypci_read_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("read_config_long %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_ECX);
/*printf("read_config_long %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_ECX); */
break;
case 0xB10B: // write config byte
case 0xB10B: /* write config byte */
mypci_write_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CL);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("write_config_byte %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_CL);
/*printf("write_config_byte %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_CL); */
break;
case 0xB10C: // write config word
case 0xB10C: /* write config word */
mypci_write_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CX);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("write_config_word %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_CX);
/*printf("write_config_word %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_CX); */
break;
case 0xB10D: // write config dword
case 0xB10D: /* write config dword */
mypci_write_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_ECX);
M.x86.R_AH = PCIBIOS_SUCCESSFUL;
CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
//printf("write_config_long %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI,
// M.x86.R_ECX);
/*printf("write_config_long %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
/* M.x86.R_ECX); */
break;
default:
PRINTF("BIOS int %xh: Unknown function AX=%04xh\n", intno, M.x86.R_AX);
@ -252,14 +252,14 @@ unsigned char setup_bw[] =
unsigned char * setup_modes[] =
{
setup_40x25, // mode 0: 40x25 bw text
setup_40x25, // mode 1: 40x25 col text
setup_80x25, // mode 2: 80x25 bw text
setup_80x25, // mode 3: 80x25 col text
setup_graphics, // mode 4: 320x200 col graphics
setup_graphics, // mode 5: 320x200 bw graphics
setup_graphics, // mode 6: 640x200 bw graphics
setup_bw // mode 7: 80x25 mono text
setup_40x25, /* mode 0: 40x25 bw text */
setup_40x25, /* mode 1: 40x25 col text */
setup_80x25, /* mode 2: 80x25 bw text */
setup_80x25, /* mode 3: 80x25 col text */
setup_graphics, /* mode 4: 320x200 col graphics */
setup_graphics, /* mode 5: 320x200 bw graphics */
setup_graphics, /* mode 6: 640x200 bw graphics */
setup_bw /* mode 7: 80x25 mono text */
};
unsigned int setup_cols[] =
@ -280,13 +280,13 @@ unsigned int setup_bufsize[] =
void bios_set_mode(int mode)
{
int i;
unsigned char mode_set = setup_modesets[mode]; // Control register value
unsigned char *setup_regs = setup_modes[mode]; // Register 3D4 Array
unsigned char mode_set = setup_modesets[mode]; /* Control register value */
unsigned char *setup_regs = setup_modes[mode]; /* Register 3D4 Array */
// Switch video off
/* Switch video off */
out_byte(0x3D8, mode_set & 0x37);
// Set up parameters at 3D4h
/* Set up parameters at 3D4h */
for (i=0; i<16; i++)
{
out_byte(0x3D4, (unsigned char)i);
@ -294,10 +294,10 @@ void bios_set_mode(int mode)
setup_regs++;
}
// Enable video
/* Enable video */
out_byte(0x3D8, mode_set);
// Set overscan
/* Set overscan */
if (mode == 6) out_byte(0x3D9, 0x3F);
else out_byte(0x3D9, 0x30);
}

29
board/MAI/bios_emulator/glue.c
View file

@ -401,7 +401,7 @@ int find_image(u32 rom_address, u32 rom_size, void **image, u32 *image_size)
{
int i = 0;
unsigned char *rom = (unsigned char *)rom_address;
/* if (*rom != 0x55 || *(rom+1) != 0xAA) return 0; // No bios rom this is, yes. */
/* if (*rom != 0x55 || *(rom+1) != 0xAA) return 0; /* No bios rom this is, yes. */ */
for (;;)
{
@ -479,7 +479,6 @@ void show_bat_mapping(void)
}
void remove_init_data(void)
{
char *s;
@ -497,19 +496,19 @@ void remove_init_data(void)
}
else if (s)
{
if (strcmp(s, "dcache")==0)
{
dcache_enable();
}
else if (strcmp(s, "icache") == 0)
{
icache_enable();
}
else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0)
{
dcache_enable();
icache_enable();
}
if (strcmp(s, "dcache")==0)
{
dcache_enable();
}
else if (strcmp(s, "icache") == 0)
{
icache_enable();
}
else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0)
{
dcache_enable();
icache_enable();
}
}
/* show_bat_mapping();*/

1
board/MAI/bios_emulator/scitech/include/biosemu.h
View file

@ -152,4 +152,3 @@ void PMAPI BE_exit(void);
#endif
#endif /* __BIOSEMU_H */

58
board/MAI/bios_emulator/scitech/include/event.h
View file

@ -201,9 +201,9 @@ keyboard), but the translated ASCII values may be different depending on
the country code pages in use.
NOTE: Scan codes in the event library are not really hardware scan codes,
but rather virtual scan codes as generated by a low level keyboard
interface driver. All virtual codes begin with scan code 0x60 and
range up from there.
but rather virtual scan codes as generated by a low level keyboard
interface driver. All virtual codes begin with scan code 0x60 and
range up from there.
HEADER:
event.h
@ -496,38 +496,38 @@ event.h
MEMBERS:
which - Window identifier for message for use by high level window manager
code (i.e. MegaVision GUI or Windows API).
code (i.e. MegaVision GUI or Windows API).
what - Type of event that occurred. Will be one of the values defined by
the EVT_eventType enumeration.
the EVT_eventType enumeration.
when - Time that the event occurred in milliseconds since startup
where_x - X coordinate of the mouse cursor location at the time of the event
(in screen coordinates). For joystick events this represents
the position of the first joystick X axis.
(in screen coordinates). For joystick events this represents
the position of the first joystick X axis.
where_y - Y coordinate of the mouse cursor location at the time of the event
(in screen coordinates). For joystick events this represents
the position of the first joystick Y axis.
(in screen coordinates). For joystick events this represents
the position of the first joystick Y axis.
relative_x - Relative movement of the mouse cursor in the X direction (in
units of mickeys, or 1/200th of an inch). For joystick events
this represents the position of the second joystick X axis.
units of mickeys, or 1/200th of an inch). For joystick events
this represents the position of the second joystick X axis.
relative_y - Relative movement of the mouse cursor in the Y direction (in
units of mickeys, or 1/200th of an inch). For joystick events
this represents the position of the second joystick Y axis.
units of mickeys, or 1/200th of an inch). For joystick events
this represents the position of the second joystick Y axis.
message - Event specific message for the event. For use events this can be
any user specific information. For keyboard events this contains
the ASCII code in bits 0-7, the keyboard scan code in bits 8-15 and
the character repeat count in bits 16-30. You can use the
EVT_asciiCode, EVT_scanCode and EVT_repeatCount macros to extract
this information from the message field. For mouse events this
contains information about which button was pressed, and will be a
combination of the flags defined by the EVT_eventMouseMaskType
enumeration. For joystick events, this conatins information
about which buttons were pressed, and will be a combination of
the flags defined by the EVT_eventJoyMaskType enumeration.
any user specific information. For keyboard events this contains
the ASCII code in bits 0-7, the keyboard scan code in bits 8-15 and
the character repeat count in bits 16-30. You can use the
EVT_asciiCode, EVT_scanCode and EVT_repeatCount macros to extract
this information from the message field. For mouse events this
contains information about which button was pressed, and will be a
combination of the flags defined by the EVT_eventMouseMaskType
enumeration. For joystick events, this conatins information
about which buttons were pressed, and will be a combination of
the flags defined by the EVT_eventJoyMaskType enumeration.
modifiers - Contains additional information about the state of the keyboard
shift modifiers (Ctrl, Alt and Shift keys) when the event
occurred. For mouse events it will also contain the state of
the mouse buttons. Will be a combination of the values defined
by the EVT_eventModMaskType enumeration.
shift modifiers (Ctrl, Alt and Shift keys) when the event
occurred. For mouse events it will also contain the state of
the mouse buttons. Will be a combination of the values defined
by the EVT_eventModMaskType enumeration.
next - Internal use; do not use.
prev - Internal use; do not use.
****************************************************************************/
@ -555,8 +555,8 @@ different code page translation table if you want to support keyboards
other than the US English keyboard (the default).
NOTE: Entries in code page tables *must* be in ascending order for the
scan codes as we do a binary search on the tables for the ASCII
code equivalents.
scan codes as we do a binary search on the tables for the ASCII
code equivalents.
HEADER:
event.h

31
board/MAI/bios_emulator/scitech/include/pcilib.h
View file

@ -103,14 +103,14 @@ typedef enum {
typedef union {
struct {
uint Zero:2;
uint Register:6;
uint Function:3;
uint Device:5;
uint Bus:8;
uint Reserved:7;
uint Enable:1;
} p;
uint Zero:2;
uint Register:6;
uint Function:3;
uint Device:5;
uint Bus:8;
uint Reserved:7;
uint Enable:1;
} p;
ulong i;
} PCIslot;
@ -194,9 +194,9 @@ typedef struct {
uchar SubordinateBus;
uchar SecondaryLatency;
struct {
ulong Base;
ulong Limit;
} Range[4];
ulong Base;
ulong Limit;
} Range[4];
uchar InterruptLine;
uchar InterruptPin;
ushort BridgeControl;
@ -224,10 +224,10 @@ typedef struct {
uchar HeaderType;
uchar BIST;
union {
PCIType0Info type0;
PCIType1Info type1;
PCIType2Info type2;
} u;
PCIType0Info type0;
PCIType1Info type1;
PCIType2Info type2;
} u;
} PCIDeviceInfo;
/* PCI Capability header structure. All PCI capabilities have the
@ -411,4 +411,3 @@ ulong _ASMAPI PCIBIOS_getEntry(void);
#endif
#endif /* __PCILIB_H */

1
board/MAI/bios_emulator/scitech/include/pm_help.h
View file

@ -164,4 +164,3 @@ typedef enum {
#endif /* !__OS2__ */
#endif /* __PMHELP_H */

1
board/MAI/bios_emulator/scitech/include/pm_wctl.h
View file

@ -73,4 +73,3 @@ PMHELP_CTL_CODE(GASETLOCALPATH ,0x002D),
PMHELP_CTL_CODE(GAGETEXPORTS ,0x002E),
PMHELP_CTL_CODE(GATHUNK ,0x002F),
PMHELP_CTL_CODE(SETNUCLEUSPATH ,0x0030),

1
board/MAI/bios_emulator/scitech/include/pmapi.h
View file

@ -1146,4 +1146,3 @@ int PMAPI PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs);
#endif
#endif /* __PMAPI_H */

1
board/MAI/bios_emulator/scitech/include/pmimp.h
View file

@ -191,4 +191,3 @@ PM_imports _VARAPI _PM_imports = {
NULL,
#endif
};

54
board/MAI/bios_emulator/scitech/include/scitech.h
View file

@ -80,7 +80,7 @@
#ifdef __GNUC__
#ifdef __cplusplus
// G++ currently fucks this up!
/* G++ currently fucks this up! */
#define __cdecl
#define __stdcall
#else
@ -605,18 +605,18 @@ void _ASMAPI DebugVxD(void);
{ \
static ibool firstTime = true; \
if (firstTime) { \
firstTime = false; \
DebugInt(); \
} \
firstTime = false; \
DebugInt(); \
} \
}
#define DebugVxDOnce() \
{ \
static ibool firstTime = true; \
if (firstTime) { \
firstTime = false; \
DebugVxD(); \
} \
firstTime = false; \
DebugVxD(); \
} \
}
/* Macros for linux string compatibility functions */
@ -636,10 +636,10 @@ void _ASMAPI DebugVxD(void);
/* Get rid of some helaciously annoying Visual C++ warnings! */
#if defined(_MSC_VER) && !defined(__MWERKS__) && !defined(__SC__)
#pragma warning(disable:4761) // integral size mismatch in argument; conversion supplied
#pragma warning(disable:4244) // conversion from 'unsigned short ' to 'unsigned char ', possible loss of data
#pragma warning(disable:4018) // '<' : signed/unsigned mismatch
#pragma warning(disable:4305) // 'initializing' : truncation from 'const double' to 'float'
#pragma warning(disable:4761) /* integral size mismatch in argument; conversion supplied */
#pragma warning(disable:4244) /* conversion from 'unsigned short ' to 'unsigned char ', possible loss of data */
#pragma warning(disable:4018) /* '<' : signed/unsigned mismatch */
#pragma warning(disable:4305) /* 'initializing' : truncation from 'const double' to 'float' */
#endif
/*---------------------------------------------------------------------------
@ -674,29 +674,29 @@ void _CHK_defaultFail(int fatal,const char *msg,const char *cond,const char *fil
# define CHK(x) x
#if CHECKED > 1
# define CHECK(p) \
((p) ? (void)0 : DebugInt(), \
_CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
((p) ? (void)0 : DebugInt(), \
_CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
# define WARN(p) \
((p) ? (void)0 : DebugInt(), \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
((p) ? (void)0 : DebugInt(), \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
#else
# define CHECK(p) \
((p) ? (void)0 : \
_CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
((p) ? (void)0 : \
_CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
# define WARN(p) \
((p) ? (void)0 : \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
((p) ? (void)0 : \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
#p, __FILE__, __LINE__))
#endif
# define LOGFATAL(msg) \
_CHK_fail(1,"Fatal error: '%s', file %s, line %d\n", \
msg, __FILE__, __LINE__)
_CHK_fail(1,"Fatal error: '%s', file %s, line %d\n", \
msg, __FILE__, __LINE__)
# define LOGWARN(msg) \
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
msg, __FILE__, __LINE__)
_CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
msg, __FILE__, __LINE__)
#else
# define CHK(x)
# define CHECK(p) ((void)0)

30
board/MAI/bios_emulator/scitech/include/x86emu/regs.h
View file

@ -235,21 +235,21 @@ struct i386_segment_regs {
#define SYSMODE_HALTED 0x40000000
#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS)
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS)
#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS | \
SYSMODE_PREFIX_DATA | \
SYSMODE_PREFIX_ADDR)
SYSMODE_SEGOVR_CS | \
SYSMODE_SEGOVR_DS | \
SYSMODE_SEGOVR_ES | \
SYSMODE_SEGOVR_FS | \
SYSMODE_SEGOVR_GS | \
SYSMODE_SEGOVR_SS | \
SYSMODE_PREFIX_DATA | \
SYSMODE_PREFIX_ADDR)
#define INTR_SYNCH 0x1
#define INTR_ASYNCH 0x2
@ -322,7 +322,7 @@ extern X86EMU_sysEnv _X86EMU_env;
/* Function to log information at runtime */
//void printk(const char *fmt, ...);
/*void printk(const char *fmt, ...); */
#ifdef __cplusplus
} /* End of "C" linkage for C++ */

1
board/MAI/bios_emulator/scitech/makedefs/common.mk
View file

@ -178,4 +178,3 @@ ASFLAGS += -d__SNAP__
# Include file dependencies
.INCLUDE .IGNORE: "makefile.dep"

1
board/MAI/bios_emulator/scitech/makedefs/gcc_linux.mk
View file

@ -178,4 +178,3 @@ PMLIB := -lpm
# Define which file contains our rules
RULES_MAK := gcc_linux.mk

1
board/MAI/bios_emulator/scitech/makedefs/gcc_win32.mk
View file

@ -133,4 +133,3 @@ PMLIB := -lpm
# Define which file contains our rules
RULES_MAK := gcc_win32.mk

1
board/MAI/bios_emulator/scitech/makedefs/qnx4.mk
View file

@ -162,4 +162,3 @@ PMLIB := -lpm
# Define which file contains our rules
RULES_MAK := qnx4.mk

1
board/MAI/bios_emulator/scitech/makedefs/rules/gcc_beos.mk
View file

@ -45,4 +45,3 @@ PMLIB :=
# Implicit rule for building an executable file
%$E: ; $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB)

1
board/MAI/bios_emulator/scitech/makedefs/rules/gcc_linux.mk
View file

@ -91,4 +91,3 @@ LD := $(LDXX)
@$(ECHO) ld $@
@$(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) -lm
.ENDIF

1
board/MAI/bios_emulator/scitech/makedefs/rules/gcc_win32.mk
View file

@ -88,4 +88,3 @@ LD := $(LDXX)
@$(ECHO) ld $@
@$(LD) $(LDFLAGS) -o $@ @$(mktmp $(&:s/\/\\) $(EXELIBS) $(PMLIB) -lm)
.ENDIF

8
board/MAI/bios_emulator/scitech/makedefs/rules/va32.mk
View file

@ -69,14 +69,14 @@ PMLIB :=
# Implicit rule for building an executable file using response file
.IF $(USE_OS2GUI)
%$E: ;
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
.IF $(LXLITE)
lxlite $@
lxlite $@
.ENDIF
.ELSE
%$E: ;
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
.IF $(LXLITE)
lxlite $@
lxlite $@
.ENDIF
.ENDIF

8
board/MAI/bios_emulator/scitech/makedefs/rules/va365.mk
View file

@ -66,14 +66,14 @@ PMLIB :=
# Implicit rule for building an executable file using response file
.IF $(USE_OS2GUI)
%$E: ;
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n)
.IF $(LXLITE)
lxlite $@
lxlite $@
.ENDIF
.ELSE
%$E: ;
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n)
.IF $(LXLITE)
lxlite $@
lxlite $@
.ENDIF
.ENDIF

1
board/MAI/bios_emulator/scitech/makedefs/rules/wc32.mk
View file

@ -262,4 +262,3 @@ dllstart.obj: dllstart.asm
@$(RM) -S $(mktmp *.lnk)
.ENDIF
.ENDIF

1
board/MAI/bios_emulator/scitech/makedefs/startup.mk
View file

@ -159,4 +159,3 @@ __.SILENT := $(.SILENT)
# We dont use TABS in our makefiles
.NOTABS := yes

1
board/MAI/bios_emulator/scitech/makedefs/wc32.mk
View file

@ -351,4 +351,3 @@ LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
# Define which file contains our rules
RULES_MAK := wc32.mk

280
board/MAI/bios_emulator/scitech/src/biosemu/besys.c
View file

@ -77,20 +77,20 @@ u8 X86API BE_rdb(
u8 val = 0;
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
val = *(u8*)(_BE_env.biosmem_base + addr - 0xC0000);
}
val = *(u8*)(_BE_env.biosmem_base + addr - 0xC0000);
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
val = readb(_BE_env.busmem_base, addr - 0xA0000);
}
val = readb(_BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size - 1) {
DB( printk("mem_read: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
val = *(u8*)(M.mem_base + addr);
}
val = *(u8*)(M.mem_base + addr);
}
DB( if (DEBUG_MEM())
printk("%#08x 1 -> %#x\n", addr, val);)
printk("%#08x 1 -> %#x\n", addr, val);)
return val;
}
@ -112,42 +112,42 @@ u16 X86API BE_rdw(
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xC0000;
val = ( *(u8*)(_BE_env.biosmem_base + addr) |
(*(u8*)(_BE_env.biosmem_base + addr + 1) << 8));
}
else
if (addr & 0x1) {
addr -= 0xC0000;
val = ( *(u8*)(_BE_env.biosmem_base + addr) |
(*(u8*)(_BE_env.biosmem_base + addr + 1) << 8));
}
else
#endif
val = *(u16*)(_BE_env.biosmem_base + addr - 0xC0000);
}
val = *(u16*)(_BE_env.biosmem_base + addr - 0xC0000);
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xA0000;
val = ( readb(_BE_env.busmem_base, addr) |
(readb(_BE_env.busmem_base, addr + 1) << 8));
}
else
if (addr & 0x1) {
addr -= 0xA0000;
val = ( readb(_BE_env.busmem_base, addr) |
(readb(_BE_env.busmem_base, addr + 1) << 8));
}
else
#endif
val = readw(_BE_env.busmem_base, addr - 0xA0000);
}
val = readw(_BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size - 2) {
DB( printk("mem_read: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
val = ( *(u8*)(M.mem_base + addr) |
(*(u8*)(M.mem_base + addr + 1) << 8));
}
else
if (addr & 0x1) {
val = ( *(u8*)(M.mem_base + addr) |
(*(u8*)(M.mem_base + addr + 1) << 8));
}
else
#endif
val = *(u16*)(M.mem_base + addr);
}
val = *(u16*)(M.mem_base + addr);
}
DB( if (DEBUG_MEM())
printk("%#08x 2 -> %#x\n", addr, val);)
printk("%#08x 2 -> %#x\n", addr, val);)
return val;
}
@ -169,48 +169,48 @@ u32 X86API BE_rdl(
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
#ifdef __BIG_ENDIAN__
if (addr & 0x3) {
addr -= 0xC0000;
val = ( *(u8*)(_BE_env.biosmem_base + addr + 0) |
(*(u8*)(_BE_env.biosmem_base + addr + 1) << 8) |
(*(u8*)(_BE_env.biosmem_base + addr + 2) << 16) |
(*(u8*)(_BE_env.biosmem_base + addr + 3) << 24));
}
else
if (addr & 0x3) {
addr -= 0xC0000;
val = ( *(u8*)(_BE_env.biosmem_base + addr + 0) |
(*(u8*)(_BE_env.biosmem_base + addr + 1) << 8) |
(*(u8*)(_BE_env.biosmem_base + addr + 2) << 16) |
(*(u8*)(_BE_env.biosmem_base + addr + 3) << 24));
}
else
#endif
val = *(u32*)(_BE_env.biosmem_base + addr - 0xC0000);
}
val = *(u32*)(_BE_env.biosmem_base + addr - 0xC0000);
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
#ifdef __BIG_ENDIAN__
if (addr & 0x3) {
addr -= 0xA0000;
val = ( readb(_BE_env.busmem_base, addr) |
(readb(_BE_env.busmem_base, addr + 1) << 8) |
(readb(_BE_env.busmem_base, addr + 2) << 16) |
(readb(_BE_env.busmem_base, addr + 3) << 24));
}
else
if (addr & 0x3) {
addr -= 0xA0000;
val = ( readb(_BE_env.busmem_base, addr) |
(readb(_BE_env.busmem_base, addr + 1) << 8) |
(readb(_BE_env.busmem_base, addr + 2) << 16) |
(readb(_BE_env.busmem_base, addr + 3) << 24));
}
else
#endif
val = readl(_BE_env.busmem_base, addr - 0xA0000);
}
val = readl(_BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size - 4) {
DB( printk("mem_read: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x3) {
val = ( *(u8*)(M.mem_base + addr + 0) |
(*(u8*)(M.mem_base + addr + 1) << 8) |
(*(u8*)(M.mem_base + addr + 2) << 16) |
(*(u8*)(M.mem_base + addr + 3) << 24));
}
else
if (addr & 0x3) {
val = ( *(u8*)(M.mem_base + addr + 0) |
(*(u8*)(M.mem_base + addr + 1) << 8) |
(*(u8*)(M.mem_base + addr + 2) << 16) |
(*(u8*)(M.mem_base + addr + 3) << 24));
}
else
#endif
val = *(u32*)(M.mem_base + addr);
}
val = *(u32*)(M.mem_base + addr);
}
DB( if (DEBUG_MEM())
printk("%#08x 4 -> %#x\n", addr, val);)
printk("%#08x 4 -> %#x\n", addr, val);)
return val;
}
@ -228,20 +228,20 @@ void X86API BE_wrb(
u8 val)
{
DB( if (DEBUG_MEM())
printk("%#08x 1 <- %#x\n", addr, val);)
printk("%#08x 1 <- %#x\n", addr, val);)
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
*(u8*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
}
*(u8*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
writeb(val, _BE_env.busmem_base, addr - 0xA0000);
}
writeb(val, _BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size-1) {
DB( printk("mem_write: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
*(u8*)(M.mem_base + addr) = val;
}
*(u8*)(M.mem_base + addr) = val;
}
}
/****************************************************************************
@ -258,43 +258,43 @@ void X86API BE_wrw(
u16 val)
{
DB( if (DEBUG_MEM())
printk("%#08x 2 <- %#x\n", addr, val);)
printk("%#08x 2 <- %#x\n", addr, val);)
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xC0000;
*(u8*)(_BE_env.biosmem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(_BE_env.biosmem_base + addr + 1) = (val >> 8) & 0xff;
}
else
if (addr & 0x1) {
addr -= 0xC0000;
*(u8*)(_BE_env.biosmem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(_BE_env.biosmem_base + addr + 1) = (val >> 8) & 0xff;
}
else
#endif
*(u16*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
}
*(u16*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xA0000;
writeb(val >> 0, _BE_env.busmem_base, addr);
writeb(val >> 8, _BE_env.busmem_base, addr + 1);
}
else
if (addr & 0x1) {
addr -= 0xA0000;
writeb(val >> 0, _BE_env.busmem_base, addr);
writeb(val >> 8, _BE_env.busmem_base, addr + 1);
}
else
#endif
writew(val, _BE_env.busmem_base, addr - 0xA0000);
}
writew(val, _BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size-2) {
DB( printk("mem_write: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
}
else
if (addr & 0x1) {
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
}
else
#endif
*(u16*)(M.mem_base + addr) = val;
}
*(u16*)(M.mem_base + addr) = val;
}
}
/****************************************************************************
@ -311,49 +311,49 @@ void X86API BE_wrl(
u32 val)
{
DB( if (DEBUG_MEM())
printk("%#08x 4 <- %#x\n", addr, val);)
printk("%#08x 4 <- %#x\n", addr, val);)
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
addr -= 0xC0000;
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
*(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
*(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
}
else
if (addr & 0x1) {
addr -= 0xC0000;
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
*(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
*(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
}
else
#endif
*(u32*)(M.mem_base + addr - 0xC0000) = val;
}
*(u32*)(M.mem_base + addr - 0xC0000) = val;
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
#ifdef __BIG_ENDIAN__
if (addr & 0x3) {
addr -= 0xA0000;
writeb(val >> 0, _BE_env.busmem_base, addr);
writeb(val >> 8, _BE_env.busmem_base, addr + 1);
writeb(val >> 16, _BE_env.busmem_base, addr + 1);
writeb(val >> 24, _BE_env.busmem_base, addr + 1);
}
else
if (addr & 0x3) {
addr -= 0xA0000;
writeb(val >> 0, _BE_env.busmem_base, addr);
writeb(val >> 8, _BE_env.busmem_base, addr + 1);
writeb(val >> 16, _BE_env.busmem_base, addr + 1);
writeb(val >> 24, _BE_env.busmem_base, addr + 1);
}
else
#endif
writel(val, _BE_env.busmem_base, addr - 0xA0000);
}
writel(val, _BE_env.busmem_base, addr - 0xA0000);
}
else if (addr > M.mem_size-4) {
DB( printk("mem_write: address %#lx out of range!\n", addr);)
HALT_SYS();
}
HALT_SYS();
}
else {
#ifdef __BIG_ENDIAN__
if (addr & 0x1) {
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
*(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
*(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
}
else
if (addr & 0x1) {
*(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
*(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
*(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
*(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
}
else
#endif
*(u32*)(M.mem_base + addr) = val;
}
*(u32*)(M.mem_base + addr) = val;
}
}
/* Debug functions to do ISA/PCI bus port I/O */
@ -365,7 +365,7 @@ u8 X86API BE_inb(int port)
{
u8 val = PM_inpb(port);
if (DEBUG_IO())
printk("%04X:%04X: inb.%04X -> %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: inb.%04X -> %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
return val;
}
@ -373,7 +373,7 @@ u16 X86API BE_inw(int port)
{
u16 val = PM_inpw(port);
if (DEBUG_IO())
printk("%04X:%04X: inw.%04X -> %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: inw.%04X -> %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
return val;
}
@ -381,28 +381,28 @@ u32 X86API BE_inl(int port)
{
u32 val = PM_inpd(port);
if (DEBUG_IO())
printk("%04X:%04X: inl.%04X -> %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: inl.%04X -> %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
return val;
}
void X86API BE_outb(int port, u8 val)
{
if (DEBUG_IO())
printk("%04X:%04X: outb.%04X <- %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: outb.%04X <- %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
PM_outpb(port,val);
}
void X86API BE_outw(int port, u16 val)
{
if (DEBUG_IO())
printk("%04X:%04X: outw.%04X <- %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: outw.%04X <- %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
PM_outpw(port,val);
}
void X86API BE_outl(int port, u32 val)
{
if (DEBUG_IO())
printk("%04X:%04X: outl.%04X <- %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
printk("%04X:%04X: outl.%04X <- %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
PM_outpd(port,val);
}
#endif

204
board/MAI/bios_emulator/scitech/src/biosemu/bios.c
View file

@ -50,9 +50,9 @@ static void X86API undefined_intr(
int intno)
{
if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
printk("biosEmu: undefined interrupt %xh called!\n",intno);
printk("biosEmu: undefined interrupt %xh called!\n",intno);
else
X86EMU_prepareForInt(intno);
X86EMU_prepareForInt(intno);
}
/****************************************************************************
@ -68,26 +68,26 @@ static void X86API int42(
int intno)
{
if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {
if (M.x86.R_AL == 0) {
/* Enable CPU accesses to video memory */
PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8)0x02);
return;
}
else if (M.x86.R_AL == 1) {
/* Disable CPU accesses to video memory */
PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8)~0x02);
return;
}
if (M.x86.R_AL == 0) {
/* Enable CPU accesses to video memory */
PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8)0x02);
return;
}
else if (M.x86.R_AL == 1) {
/* Disable CPU accesses to video memory */
PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8)~0x02);
return;
}
#ifdef DEBUG
else {
printk("biosEmu/bios.int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",M.x86.R_AL);
}
else {
printk("biosEmu/bios.int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",M.x86.R_AL);
}
#endif
}
}
#ifdef DEBUG
else {
printk("biosEmu/bios.int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
}
printk("biosEmu/bios.int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
}
#endif
}
@ -106,9 +106,9 @@ static void X86API int10(
int intno)
{
if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
int42(intno);
int42(intno);
else
X86EMU_prepareForInt(intno);
X86EMU_prepareForInt(intno);
}
/* Result codes returned by the PCI BIOS */
@ -142,87 +142,87 @@ static void X86API int1A(
/* Fail if no PCI device information has been registered */
if (!_BE_env.vgaInfo.pciInfo)
return;
return;
pciSlot = (u16)(_BE_env.vgaInfo.pciInfo->slot.i >> 8);
switch (M.x86.R_AX) {
case 0xB101: /* PCI bios present? */
M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
M.x86.R_EDX = 0x20494350; /* " ICP" */
M.x86.R_BX = 0x0210; /* Version 2.10 */
M.x86.R_CL = 0; /* Max bus number in system */
CLEAR_FLAG(F_CF);
break;
case 0xB102: /* Find PCI device */
M.x86.R_AH = DEVICE_NOT_FOUND;
if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
M.x86.R_SI == 0) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_BX = pciSlot;
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB103: /* Find PCI class code */
M.x86.R_AH = DEVICE_NOT_FOUND;
if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
(u8)(M.x86.R_ECX >> 16) == _BE_env.vgaInfo.pciInfo->BaseClass) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_BX = pciSlot;
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB108: /* Read configuration byte */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_CL = (u8)PCI_accessReg(M.x86.R_DI,0,PCI_READ_BYTE,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB109: /* Read configuration word */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_CX = (u16)PCI_accessReg(M.x86.R_DI,0,PCI_READ_WORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10A: /* Read configuration dword */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_ECX = (u32)PCI_accessReg(M.x86.R_DI,0,PCI_READ_DWORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10B: /* Write configuration byte */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_CL,PCI_WRITE_BYTE,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10C: /* Write configuration word */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_CX,PCI_WRITE_WORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10D: /* Write configuration dword */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_ECX,PCI_WRITE_DWORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
default:
printk("biosEmu/bios.int1a: unknown function AX=%#04x\n", M.x86.R_AX);
}
case 0xB101: /* PCI bios present? */
M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
M.x86.R_EDX = 0x20494350; /* " ICP" */
M.x86.R_BX = 0x0210; /* Version 2.10 */
M.x86.R_CL = 0; /* Max bus number in system */
CLEAR_FLAG(F_CF);
break;
case 0xB102: /* Find PCI device */
M.x86.R_AH = DEVICE_NOT_FOUND;
if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
M.x86.R_SI == 0) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_BX = pciSlot;
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB103: /* Find PCI class code */
M.x86.R_AH = DEVICE_NOT_FOUND;
if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
(u8)(M.x86.R_ECX >> 16) == _BE_env.vgaInfo.pciInfo->BaseClass) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_BX = pciSlot;
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB108: /* Read configuration byte */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_CL = (u8)PCI_accessReg(M.x86.R_DI,0,PCI_READ_BYTE,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB109: /* Read configuration word */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_CX = (u16)PCI_accessReg(M.x86.R_DI,0,PCI_READ_WORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10A: /* Read configuration dword */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
M.x86.R_ECX = (u32)PCI_accessReg(M.x86.R_DI,0,PCI_READ_DWORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10B: /* Write configuration byte */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_CL,PCI_WRITE_BYTE,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10C: /* Write configuration word */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_CX,PCI_WRITE_WORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
case 0xB10D: /* Write configuration dword */
M.x86.R_AH = BAD_REGISTER_NUMBER;
if (M.x86.R_BX == pciSlot) {
M.x86.R_AH = SUCCESSFUL;
PCI_accessReg(M.x86.R_DI,M.x86.R_ECX,PCI_WRITE_DWORD,_BE_env.vgaInfo.pciInfo);
}
CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
break;
default:
printk("biosEmu/bios.int1a: unknown function AX=%#04x\n", M.x86.R_AX);
}
}
/****************************************************************************
@ -240,9 +240,9 @@ void _BE_bios_init(
X86EMU_intrFuncs bios_intr_tab[256];
for (i = 0; i < 256; ++i) {
intrTab[i] = BIOS_SEG << 16;
bios_intr_tab[i] = undefined_intr;
}
intrTab[i] = BIOS_SEG << 16;
bios_intr_tab[i] = undefined_intr;
}
bios_intr_tab[0x10] = int10;
bios_intr_tab[0x1A] = int1A;
bios_intr_tab[0x42] = int42;

66
board/MAI/bios_emulator/scitech/src/biosemu/biosemu.c
View file

@ -100,9 +100,9 @@ ibool PMAPI BE_init(
#endif
memset(&M,0,sizeof(M));
if (memSize < 20480)
PM_fatalError("Emulator requires at least 20Kb of memory!\n");
PM_fatalError("Emulator requires at least 20Kb of memory!\n");
if ((M.mem_base = (unsigned long)malloc(memSize)) == NULL)
PM_fatalError("Out of memory!");
PM_fatalError("Out of memory!");
M.mem_size = memSize;
_BE_env.busmem_base = (ulong)PM_mapPhysicalAddr(0xA0000,0x5FFFF,true);
M.x86.debug = debugFlags;
@ -144,15 +144,15 @@ void PMAPI BE_setVGA(
_BE_env.vgaInfo.pciInfo = info->pciInfo;
_BE_env.vgaInfo.BIOSImage = info->BIOSImage;
if (info->BIOSImage) {
_BE_env.biosmem_base = (ulong)info->BIOSImage;
_BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen-1;
}
_BE_env.biosmem_base = (ulong)info->BIOSImage;
_BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen-1;
}
else {
_BE_env.biosmem_base = _BE_env.busmem_base + 0x20000;
_BE_env.biosmem_limit = 0xC7FFF;
}
_BE_env.biosmem_base = _BE_env.busmem_base + 0x20000;
_BE_env.biosmem_limit = 0xC7FFF;
}
if (*((u32*)info->LowMem) == 0)
_BE_bios_init((u32*)info->LowMem);
_BE_bios_init((u32*)info->LowMem);
memcpy((u8*)M.mem_base,info->LowMem,sizeof(info->LowMem));
}
@ -182,8 +182,8 @@ This function maps a real mode pointer in the emulator memory to a protected
mode pointer that can be used to directly access the memory.
NOTE: The memory is *always* in little endian format, son on non-x86
systems you will need to do endian translations to access this
memory.
systems you will need to do endian translations to access this
memory.
****************************************************************************/
void * PMAPI BE_mapRealPointer(
uint r_seg,
@ -192,11 +192,11 @@ void * PMAPI BE_mapRealPointer(
u32 addr = ((u32)r_seg << 4) + r_off;
if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
return (void*)(_BE_env.biosmem_base + addr - 0xC0000);
}
return (void*)(_BE_env.biosmem_base + addr - 0xC0000);
}
else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
return (void*)(_BE_env.busmem_base + addr - 0xA0000);
}
return (void*)(_BE_env.busmem_base + addr - 0xA0000);
}
return (void*)(M.mem_base + addr);
}
@ -213,8 +213,8 @@ and located at 15Kb into the start of the real mode memory (16Kb is where
we put the real mode code we execute for issuing interrupts).
NOTE: The memory is *always* in little endian format, son on non-x86
systems you will need to do endian translations to access this
memory.
systems you will need to do endian translations to access this
memory.
****************************************************************************/
void * PMAPI BE_getVESABuf(
uint *len,
@ -416,28 +416,28 @@ BE_exports * _CEXPORT BE_initLibrary(
PM_imports *pmImp)
{
static BE_exports _BE_exports = {
sizeof(BE_exports),
BE_init,
BE_setVGA,
BE_getVGA,
BE_mapRealPointer,
BE_getVESABuf,
BE_callRealMode,
BE_int86,
BE_int86x,
NULL,
BE_exit,
};
sizeof(BE_exports),
BE_init,
BE_setVGA,
BE_getVGA,
BE_mapRealPointer,
BE_getVESABuf,
BE_callRealMode,
BE_int86,
BE_int86x,
NULL,
BE_exit,
};
int i,max;
ulong *p;
// Initialize all default imports to point to fatal error handler
// for upwards compatibility.
/* Initialize all default imports to point to fatal error handler */
/* for upwards compatibility. */
max = sizeof(_PM_imports)/sizeof(BE_initLibrary_t);
for (i = 0,p = (ulong*)&_PM_imports; i < max; i++)
*p++ = (ulong)_PM_fatalErrorHandler;
*p++ = (ulong)_PM_fatalErrorHandler;
// Now copy all our imported functions
/* Now copy all our imported functions */
memcpy(&_PM_imports,pmImp,MIN(sizeof(_PM_imports),pmImp->dwSize));
return &_BE_exports;
}

580
board/MAI/bios_emulator/scitech/src/biosemu/warmboot.c
View file

@ -112,16 +112,16 @@ static ulong PCI_findBIOSAddr(
int bar;
for (bar = 0x10; bar <= 0x14; bar++) {
base = PCI_readPCIRegL(bar,device) & ~0xFF;
if (!(base & 0x1)) {
PCI_writePCIRegL(bar,0xFFFFFFFF,device);
size = PCI_readPCIRegL(bar,device) & ~0xFF;
size = ~size+1;
PCI_writePCIRegL(bar,0,device);
if (size >= MAX_BIOSLEN)
return base;
}
}
base = PCI_readPCIRegL(bar,device) & ~0xFF;
if (!(base & 0x1)) {
PCI_writePCIRegL(bar,0xFFFFFFFF,device);
size = PCI_readPCIRegL(bar,device) & ~0xFF;
size = ~size+1;
PCI_writePCIRegL(bar,0,device);
if (size >= MAX_BIOSLEN)
return base;
}
}
return 0;
}
@ -138,13 +138,13 @@ static void _PCI_fixupSecondaryBARs(void)
int i;
for (i = 0; i < NumDevices; i++) {
PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i);
PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i);
PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i);
PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i);
PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i);
PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i);
}
PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i);
PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i);
PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i);
PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i);
PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i);
PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i);
}
}
/****************************************************************************
@ -165,29 +165,29 @@ static void PCI_doBIOSPOST(
RMREGS regs;
RMSREGS sregs;
// Determine the value to store in AX for BIOS POST
/* Determine the value to store in AX for BIOS POST */
regs.x.ax = (u16)(PCI[DeviceIndex[device]].slot.i >> 8);
if (useV86) {
// Post the BIOS using the PM functions (ie: v86 mode on Linux)
if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) {
// If the PM function fails, this probably means are we are on
// DOS and can't re-map the real mode 0xC0000 region. In thise
// case if the device is the primary, we can use the real
// BIOS at 0xC0000 directly.
if (device == 0)
PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen);
}
}
/* Post the BIOS using the PM functions (ie: v86 mode on Linux) */
if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) {
/* If the PM function fails, this probably means are we are on */
/* DOS and can't re-map the real mode 0xC0000 region. In thise */
/* case if the device is the primary, we can use the real */
/* BIOS at 0xC0000 directly. */
if (device == 0)
PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen);
}
}
else {
// Setup the X86 emulator for the VGA BIOS
BE_setVGA(&VGAInfo[device]);
/* Setup the X86 emulator for the VGA BIOS */
BE_setVGA(&VGAInfo[device]);
// Execute the BIOS POST code
BE_callRealMode(0xC000,0x0003,&regs,&sregs);
/* Execute the BIOS POST code */
BE_callRealMode(0xC000,0x0003,&regs,&sregs);
// Cleanup and exit
BE_getVGA(&VGAInfo[device]);
}
/* Cleanup and exit */
BE_getVGA(&VGAInfo[device]);
}
}
/****************************************************************************
@ -206,113 +206,113 @@ static ibool PCI_postControllers(void)
char filename[_MAX_PATH];
FILE *f;
// Disable the primary display controller and AGP VGA pass-through
/* Disable the primary display controller and AGP VGA pass-through */
DISABLE_DEVICE(0);
if (AGPBridge)
DISABLE_AGP_VGA();
DISABLE_AGP_VGA();
// Now POST all the secondary controllers
/* Now POST all the secondary controllers */
for (device = 0; device < NumDevices; device++) {
// Skip the device if it is not enabled (probably an ISA device)
if (DeviceIndex[device] == -1)
continue;
/* Skip the device if it is not enabled (probably an ISA device) */
if (DeviceIndex[device] == -1)
continue;
// Enable secondary display controller. If the secondary controller
// is on the AGP bus, then enable VGA resources for the AGP device.
ENABLE_DEVICE(device);
if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus)
ENABLE_AGP_VGA();
/* Enable secondary display controller. If the secondary controller */
/* is on the AGP bus, then enable VGA resources for the AGP device. */
ENABLE_DEVICE(device);
if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus)
ENABLE_AGP_VGA();
// Check if the controller has already been POST'ed
if (VGA_NOT_ACTIVE()) {
// Find a viable place to map the secondary PCI BIOS image and map it
printk("Device %d not enabled, so attempting warm boot it\n", device);
/* Check if the controller has already been POST'ed */
if (VGA_NOT_ACTIVE()) {
/* Find a viable place to map the secondary PCI BIOS image and map it */
printk("Device %d not enabled, so attempting warm boot it\n", device);
// For AGP devices (and PCI devices that do have the ROM base
// address zero'ed out) we have to map the BIOS to a location
// that is passed by the AGP bridge to the bus. Some AGP devices
// have the ROM base address already set up for us, and some
// do not (we map to one of the existing BAR locations in
// this case).
mappedBIOS = NULL;
if (PCI[DeviceIndex[device]].ROMBaseAddress != 0)
mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF;
else
mappedBIOSPhys = PCI_findBIOSAddr(device);
printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys);
mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false);
PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device);
BIOSImageLen = mappedBIOS[2] * 512;
if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL)
return false;
memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen);
PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
/* For AGP devices (and PCI devices that do have the ROM base */
/* address zero'ed out) we have to map the BIOS to a location */
/* that is passed by the AGP bridge to the bus. Some AGP devices */
/* have the ROM base address already set up for us, and some */
/* do not (we map to one of the existing BAR locations in */
/* this case). */
mappedBIOS = NULL;
if (PCI[DeviceIndex[device]].ROMBaseAddress != 0)
mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF;
else
mappedBIOSPhys = PCI_findBIOSAddr(device);
printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys);
mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false);
PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device);
BIOSImageLen = mappedBIOS[2] * 512;
if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL)
return false;
memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen);
PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
// Allocate memory to store copy of BIOS from secondary controllers
VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
VGAInfo[device].BIOSImage = copyOfBIOS;
VGAInfo[device].BIOSImageLen = BIOSImageLen;
/* Allocate memory to store copy of BIOS from secondary controllers */
VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
VGAInfo[device].BIOSImage = copyOfBIOS;
VGAInfo[device].BIOSImageLen = BIOSImageLen;
// Restore device mappings
PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device);
PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device);
PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device);
/* Restore device mappings */
PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device);
PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device);
PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device);
// Now execute the BIOS POST for the device
if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) {
printk("Executing BIOS POST for controller.\n");
PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen);
}
/* Now execute the BIOS POST for the device */
if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) {
printk("Executing BIOS POST for controller.\n");
PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen);
}
// Reset the size of the BIOS image to the final size
VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
/* Reset the size of the BIOS image to the final size */
VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
// Save the BIOS and interrupt vector information to disk
sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
if ((f = fopen(filename,"wb")) != NULL) {
fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f);
fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
fclose(f);
}
}
else {
// Allocate memory to store copy of BIOS from secondary controllers
if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL)
return false;
VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
VGAInfo[device].BIOSImage = copyOfBIOS;
VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
/* Save the BIOS and interrupt vector information to disk */
sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
if ((f = fopen(filename,"wb")) != NULL) {
fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f);
fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
fclose(f);
}
}
else {
/* Allocate memory to store copy of BIOS from secondary controllers */
if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL)
return false;
VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
VGAInfo[device].BIOSImage = copyOfBIOS;
VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
// Load the BIOS and interrupt vector information from disk
sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
if ((f = fopen(filename,"rb")) != NULL) {
fread(copyOfBIOS,1,FINAL_BIOSLEN,f);
fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
fclose(f);
}
}
/* Load the BIOS and interrupt vector information from disk */
sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
if ((f = fopen(filename,"rb")) != NULL) {
fread(copyOfBIOS,1,FINAL_BIOSLEN,f);
fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
fclose(f);
}
}
// Fix up all the secondary PCI base address registers
// (restores them all from the values we read previously)
_PCI_fixupSecondaryBARs();
/* Fix up all the secondary PCI base address registers */
/* (restores them all from the values we read previously) */
_PCI_fixupSecondaryBARs();
// Disable the secondary controller and AGP VGA pass-through
DISABLE_DEVICE(device);
if (AGPBridge)
DISABLE_AGP_VGA();
}
/* Disable the secondary controller and AGP VGA pass-through */
DISABLE_DEVICE(device);
if (AGPBridge)
DISABLE_AGP_VGA();
}
// Reenable primary display controller and reset AGP bridge control
/* Reenable primary display controller and reset AGP bridge control */
if (AGPBridge)
RESTORE_AGP_VGA();
RESTORE_AGP_VGA();
ENABLE_DEVICE(0);
// Free physical BIOS image mapping
/* Free physical BIOS image mapping */
PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
// Restore the X86 emulator BIOS info to primary controller
/* Restore the X86 emulator BIOS info to primary controller */
if (!useV86)
BE_setVGA(&VGAInfo[0]);
BE_setVGA(&VGAInfo[0]);
return true;
}
@ -327,123 +327,123 @@ static void EnumeratePCI(void)
PCIBridgeInfo *info;
printk("Displaying enumeration of PCI bus (%d devices, %d display devices)\n",
NumPCI, NumDevices);
NumPCI, NumDevices);
for (index = 0; index < NumDevices; index++)
printk(" Display device %d is PCI device %d\n",index,DeviceIndex[index]);
printk(" Display device %d is PCI device %d\n",index,DeviceIndex[index]);
printk("\n");
printk("Bus Slot Fnc DeviceID SubSystem Rev Class IRQ Int Cmd\n");
for (i = 0; i < NumPCI; i++) {
printk("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ",
PCI[i].slot.p.Bus,
PCI[i].slot.p.Device,
PCI[i].slot.p.Function,
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].SubSystemVendorID,
PCI[i].SubSystemID,
PCI[i].RevID,
PCI[i].BaseClass,
PCI[i].SubClass,
PCI[i].InterruptLine,
PCI[i].InterruptPin,
PCI[i].Command);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ",
PCI[i].slot.p.Bus,
PCI[i].slot.p.Device,
PCI[i].slot.p.Function,
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].SubSystemVendorID,
PCI[i].SubSystemID,
PCI[i].RevID,
PCI[i].BaseClass,
PCI[i].SubClass,
PCI[i].InterruptLine,
PCI[i].InterruptPin,
PCI[i].Command);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("\n");
printk("DeviceID Stat Ifc Cch Lat Hdr BIST\n");
for (i = 0; i < NumPCI; i++) {
printk("%04X:%04X %04X %02X %02X %02X %02X %02X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].Status,
PCI[i].Interface,
PCI[i].CacheLineSize,
PCI[i].LatencyTimer,
PCI[i].HeaderType,
PCI[i].BIST);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("%04X:%04X %04X %02X %02X %02X %02X %02X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].Status,
PCI[i].Interface,
PCI[i].CacheLineSize,
PCI[i].LatencyTimer,
PCI[i].HeaderType,
PCI[i].BIST);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("\n");
printk("DeviceID Base10h Base14h Base18h Base1Ch Base20h Base24h ROMBase\n");
for (i = 0; i < NumPCI; i++) {
printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].BaseAddress10,
PCI[i].BaseAddress14,
PCI[i].BaseAddress18,
PCI[i].BaseAddress1C,
PCI[i].BaseAddress20,
PCI[i].BaseAddress24,
PCI[i].ROMBaseAddress);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].BaseAddress10,
PCI[i].BaseAddress14,
PCI[i].BaseAddress18,
PCI[i].BaseAddress1C,
PCI[i].BaseAddress20,
PCI[i].BaseAddress24,
PCI[i].ROMBaseAddress);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("\n");
printk("DeviceID BAR10Len BAR14Len BAR18Len BAR1CLen BAR20Len BAR24Len ROMLen\n");
for (i = 0; i < NumPCI; i++) {
printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].BaseAddress10Len,
PCI[i].BaseAddress14Len,
PCI[i].BaseAddress18Len,
PCI[i].BaseAddress1CLen,
PCI[i].BaseAddress20Len,
PCI[i].BaseAddress24Len,
PCI[i].ROMBaseAddressLen);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
PCI[i].VendorID,
PCI[i].DeviceID,
PCI[i].BaseAddress10Len,
PCI[i].BaseAddress14Len,
PCI[i].BaseAddress18Len,
PCI[i].BaseAddress1CLen,
PCI[i].BaseAddress20Len,
PCI[i].BaseAddress24Len,
PCI[i].ROMBaseAddressLen);
for (index = 0; index < NumDevices; index++) {
if (DeviceIndex[index] == i)
break;
}
if (index < NumDevices)
printk("<- %d\n", index);
else
printk("\n");
}
printk("\n");
printk("Displaying enumeration of %d bridge devices\n",NumBridges);
printk("\n");
printk("DeviceID P# S# B# IOB IOL MemBase MemLimit PreBase PreLimit Ctrl\n");
for (i = 0; i < NumBridges; i++) {
info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]];
printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
info->VendorID,
info->DeviceID,
info->PrimaryBusNumber,
info->SecondayBusNumber,
info->SubordinateBusNumber,
((u16)info->IOBase << 8) & 0xF000,
info->IOLimit ?
((u16)info->IOLimit << 8) | 0xFFF : 0,
((u32)info->MemoryBase << 16) & 0xFFF00000,
info->MemoryLimit ?
((u32)info->MemoryLimit << 16) | 0xFFFFF : 0,
((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000,
info->PrefetchableMemoryLimit ?
((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
info->BridgeControl);
}
info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]];
printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
info->VendorID,
info->DeviceID,
info->PrimaryBusNumber,
info->SecondayBusNumber,
info->SubordinateBusNumber,
((u16)info->IOBase << 8) & 0xF000,
info->IOLimit ?
((u16)info->IOLimit << 8) | 0xFFF : 0,
((u32)info->MemoryBase << 16) & 0xFFF00000,
info->MemoryLimit ?
((u32)info->MemoryLimit << 16) | 0xFFFFF : 0,
((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000,
info->PrefetchableMemoryLimit ?
((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
info->BridgeControl);
}
printk("\n");
}
@ -460,51 +460,51 @@ static int PCI_enumerateDevices(void)
int i,j;
PCIBridgeInfo *info;
// If this is the first time we have been called, enumerate all
// devices on the PCI bus.
/* If this is the first time we have been called, enumerate all */
/* devices on the PCI bus. */
if (NumPCI == -1) {
for (i = 0; i < MAX_PCI_DEVICES; i++)
PCI[i].dwSize = sizeof(PCI[i]);
if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0)
return -1;
for (i = 0; i < MAX_PCI_DEVICES; i++)
PCI[i].dwSize = sizeof(PCI[i]);
if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0)
return -1;
// Build a list of all PCI bridge devices
for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) {
if (NumBridges < MAX_PCI_DEVICES)
BridgeIndex[NumBridges++] = i;
}
}
/* Build a list of all PCI bridge devices */
for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) {
if (NumBridges < MAX_PCI_DEVICES)
BridgeIndex[NumBridges++] = i;
}
}
// Now build a list of all display class devices
for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
if ((PCI[i].Command & 0x3) == 0x3) {
DeviceIndex[0] = i;
}
else {
if (NumDevices < MAX_PCI_DEVICES)
DeviceIndex[NumDevices++] = i;
}
if (PCI[i].slot.p.Bus != 0) {
// This device is on a different bus than the primary
// PCI bus, so it is probably an AGP device. Find the
// AGP bus device that controls that bus so we can
// control it.
for (j = 0; j < NumBridges; j++) {
info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]];
if (info->SecondayBusNumber == PCI[i].slot.p.Bus) {
AGPBridge = info;
break;
}
}
}
}
}
/* Now build a list of all display class devices */
for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
if ((PCI[i].Command & 0x3) == 0x3) {
DeviceIndex[0] = i;
}
else {
if (NumDevices < MAX_PCI_DEVICES)
DeviceIndex[NumDevices++] = i;
}
if (PCI[i].slot.p.Bus != 0) {
/* This device is on a different bus than the primary */
/* PCI bus, so it is probably an AGP device. Find the */
/* AGP bus device that controls that bus so we can */
/* control it. */
for (j = 0; j < NumBridges; j++) {
info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]];
if (info->SecondayBusNumber == PCI[i].slot.p.Bus) {
AGPBridge = info;
break;
}
}
}
}
}
// Enumerate all PCI and bridge devices to log file
EnumeratePCI();
}
/* Enumerate all PCI and bridge devices to log file */
EnumeratePCI();
}
return NumDevices;
}
@ -522,48 +522,48 @@ void printk(const char *fmt, ...)
int main(int argc,char *argv[])
{
while (argc > 1) {
if (stricmp(argv[1],"-usev86") == 0) {
useV86 = true;
}
else if (stricmp(argv[1],"-force") == 0) {
forcePost = true;
}
if (stricmp(argv[1],"-usev86") == 0) {
useV86 = true;
}
else if (stricmp(argv[1],"-force") == 0) {
forcePost = true;
}
#ifdef DEBUG
else if (stricmp(argv[1],"-decode") == 0) {
debugFlags |= DEBUG_DECODE_F;
}
else if (stricmp(argv[1],"-iotrace") == 0) {
debugFlags |= DEBUG_IO_TRACE_F;
}
else if (stricmp(argv[1],"-decode") == 0) {
debugFlags |= DEBUG_DECODE_F;
}
else if (stricmp(argv[1],"-iotrace") == 0) {
debugFlags |= DEBUG_IO_TRACE_F;
}
#endif
else {
printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n");
exit(-1);
}
argc--;
argv++;
}
else {
printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n");
exit(-1);
}
argc--;
argv++;
}
if ((logfile = fopen("warmboot.log","w")) == NULL)
exit(1);
exit(1);
PM_init();
if (!useV86) {
// Initialise the x86 BIOS emulator
BE_init(false,debugFlags,65536,&VGAInfo[0]);
}
/* Initialise the x86 BIOS emulator */
BE_init(false,debugFlags,65536,&VGAInfo[0]);
}
// Enumerate all devices (which POST's them at the same time)
/* Enumerate all devices (which POST's them at the same time) */
if (PCI_enumerateDevices() < 1) {
printk("No PCI display devices found!\n");
return -1;
}
printk("No PCI display devices found!\n");
return -1;
}
// Post all the display controller BIOS'es
/* Post all the display controller BIOS'es */
PCI_postControllers();
// Cleanup and exit the emulator
/* Cleanup and exit the emulator */
if (!useV86)
BE_exit();
BE_exit();
fclose(logfile);
return 0;
}

14
board/MAI/bios_emulator/scitech/src/common/aabeos.c
View file

@ -70,7 +70,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@ -82,11 +82,11 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
}

2
board/MAI/bios_emulator/scitech/src/common/aados.c
View file

@ -49,7 +49,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
return true;
return true;
return false;
}

52
board/MAI/bios_emulator/scitech/src/common/aalib.c
View file

@ -100,35 +100,35 @@ static ibool LoadDriver(void)
/* Check if we have already loaded the driver */
if (loaded)
return true;
return true;
PM_init();
_AA_exports.dwSize = sizeof(_AA_exports);
/* Open the BPD file */
if (!PM_findBPD(DLL_NAME,bpdpath))
return false;
return false;
strcpy(filename,bpdpath);
strcat(filename,DLL_NAME);
if ((hModBPD = PE_loadLibrary(filename,false)) == NULL)
return false;
return false;
if ((AA_initLibrary = (AA_initLibrary_t)PE_getProcAddress(hModBPD,"_AA_initLibrary")) == NULL)
return false;
return false;
bpdpath[strlen(bpdpath)-1] = 0;
if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
strcpy(bpdpath,PM_getNucleusConfigPath());
strcpy(bpdpath,PM_getNucleusConfigPath());
else {
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
if ((aaExp = AA_initLibrary(bpdpath,filename,&_PM_imports,&_N_imports,&_AA_imports)) == NULL)
PM_fatalError("AA_initLibrary failed!\n");
PM_fatalError("AA_initLibrary failed!\n");
/* Initialize all default imports to point to fatal error handler
* for upwards compatibility, and copy the exported functions.
*/
max = sizeof(_AA_exports)/sizeof(AA_initLibrary_t);
for (i = 0,p = (ulong*)&_AA_exports; i < max; i++)
*p++ = (ulong)_AA_fatalErrorHandler;
*p++ = (ulong)_AA_fatalErrorHandler;
memcpy(&_AA_exports,aaExp,MIN(sizeof(_AA_exports),aaExp->dwSize));
loaded = true;
return true;
@ -143,7 +143,7 @@ static ibool LoadDriver(void)
int NAPI AA_status(void)
{
if (!loaded)
return nDriverNotFound;
return nDriverNotFound;
return _AA_exports.AA_status();
}
@ -152,7 +152,7 @@ const char * NAPI AA_errorMsg(
N_int32 status)
{
if (!loaded)
return "Unable to load Nucleus device driver!";
return "Unable to load Nucleus device driver!";
return _AA_exports.AA_errorMsg(status);
}
@ -160,7 +160,7 @@ const char * NAPI AA_errorMsg(
int NAPI AA_getDaysLeft(void)
{
if (!LoadDriver())
return -1;
return -1;
return _AA_exports.AA_getDaysLeft();
}
@ -168,7 +168,7 @@ int NAPI AA_getDaysLeft(void)
int NAPI AA_registerLicense(uchar *license)
{
if (!LoadDriver())
return 0;
return 0;
return _AA_exports.AA_registerLicense(license);
}
@ -176,7 +176,7 @@ int NAPI AA_registerLicense(uchar *license)
int NAPI AA_enumerateDevices(void)
{
if (!LoadDriver())
return 0;
return 0;
return _AA_exports.AA_enumerateDevices();
}
@ -184,7 +184,7 @@ int NAPI AA_enumerateDevices(void)
AA_devCtx * NAPI AA_loadDriver(N_int32 deviceIndex)
{
if (!LoadDriver())
return NULL;
return NULL;
return _AA_exports.AA_loadDriver(deviceIndex);
}
#endif
@ -211,15 +211,15 @@ void NAPI _OS_delay(
LZTimerObject tm;
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
if (!inited) {
ZTimerInit();
inited = true;
}
LZTimerOnExt(&tm);
while (LZTimerLapExt(&tm) < microSeconds)
;
LZTimerOnExt(&tm);
}
if (!inited) {
ZTimerInit();
inited = true;
}
LZTimerOnExt(&tm);
while (LZTimerLapExt(&tm) < microSeconds)
;
LZTimerOnExt(&tm);
}
else
_OS_delay8253(microSeconds);
_OS_delay8253(microSeconds);
}

14
board/MAI/bios_emulator/scitech/src/common/aalinux.c
View file

@ -72,7 +72,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@ -84,11 +84,11 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
}

36
board/MAI/bios_emulator/scitech/src/common/aaos2.c
View file

@ -65,25 +65,25 @@ GA_sharedInfo * NAPI GA_getSharedInfo(
/* Open our helper device driver */
if (DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0,
FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
NULL))
PM_fatalError("Unable to open SDDHELP$ helper device driver!");
FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
NULL))
PM_fatalError("Unable to open SDDHELP$ helper device driver!");
outLen = sizeof(result);
DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,PMHELP_GETSHAREDINFO,
NULL, 0, NULL,
&result, outLen, &outLen);
NULL, 0, NULL,
&result, outLen, &outLen);
DosClose(hSDDHelp);
if (result) {
/* We have found the shared Nucleus packet. Because not all processes
* map to SDDPMI.DLL, we need to ensure that we connect to this
* DLL so that it gets mapped into our address space (that is
* where the shared Nucleus packet is located). Simply doing a
* DosLoadModule on it is enough for this.
*/
HMODULE hModSDDPMI;
char buf[80];
DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
}
/* We have found the shared Nucleus packet. Because not all processes
* map to SDDPMI.DLL, we need to ensure that we connect to this
* DLL so that it gets mapped into our address space (that is
* where the shared Nucleus packet is located). Simply doing a
* DosLoadModule on it is enough for this.
*/
HMODULE hModSDDPMI;
char buf[80];
DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
}
return (GA_sharedInfo*)result;
}
@ -106,7 +106,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@ -118,7 +118,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
DosTmrQueryTime((QWORD*)value);
DosTmrQueryTime((QWORD*)value);
}

14
board/MAI/bios_emulator/scitech/src/common/aaqnx.c
View file

@ -72,7 +72,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@ -84,12 +84,12 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timespec ts;
struct timespec ts;
clock_gettime(CLOCK_REALTIME, &ts);
value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
value->high = 0;
}
clock_gettime(CLOCK_REALTIME, &ts);
value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
value->high = 0;
}
}

8
board/MAI/bios_emulator/scitech/src/common/aartt.c
View file

@ -71,9 +71,9 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
return true;
}
haveRDTSC = true;
return true;
}
return false;
}
@ -85,5 +85,5 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
}

2
board/MAI/bios_emulator/scitech/src/common/aasmx.c
View file

@ -68,7 +68,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
return true;
return true;
return false;
}

8
board/MAI/bios_emulator/scitech/src/common/aavxd.c
View file

@ -71,8 +71,8 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
}
haveRDTSC = true;
}
return true;
}
@ -84,7 +84,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
VTD_Get_Real_Time(&value->high,&value->low);
VTD_Get_Real_Time(&value->high,&value->low);
}

96
board/MAI/bios_emulator/scitech/src/common/aawin32.c
View file

@ -75,9 +75,9 @@ GA_sharedInfo * NAPI GA_getSharedInfo(
PM_init();
inBuf[0] = device;
if (DeviceIoControl(_PM_hDevice, PMHELP_GETSHAREDINFO32, inBuf, sizeof(inBuf),
outBuf, sizeof(outBuf), &count, NULL)) {
return (GA_sharedInfo*)outBuf[0];
}
outBuf, sizeof(outBuf), &count, NULL)) {
return (GA_sharedInfo*)outBuf[0];
}
return NULL;
}
@ -102,16 +102,16 @@ static ibool NAPI _GA_softStereoInit(
GA_devCtx *dc)
{
if (_PM_hDevice) {
DWORD inBuf[1]; /* Buffer to send data to VxD */
DWORD outBuf[1]; /* Buffer to receive data from VxD */
DWORD count; /* Count of bytes returned from VxD */
DWORD inBuf[1]; /* Buffer to send data to VxD */
DWORD outBuf[1]; /* Buffer to receive data from VxD */
DWORD count; /* Count of bytes returned from VxD */
inBuf[0] = (ulong)dc;
if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOINIT32, inBuf, sizeof(inBuf),
outBuf, sizeof(outBuf), &count, NULL)) {
return outBuf[0];
}
}
inBuf[0] = (ulong)dc;
if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOINIT32, inBuf, sizeof(inBuf),
outBuf, sizeof(outBuf), &count, NULL)) {
return outBuf[0];
}
}
return false;
}
@ -122,9 +122,9 @@ This function turns on software stereo mode, either directly or via the VxD.
static void NAPI _GA_softStereoOn(void)
{
if (_PM_hDevice) {
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOON32, NULL, 0,
NULL, 0, NULL, NULL);
}
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOON32, NULL, 0,
NULL, 0, NULL, NULL);
}
}
/****************************************************************************
@ -137,14 +137,14 @@ static void NAPI _GA_softStereoScheduleFlip(
N_uint32 rightAddr)
{
if (_PM_hDevice) {
DWORD inBuf[2]; /* Buffer to send data to VxD */
DWORD count; /* Count of bytes returned from VxD */
DWORD inBuf[2]; /* Buffer to send data to VxD */
DWORD count; /* Count of bytes returned from VxD */
inBuf[0] = (ulong)leftAddr;
inBuf[1] = (ulong)rightAddr;
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIP32, inBuf, sizeof(inBuf),
NULL, 0, &count, NULL);
}
inBuf[0] = (ulong)leftAddr;
inBuf[1] = (ulong)rightAddr;
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIP32, inBuf, sizeof(inBuf),
NULL, 0, &count, NULL);
}
}
/****************************************************************************
@ -154,14 +154,14 @@ This function turns off software stereo mode, either directly or via the VxD.
static N_int32 NAPI _GA_softStereoGetFlipStatus(void)
{
if (_PM_hDevice) {
DWORD outBuf[1]; /* Buffer to receive data from VxD */
DWORD count; /* Count of bytes returned from VxD */
DWORD outBuf[1]; /* Buffer to receive data from VxD */
DWORD count; /* Count of bytes returned from VxD */
if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIPSTATUS32, NULL, 0,
outBuf, sizeof(outBuf), &count, NULL)) {
return outBuf[0];
}
}
if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIPSTATUS32, NULL, 0,
outBuf, sizeof(outBuf), &count, NULL)) {
return outBuf[0];
}
}
return 0;
}
@ -172,7 +172,7 @@ This function turns off software stereo mode, either directly or via the VxD.
static void NAPI _GA_softStereoWaitTillFlipped(void)
{
while (!_GA_softStereoGetFlipStatus())
;
;
}
/****************************************************************************
@ -182,9 +182,9 @@ This function turns off software stereo mode, either directly or via the VxD.
static void NAPI _GA_softStereoOff(void)
{
if (_PM_hDevice) {
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOOFF32, NULL, 0,
NULL, 0, NULL, NULL);
}
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOOFF32, NULL, 0,
NULL, 0, NULL, NULL);
}
}
/****************************************************************************
@ -195,9 +195,9 @@ the VxD.
static void NAPI _GA_softStereoExit(void)
{
if (_PM_hDevice) {
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOEXIT32, NULL, 0,
NULL, 0, NULL, NULL);
}
DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOEXIT32, NULL, 0,
NULL, 0, NULL, NULL);
}
}
/****************************************************************************
@ -217,14 +217,14 @@ static GA_devCtx * NAPI _GA_loadDriver(
N_int32 totalMemory = 0,oldIOPL;
if (deviceIndex >= GA_MAX_DEVICES)
PM_fatalError("DeviceIndex too large in GA_loadDriver!");
PM_fatalError("DeviceIndex too large in GA_loadDriver!");
PM_init();
inBuf[0] = deviceIndex;
if (DeviceIoControl(_PM_hDevice, PMHELP_GETMEMSIZE32,
inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), NULL, NULL))
totalMemory = outBuf[0];
inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), NULL, NULL))
totalMemory = outBuf[0];
if (totalMemory == 0)
totalMemory = 8192;
totalMemory = 8192;
_GA_exports.GA_forceMemSize(totalMemory,shared);
oldIOPL = PM_setIOPL(3);
dc = ORG_GA_loadDriver(deviceIndex,shared);
@ -240,13 +240,13 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
return true;
}
haveRDTSC = true;
return true;
}
else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) {
haveRDTSC = false;
return true;
}
haveRDTSC = false;
return true;
}
return false;
}
@ -258,7 +258,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
QueryPerformanceCounter((LARGE_INTEGER*)value);
QueryPerformanceCounter((LARGE_INTEGER*)value);
}

67
board/MAI/bios_emulator/scitech/src/common/agplib.c
View file

@ -88,31 +88,31 @@ static ibool LoadDriver(void)
/* Check if we have already loaded the driver */
if (loaded)
return true;
return true;
PM_init();
/* Open the BPD file */
if (!PM_findBPD(DLL_NAME,bpdpath))
return false;
return false;
strcpy(filename,bpdpath);
strcat(filename,DLL_NAME);
if ((hModBPD = PE_loadLibrary(filename,false)) == NULL)
return false;
return false;
if ((AGP_initLibrary = (AGP_initLibrary_t)PE_getProcAddress(hModBPD,"_AGP_initLibrary")) == NULL)
return false;
return false;
bpdpath[strlen(bpdpath)-1] = 0;
if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
strcpy(bpdpath,PM_getNucleusConfigPath());
strcpy(bpdpath,PM_getNucleusConfigPath());
else {
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
if ((agpExp = AGP_initLibrary(bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_AGP_imports)) == NULL)
PM_fatalError("AGP_initLibrary failed!\n");
PM_fatalError("AGP_initLibrary failed!\n");
_AGP_exports.dwSize = sizeof(_AGP_exports);
max = sizeof(_AGP_exports)/sizeof(AGP_initLibrary_t);
for (i = 0,p = (ulong*)&_AGP_exports; i < max; i++)
*p++ = (ulong)_AGP_fatalErrorHandler;
*p++ = (ulong)_AGP_fatalErrorHandler;
memcpy(&_AGP_exports,agpExp,MIN(sizeof(_AGP_exports),agpExp->dwSize));
loaded = true;
return true;
@ -127,7 +127,7 @@ static ibool LoadDriver(void)
int NAPI AGP_status(void)
{
if (!loaded)
return nDriverNotFound;
return nDriverNotFound;
return _AGP_exports.AGP_status();
}
@ -136,7 +136,7 @@ const char * NAPI AGP_errorMsg(
N_int32 status)
{
if (!loaded)
return "Unable to load Nucleus device driver!";
return "Unable to load Nucleus device driver!";
return _AGP_exports.AGP_errorMsg(status);
}
@ -144,7 +144,7 @@ const char * NAPI AGP_errorMsg(
AGP_devCtx * NAPI AGP_loadDriver(N_int32 deviceIndex)
{
if (!LoadDriver())
return NULL;
return NULL;
return _AGP_exports.AGP_loadDriver(deviceIndex);
}
@ -153,7 +153,7 @@ void NAPI AGP_unloadDriver(
AGP_devCtx *dc)
{
if (loaded)
_AGP_exports.AGP_unloadDriver(dc);
_AGP_exports.AGP_unloadDriver(dc);
}
/* {secret} */
@ -161,7 +161,7 @@ void NAPI AGP_getGlobalOptions(
AGP_globalOptions *options)
{
if (LoadDriver())
_AGP_exports.AGP_getGlobalOptions(options);
_AGP_exports.AGP_getGlobalOptions(options);
}
/* {secret} */
@ -169,7 +169,7 @@ void NAPI AGP_setGlobalOptions(
AGP_globalOptions *options)
{
if (LoadDriver())
_AGP_exports.AGP_setGlobalOptions(options);
_AGP_exports.AGP_setGlobalOptions(options);
}
/* {secret} */
@ -177,7 +177,7 @@ void NAPI AGP_saveGlobalOptions(
AGP_globalOptions *options)
{
if (loaded)
_AGP_exports.AGP_saveGlobalOptions(options);
_AGP_exports.AGP_saveGlobalOptions(options);
}
#endif
@ -197,24 +197,23 @@ void NAPI _OS_delay(
if (!inited) {
#ifndef __WIN32_VXD__
// This has been causing problems in VxD's for some reason, so for now
// we avoid using it.
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
ZTimerInit();
haveRDTSC = true;
}
else
/* This has been causing problems in VxD's for some reason, so for now */
/* we avoid using it. */
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
ZTimerInit();
haveRDTSC = true;
}
else
#endif
haveRDTSC = false;
inited = true;
}
haveRDTSC = false;
inited = true;
}
if (haveRDTSC) {
LZTimerOnExt(&tm);
while (LZTimerLapExt(&tm) < microSeconds)
;
LZTimerOnExt(&tm);
}
LZTimerOnExt(&tm);
while (LZTimerLapExt(&tm) < microSeconds)
;
LZTimerOnExt(&tm);
}
else
_OS_delay8253(microSeconds);
_OS_delay8253(microSeconds);
}

33
board/MAI/bios_emulator/scitech/src/common/center.c
View file

@ -60,19 +60,19 @@ void _EXPORT CenterWindow(HWND hWndCenter, HWND parent, BOOL repaint)
CenterY = ((RectParent.bottom - RectParent.top) - Height) / 2;
if ((CenterX < 0) || (CenterY < 0)) {
/* The Center Window is smaller than the parent window. */
if (hWndParent != GetDesktopWindow()) {
/* If the parent window is not the desktop use the desktop size. */
CenterX = (GetSystemMetrics(SM_CXSCREEN) - Width) / 2;
CenterY = (GetSystemMetrics(SM_CYSCREEN) - Height) / 2;
}
CenterX = (CenterX < 0) ? 0: CenterX;
CenterY = (CenterY < 0) ? 0: CenterY;
}
/* The Center Window is smaller than the parent window. */
if (hWndParent != GetDesktopWindow()) {
/* If the parent window is not the desktop use the desktop size. */
CenterX = (GetSystemMetrics(SM_CXSCREEN) - Width) / 2;
CenterY = (GetSystemMetrics(SM_CYSCREEN) - Height) / 2;
}
CenterX = (CenterX < 0) ? 0: CenterX;
CenterY = (CenterY < 0) ? 0: CenterY;
}
else {
CenterX += RectParent.left;
CenterY += RectParent.top;
}
CenterX += RectParent.left;
CenterY += RectParent.top;
}
/* Copy the values into RectCenter */
RectCenter.left = CenterX;
@ -82,8 +82,8 @@ void _EXPORT CenterWindow(HWND hWndCenter, HWND parent, BOOL repaint)
/* Move the window to the new location */
MoveWindow(hWndCenter, RectCenter.left, RectCenter.top,
(RectCenter.right - RectCenter.left),
(RectCenter.bottom - RectCenter.top), repaint);
(RectCenter.right - RectCenter.left),
(RectCenter.bottom - RectCenter.top), repaint);
}
void _EXPORT CenterLogo(HWND hWndLogo, HWND hWndParent, int CenterY)
@ -117,7 +117,6 @@ void _EXPORT CenterLogo(HWND hWndLogo, HWND hWndParent, int CenterY)
/* Move the window to the new location */
MoveWindow(hWndLogo, RectCenter.left, RectCenter.top,
(RectCenter.right - RectCenter.left),
(RectCenter.bottom - RectCenter.top), false);
(RectCenter.right - RectCenter.left),
(RectCenter.bottom - RectCenter.top), false);
}

334
board/MAI/bios_emulator/scitech/src/common/cmdline.c
View file

@ -106,49 +106,49 @@ int getcmdopt(
char *formatchar;
if (argc > nextargv) {
if (nextchar == NULL) {
nextchar = argv[nextargv]; /* Index next argument */
if (nextchar == NULL) {
nextargv++;
return ALLDONE; /* No more options */
}
if (IS_NOT_SWITCH_CHAR(*nextchar)) {
nextchar = NULL;
return PARAMETER; /* We have a parameter */
}
nextchar++; /* Move past switch operator */
if (IS_SWITCH_CHAR(*nextchar)) {
nextchar = NULL;
return INVALID; /* Ignore rest of line */
}
}
if ((ch = *(nextchar++)) == 0) {
nextchar = NULL;
return INVALID; /* No options on line */
}
if (nextchar == NULL) {
nextchar = argv[nextargv]; /* Index next argument */
if (nextchar == NULL) {
nextargv++;
return ALLDONE; /* No more options */
}
if (IS_NOT_SWITCH_CHAR(*nextchar)) {
nextchar = NULL;
return PARAMETER; /* We have a parameter */
}
nextchar++; /* Move past switch operator */
if (IS_SWITCH_CHAR(*nextchar)) {
nextchar = NULL;
return INVALID; /* Ignore rest of line */
}
}
if ((ch = *(nextchar++)) == 0) {
nextchar = NULL;
return INVALID; /* No options on line */
}
if (ch == ':' || (formatchar = strchr(format, ch)) == NULL)
return INVALID;
if (ch == ':' || (formatchar = strchr(format, ch)) == NULL)
return INVALID;
if (*(++formatchar) == ':') { /* Expect an argument after option */
nextargv++;
if (*nextchar == 0) {
if (argc <= nextargv)
return INVALID;
nextchar = argv[nextargv++];
}
*argument = nextchar;
nextchar = NULL;
}
else { /* We have a switch style option */
if (*nextchar == 0) {
nextargv++;
nextchar = NULL;
}
*argument = NULL;
}
return ch; /* return the option specifier */
}
if (*(++formatchar) == ':') { /* Expect an argument after option */
nextargv++;
if (*nextchar == 0) {
if (argc <= nextargv)
return INVALID;
nextchar = argv[nextargv++];
}
*argument = nextchar;
nextchar = NULL;
}
else { /* We have a switch style option */
if (*nextchar == 0) {
nextargv++;
nextchar = NULL;
}
*argument = NULL;
}
return ch; /* return the option specifier */
}
nextchar = NULL;
nextargv++;
return ALLDONE; /* no arguments on command line */
@ -174,51 +174,51 @@ static int parse_option(
int num_read;
switch ((int)(optarr->type)) {
case OPT_INTEGER:
num_read = sscanf(argument,"%d",(int*)optarr->arg);
break;
case OPT_HEX:
num_read = sscanf(argument,"%x",(int*)optarr->arg);
break;
case OPT_OCTAL:
num_read = sscanf(argument,"%o",(int*)optarr->arg);
break;
case OPT_UNSIGNED:
num_read = sscanf(argument,"%u",(uint*)optarr->arg);
break;
case OPT_LINTEGER:
num_read = sscanf(argument,"%ld",(long*)optarr->arg);
break;
case OPT_LHEX:
num_read = sscanf(argument,"%lx",(long*)optarr->arg);
break;
case OPT_LOCTAL:
num_read = sscanf(argument,"%lo",(long*)optarr->arg);
break;
case OPT_LUNSIGNED:
num_read = sscanf(argument,"%lu",(ulong*)optarr->arg);
break;
case OPT_FLOAT:
num_read = sscanf(argument,"%f",(float*)optarr->arg);
break;
case OPT_DOUBLE:
num_read = sscanf(argument,"%lf",(double*)optarr->arg);
break;
case OPT_LDOUBLE:
num_read = sscanf(argument,"%Lf",(long double*)optarr->arg);
break;
case OPT_STRING:
num_read = 1; /* This always works */
*((char**)optarr->arg) = argument;
break;
default:
return INVALID;
}
case OPT_INTEGER:
num_read = sscanf(argument,"%d",(int*)optarr->arg);
break;
case OPT_HEX:
num_read = sscanf(argument,"%x",(int*)optarr->arg);
break;
case OPT_OCTAL:
num_read = sscanf(argument,"%o",(int*)optarr->arg);
break;
case OPT_UNSIGNED:
num_read = sscanf(argument,"%u",(uint*)optarr->arg);
break;
case OPT_LINTEGER:
num_read = sscanf(argument,"%ld",(long*)optarr->arg);
break;
case OPT_LHEX:
num_read = sscanf(argument,"%lx",(long*)optarr->arg);
break;
case OPT_LOCTAL:
num_read = sscanf(argument,"%lo",(long*)optarr->arg);
break;
case OPT_LUNSIGNED:
num_read = sscanf(argument,"%lu",(ulong*)optarr->arg);
break;
case OPT_FLOAT:
num_read = sscanf(argument,"%f",(float*)optarr->arg);
break;
case OPT_DOUBLE:
num_read = sscanf(argument,"%lf",(double*)optarr->arg);
break;
case OPT_LDOUBLE:
num_read = sscanf(argument,"%Lf",(long double*)optarr->arg);
break;
case OPT_STRING:
num_read = 1; /* This always works */
*((char**)optarr->arg) = argument;
break;
default:
return INVALID;
}
if (num_read == 0)
return INVALID;
return INVALID;
else
return ALLDONE;
return ALLDONE;
}
/****************************************************************************
@ -261,8 +261,8 @@ int getargs(
int num_opt,
Option optarr[],
int (*do_param)(
char *param,
int num))
char *param,
int num))
{
int i,opt;
char *argument;
@ -273,51 +273,51 @@ int getargs(
strcpy(cmdstr,"hH?");
for (i = 0,opt = 3; i < num_opt; i++,opt++) {
cmdstr[opt] = optarr[i].opt;
if (optarr[i].type != OPT_SWITCH) {
cmdstr[++opt] = ':';
}
}
cmdstr[opt] = optarr[i].opt;
if (optarr[i].type != OPT_SWITCH) {
cmdstr[++opt] = ':';
}
}
cmdstr[opt] = '\0';
for (;;) {
opt = getcmdopt(argc,argv,cmdstr,&argument);
switch (opt) {
case 'H':
case 'h':
case '?':
return HELP;
case ALLDONE:
return ALLDONE;
case INVALID:
return INVALID;
case PARAMETER:
if (do_param == NULL)
return INVALID;
if (do_param(argv[nextargv],param_num) == INVALID)
return INVALID;
nextargv++;
param_num++;
break;
default:
opt = getcmdopt(argc,argv,cmdstr,&argument);
switch (opt) {
case 'H':
case 'h':
case '?':
return HELP;
case ALLDONE:
return ALLDONE;
case INVALID:
return INVALID;
case PARAMETER:
if (do_param == NULL)
return INVALID;
if (do_param(argv[nextargv],param_num) == INVALID)
return INVALID;
nextargv++;
param_num++;
break;
default:
/* Search for the option in the option array. We are
* guaranteed to find it.
*/
/* Search for the option in the option array. We are
* guaranteed to find it.
*/
for (i = 0; i < num_opt; i++) {
if (optarr[i].opt == opt)
break;
}
if (optarr[i].type == OPT_SWITCH)
*((ibool*)optarr[i].arg) = true;
else {
if (parse_option(&optarr[i],argument) == INVALID)
return INVALID;
}
break;
}
}
for (i = 0; i < num_opt; i++) {
if (optarr[i].opt == opt)
break;
}
if (optarr[i].type == OPT_SWITCH)
*((ibool*)optarr[i].arg) = true;
else {
if (parse_option(&optarr[i],argument) == INVALID)
return INVALID;
}
break;
}
}
}
/****************************************************************************
@ -340,11 +340,11 @@ void print_desc(
int i;
for (i = 0; i < num_opt; i++) {
if (optarr[i].type == OPT_SWITCH)
printf(" -%c %s\n",optarr[i].opt,optarr[i].desc);
else
printf(" -%c<arg> %s\n",optarr[i].opt,optarr[i].desc);
}
if (optarr[i].type == OPT_SWITCH)
printf(" -%c %s\n",optarr[i].opt,optarr[i].desc);
else
printf(" -%c<arg> %s\n",optarr[i].opt,optarr[i].desc);
}
}
/****************************************************************************
@ -382,45 +382,45 @@ int parse_commandline(
argv[argc++] = filename;
cmdLine = strncpy(str, cmdLine, sizeof(str)-1);
while (*cmdLine) {
switch (*cmdLine) {
case '"' :
if (prevWord != NULL) {
if (inQuote) {
if (!noStrip)
*cmdLine = '\0';
argv [argc++] = prevWord;
prevWord = NULL;
}
else
noStrip = TRUE;
}
inQuote = !inQuote;
break;
case ' ' :
case '\t' :
if (!inQuote) {
if (prevWord != NULL) {
*cmdLine = '\0';
argv [argc++] = prevWord;
prevWord = NULL;
noStrip = FALSE;
}
}
break;
default :
if (prevWord == NULL)
prevWord = cmdLine;
break;
}
if (argc >= maxArgv - 1)
break;
cmdLine++;
}
switch (*cmdLine) {
case '"' :
if (prevWord != NULL) {
if (inQuote) {
if (!noStrip)
*cmdLine = '\0';
argv [argc++] = prevWord;
prevWord = NULL;
}
else
noStrip = TRUE;
}
inQuote = !inQuote;
break;
case ' ' :
case '\t' :
if (!inQuote) {
if (prevWord != NULL) {
*cmdLine = '\0';
argv [argc++] = prevWord;
prevWord = NULL;
noStrip = FALSE;
}
}
break;
default :
if (prevWord == NULL)
prevWord = cmdLine;
break;
}
if (argc >= maxArgv - 1)
break;
cmdLine++;
}
if ((prevWord != NULL || (inQuote && prevWord != NULL)) && argc < maxArgv - 1) {
*cmdLine = '\0';
argv [argc++] = prevWord;
}
*cmdLine = '\0';
argv [argc++] = prevWord;
}
argv[argc] = NULL;
/* Return updated parameters */

22
board/MAI/bios_emulator/scitech/src/common/gabeos.c
View file

@ -70,10 +70,10 @@ library is used with the application local version of Nucleus.
****************************************************************************/
PM_imports * NAPI GA_getSystemPMImports(void)
{
// TODO: We may very well want to provide a system shared library
// that eports the PM functions required by the Nucleus library
// for BeOS here. That will eliminate fatal errors loading new
// drivers on BeOS!
/* TODO: We may very well want to provide a system shared library */
/* that eports the PM functions required by the Nucleus library */
/* for BeOS here. That will eliminate fatal errors loading new */
/* drivers on BeOS! */
return &_PM_imports;
}
@ -124,7 +124,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@ -136,11 +136,11 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
}

3
board/MAI/bios_emulator/scitech/src/common/gados.c
View file

@ -120,7 +120,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
return true;
return true;
return false;
}
@ -133,4 +133,3 @@ void NAPI GA_TimerRead(
{
_GA_readTimeStamp(value);
}

49
board/MAI/bios_emulator/scitech/src/common/galib.c
View file

@ -107,7 +107,7 @@ static ibool LoadDriver(
/* Check if we have already loaded the driver */
if (loaded)
return true;
return true;
PM_init();
/* First try to see if we can find the system wide shared exports
@ -116,33 +116,33 @@ static ibool LoadDriver(
*/
__GA_exports.dwSize = sizeof(__GA_exports);
if (GA_getSharedExports(&__GA_exports,shared))
return loaded = true;
return loaded = true;
/* Open the BPD file */
if (!PM_findBPD(DLL_NAME,bpdpath))
return false;
return false;
strcpy(filename,bpdpath);
strcat(filename,DLL_NAME);
if ((hModBPD = PE_loadLibrary(filename,shared)) == NULL)
return false;
return false;
if ((GA_initLibrary = (GA_initLibrary_t)PE_getProcAddress(hModBPD,"_GA_initLibrary")) == NULL)
return false;
return false;
bpdpath[strlen(bpdpath)-1] = 0;
if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
strcpy(bpdpath,PM_getNucleusConfigPath());
strcpy(bpdpath,PM_getNucleusConfigPath());
else {
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
PM_backslash(bpdpath);
strcat(bpdpath,"config");
}
if ((gaExp = GA_initLibrary(shared,bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_GA_imports)) == NULL)
PM_fatalError("GA_initLibrary failed!\n");
PM_fatalError("GA_initLibrary failed!\n");
/* Initialize all default imports to point to fatal error handler
* for upwards compatibility, and copy the exported functions.
*/
max = sizeof(__GA_exports)/sizeof(GA_initLibrary_t);
for (i = 0,p = (ulong*)&__GA_exports; i < max; i++)
*p++ = (ulong)_GA_fatalErrorHandler;
*p++ = (ulong)_GA_fatalErrorHandler;
memcpy(&__GA_exports,gaExp,MIN(sizeof(__GA_exports),gaExp->dwSize));
loaded = true;
return true;
@ -157,7 +157,7 @@ static ibool LoadDriver(
int NAPI GA_status(void)
{
if (!loaded)
return nDriverNotFound;
return nDriverNotFound;
return __GA_exports.GA_status();
}
@ -166,7 +166,7 @@ const char * NAPI GA_errorMsg(
N_int32 status)
{
if (!loaded)
return "Unable to load Nucleus device driver!";
return "Unable to load Nucleus device driver!";
return __GA_exports.GA_errorMsg(status);
}
@ -174,7 +174,7 @@ const char * NAPI GA_errorMsg(
int NAPI GA_getDaysLeft(N_int32 shared)
{
if (!LoadDriver(shared))
return -1;
return -1;
return __GA_exports.GA_getDaysLeft(shared);
}
@ -182,7 +182,7 @@ int NAPI GA_getDaysLeft(N_int32 shared)
int NAPI GA_registerLicense(uchar *license,N_int32 shared)
{
if (!LoadDriver(shared))
return 0;
return 0;
return __GA_exports.GA_registerLicense(license,shared);
}
@ -190,7 +190,7 @@ int NAPI GA_registerLicense(uchar *license,N_int32 shared)
ibool NAPI GA_loadInGUI(N_int32 shared)
{
if (!LoadDriver(shared))
return false;
return false;
return __GA_exports.GA_loadInGUI(shared);
}
@ -198,7 +198,7 @@ ibool NAPI GA_loadInGUI(N_int32 shared)
int NAPI GA_enumerateDevices(N_int32 shared)
{
if (!LoadDriver(shared))
return 0;
return 0;
return __GA_exports.GA_enumerateDevices(shared);
}
@ -206,7 +206,7 @@ int NAPI GA_enumerateDevices(N_int32 shared)
GA_devCtx * NAPI GA_loadDriver(N_int32 deviceIndex,N_int32 shared)
{
if (!LoadDriver(shared))
return NULL;
return NULL;
return __GA_exports.GA_loadDriver(deviceIndex,shared);
}
@ -216,7 +216,7 @@ void NAPI GA_getGlobalOptions(
ibool shared)
{
if (LoadDriver(shared))
__GA_exports.GA_getGlobalOptions(options,shared);
__GA_exports.GA_getGlobalOptions(options,shared);
}
/* {secret} */
@ -226,7 +226,7 @@ PE_MODULE * NAPI GA_loadLibrary(
ibool shared)
{
if (!LoadDriver(shared))
return NULL;
return NULL;
return __GA_exports.GA_loadLibrary(szBPDName,size,shared);
}
@ -236,7 +236,7 @@ GA_devCtx * NAPI GA_getCurrentDriver(
{
/* Bail for older drivers that didn't export this function! */
if (!__GA_exports.GA_getCurrentDriver)
return NULL;
return NULL;
return __GA_exports.GA_getCurrentDriver(deviceIndex);
}
@ -246,7 +246,7 @@ REF2D_driver * NAPI GA_getCurrentRef2d(
{
/* Bail for older drivers that didn't export this function! */
if (!__GA_exports.GA_getCurrentRef2d)
return NULL;
return NULL;
return __GA_exports.GA_getCurrentRef2d(deviceIndex);
}
@ -254,7 +254,7 @@ REF2D_driver * NAPI GA_getCurrentRef2d(
int NAPI GA_isOEMVersion(ibool shared)
{
if (!LoadDriver(shared))
return 0;
return 0;
return __GA_exports.GA_isOEMVersion(shared);
}
@ -262,8 +262,7 @@ int NAPI GA_isOEMVersion(ibool shared)
N_uint32 * NAPI GA_getLicensedDevices(ibool shared)
{
if (!LoadDriver(shared))
return 0;
return 0;
return __GA_exports.GA_getLicensedDevices(shared);
}
#endif

22
board/MAI/bios_emulator/scitech/src/common/galinux.c
View file

@ -72,10 +72,10 @@ library is used with the application local version of Nucleus.
****************************************************************************/
PM_imports * NAPI GA_getSystemPMImports(void)
{
// TODO: We may very well want to provide a system shared library
// that eports the PM functions required by the Nucleus library
// for Linux here. That will eliminate fatal errors loading new
// drivers on Linux!
/* TODO: We may very well want to provide a system shared library */
/* that eports the PM functions required by the Nucleus library */
/* for Linux here. That will eliminate fatal errors loading new */
/* drivers on Linux! */
return &_PM_imports;
}
@ -126,7 +126,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@ -138,11 +138,11 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
struct timeval t;
gettimeofday(&t, NULL);
value->low = t.tv_sec*1000000 + t.tv_usec;
value->high = 0;
}
}

9
board/MAI/bios_emulator/scitech/src/common/gantdrv.c
View file

@ -117,8 +117,8 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
}
haveRDTSC = true;
}
return true;
}
@ -130,8 +130,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
KeQuerySystemTime((LARGE_INTEGER*)value);
KeQuerySystemTime((LARGE_INTEGER*)value);
}

36
board/MAI/bios_emulator/scitech/src/common/gaos2.c
View file

@ -83,11 +83,11 @@ static ulong CallSDDHelp(
* can't fail here.
*/
DosOpen(PMHELP_NAME,&hSDDHelp,&result[0],0,0,
FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
NULL);
FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
NULL);
DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,func,
&parms, inLen = sizeof(parms), &inLen,
&result, outLen = sizeof(result), &outLen);
&parms, inLen = sizeof(parms), &inLen,
&result, outLen = sizeof(result), &outLen);
DosClose(hSDDHelp);
return result[0];
}
@ -147,17 +147,17 @@ ibool NAPI GA_getSharedExports(
/* Initialise the PM library and connect to our runtime DLL's */
PM_init();
if (CallSDDHelp(PMHELP_GETSHAREDEXP) != 0) {
/* We have found the shared Nucleus exports. Because not all processes
* map to SDDPMI.DLL, we need to ensure that we connect to this
* DLL so that it gets mapped into our address space (that is
* where the shared Nucleus loader code is located). Simply doing a
* DosLoadModule on it is enough for this.
*/
DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
exp = (GA_exports*)result[0];
memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
return true;
}
/* We have found the shared Nucleus exports. Because not all processes
* map to SDDPMI.DLL, we need to ensure that we connect to this
* DLL so that it gets mapped into our address space (that is
* where the shared Nucleus loader code is located). Simply doing a
* DosLoadModule on it is enough for this.
*/
DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
exp = (GA_exports*)result[0];
memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
return true;
}
#endif
(void)shared;
return false;
@ -197,7 +197,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@ -209,9 +209,9 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
DosTmrQueryTime((QWORD*)value);
DosTmrQueryTime((QWORD*)value);
}
/****************************************************************************

22
board/MAI/bios_emulator/scitech/src/common/gaqnx.c
View file

@ -72,10 +72,10 @@ library is used with the application local version of Nucleus.
****************************************************************************/
PM_imports * NAPI GA_getSystemPMImports(void)
{
// TODO: We may very well want to provide a system shared library
// that eports the PM functions required by the Nucleus library
// for QNX here. That will eliminate fatal errors loading new
// drivers on QNX!
/* TODO: We may very well want to provide a system shared library */
/* that eports the PM functions required by the Nucleus library */
/* for QNX here. That will eliminate fatal errors loading new */
/* drivers on QNX! */
return &_PM_imports;
}
@ -126,7 +126,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
haveRDTSC = true;
haveRDTSC = true;
return true;
}
@ -138,12 +138,12 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else {
struct timespec ts;
struct timespec ts;
clock_gettime(CLOCK_REALTIME, &ts);
value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
value->high = 0;
}
clock_gettime(CLOCK_REALTIME, &ts);
value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
value->high = 0;
}
}

8
board/MAI/bios_emulator/scitech/src/common/gartt.c
View file

@ -121,9 +121,9 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
return true;
}
haveRDTSC = true;
return true;
}
return false;
}
@ -135,5 +135,5 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
}

2
board/MAI/bios_emulator/scitech/src/common/gasmx.c
View file

@ -118,7 +118,7 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
return true;
return true;
return false;
}

9
board/MAI/bios_emulator/scitech/src/common/gavxd.c
View file

@ -117,8 +117,8 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
}
haveRDTSC = true;
}
return true;
}
@ -130,8 +130,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
VTD_Get_Real_Time(&value->high,&value->low);
VTD_Get_Real_Time(&value->high,&value->low);
}

107
board/MAI/bios_emulator/scitech/src/common/gawin32.c
View file

@ -67,16 +67,16 @@ static ibool LoadSharedDLL(void)
/* Check if we have already loaded the DLL */
if (hModDLL)
return true;
return true;
PM_init();
/* Open the DLL file */
if (!PM_findBPD(DLL_NAME,bpdpath))
return false;
return false;
strcpy(filename,bpdpath);
strcat(filename,DLL_NAME);
if ((hModDLL = LoadLibrary(filename)) == NULL)
return false;
return false;
return true;
}
@ -103,10 +103,10 @@ void NAPI GA_setLocalPath(
PM_setLocalBPDPath(path);
if (_PM_hDevice != INVALID_HANDLE_VALUE) {
inBuf[0] = (DWORD)path;
DeviceIoControl(_PM_hDevice, PMHELP_GASETLOCALPATH32,
inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &outCnt, NULL);
}
inBuf[0] = (DWORD)path;
DeviceIoControl(_PM_hDevice, PMHELP_GASETLOCALPATH32,
inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &outCnt, NULL);
}
}
/****************************************************************************
@ -126,18 +126,18 @@ PM_imports * NAPI GA_getSystemPMImports(void)
PM_imports * (NAPIP _GA_getSystemPMImports)(void);
if (LoadSharedDLL()) {
/* Note that Visual C++ build DLL's with only a single underscore in front
* of the exported name while Watcom C provides two of them. We check for
* both to allow working with either compiled DLL.
*/
if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"_GA_getSystemPMImports")) != NULL) {
if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"__GA_getSystemPMImports")) != NULL) {
pmImp = _GA_getSystemPMImports();
memcpy(&_PM_imports,pmImp,MIN(_PM_imports.dwSize,pmImp->dwSize));
return pmImp;
}
}
}
/* Note that Visual C++ build DLL's with only a single underscore in front
* of the exported name while Watcom C provides two of them. We check for
* both to allow working with either compiled DLL.
*/
if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"_GA_getSystemPMImports")) != NULL) {
if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"__GA_getSystemPMImports")) != NULL) {
pmImp = _GA_getSystemPMImports();
memcpy(&_PM_imports,pmImp,MIN(_PM_imports.dwSize,pmImp->dwSize));
return pmImp;
}
}
}
return &_PM_imports;
}
@ -162,16 +162,16 @@ ibool NAPI GA_getSharedExports(
useRing0Driver = false;
if (shared) {
if (!LoadSharedDLL())
PM_fatalError("Unable to load " DLL_NAME "!");
if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"_GA_getSystemGAExports")) == NULL)
if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"__GA_getSystemGAExports")) == NULL)
PM_fatalError("Unable to load " DLL_NAME "!");
exp = _GA_getSystemGAExports();
memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
useRing0Driver = true;
return true;
}
if (!LoadSharedDLL())
PM_fatalError("Unable to load " DLL_NAME "!");
if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"_GA_getSystemGAExports")) == NULL)
if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"__GA_getSystemGAExports")) == NULL)
PM_fatalError("Unable to load " DLL_NAME "!");
exp = _GA_getSystemGAExports();
memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
useRing0Driver = true;
return true;
}
return false;
}
@ -188,14 +188,14 @@ ibool NAPI GA_queryFunctions(
static ibool (NAPIP _GA_queryFunctions)(GA_devCtx *dc,N_uint32 id,void _FAR_ *funcs) = NULL;
if (useRing0Driver) {
// Call the version in nga_w32.dll if it is loaded
if (!_GA_queryFunctions) {
if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"_GA_queryFunctions")) == NULL)
if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"__GA_queryFunctions")) == NULL)
PM_fatalError("Unable to get exports from " DLL_NAME "!");
}
return _GA_queryFunctions(dc,id,funcs);
}
/* Call the version in nga_w32.dll if it is loaded */
if (!_GA_queryFunctions) {
if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"_GA_queryFunctions")) == NULL)
if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"__GA_queryFunctions")) == NULL)
PM_fatalError("Unable to get exports from " DLL_NAME "!");
}
return _GA_queryFunctions(dc,id,funcs);
}
return __GA_exports.GA_queryFunctions(dc,id,funcs);
}
@ -211,14 +211,14 @@ ibool NAPI REF2D_queryFunctions(
static ibool (NAPIP _REF2D_queryFunctions)(REF2D_driver *ref2d,N_uint32 id,void _FAR_ *funcs) = NULL;
if (useRing0Driver) {
// Call the version in nga_w32.dll if it is loaded
if (!_REF2D_queryFunctions) {
if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"_REF2D_queryFunctions")) == NULL)
if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"__REF2D_queryFunctions")) == NULL)
PM_fatalError("Unable to get exports from " DLL_NAME "!");
}
return _REF2D_queryFunctions(ref2d,id,funcs);
}
/* Call the version in nga_w32.dll if it is loaded */
if (!_REF2D_queryFunctions) {
if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"_REF2D_queryFunctions")) == NULL)
if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"__REF2D_queryFunctions")) == NULL)
PM_fatalError("Unable to get exports from " DLL_NAME "!");
}
return _REF2D_queryFunctions(ref2d,id,funcs);
}
return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
}
#endif
@ -231,13 +231,13 @@ Nucleus loader library.
ibool NAPI GA_TimerInit(void)
{
if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
haveRDTSC = true;
return true;
}
haveRDTSC = true;
return true;
}
else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) {
haveRDTSC = false;
return true;
}
haveRDTSC = false;
return true;
}
return false;
}
@ -249,8 +249,7 @@ void NAPI GA_TimerRead(
GA_largeInteger *value)
{
if (haveRDTSC)
_GA_readTimeStamp(value);
_GA_readTimeStamp(value);
else
QueryPerformanceCounter((LARGE_INTEGER*)value);
QueryPerformanceCounter((LARGE_INTEGER*)value);
}

280
board/MAI/bios_emulator/scitech/src/common/gtfcalc.c
View file

@ -107,9 +107,9 @@ static void GetInternalConstants(GTF_constants *c)
c->hSync = GC.hSync;
c->minVSyncBP = GC.minVSyncBP;
if (GC.k == 0)
c->k = 0.001;
c->k = 0.001;
else
c->k = GC.k;
c->k = GC.k;
c->m = (c->k / 256) * GC.m;
c->c = (GC.c - GC.j) * (c->k / 256) + GC.j;
c->j = GC.j;
@ -165,89 +165,89 @@ void GTF_calcTimings(double hPixels,double vLines,double freq,
vFieldRate = vFreq;
interlace = 0;
if (wantInterlace)
dotClock *= 2;
dotClock *= 2;
/* Determine the lines for margins */
if (wantMargins) {
topMarginLines = round(c.margin / 100 * vLines);
botMarginLines = round(c.margin / 100 * vLines);
}
topMarginLines = round(c.margin / 100 * vLines);
botMarginLines = round(c.margin / 100 * vLines);
}
else {
topMarginLines = 0;
botMarginLines = 0;
}
topMarginLines = 0;
botMarginLines = 0;
}
if (type != GTF_lockPF) {
if (type == GTF_lockVF) {
/* Estimate the horizontal period */
hPeriodEst = ((1/vFieldRate) - (c.minVSyncBP/1000000)) /
(vLines + (2*topMarginLines) + c.minPorch + interlace) * 1000000;
if (type == GTF_lockVF) {
/* Estimate the horizontal period */
hPeriodEst = ((1/vFieldRate) - (c.minVSyncBP/1000000)) /
(vLines + (2*topMarginLines) + c.minPorch + interlace) * 1000000;
/* Find the number of lines in vSync + back porch */
vSyncBP = round(c.minVSyncBP / hPeriodEst);
}
else if (type == GTF_lockHF) {
/* Find the number of lines in vSync + back porch */
vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
}
/* Find the number of lines in vSync + back porch */
vSyncBP = round(c.minVSyncBP / hPeriodEst);
}
else if (type == GTF_lockHF) {
/* Find the number of lines in vSync + back porch */
vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
}
/* Find the number of lines in the V back porch alone */
vBackPorch = vSyncBP - c.vSyncRqd;
/* Find the number of lines in the V back porch alone */
vBackPorch = vSyncBP - c.vSyncRqd;
/* Find the total number of lines in the vertical period */
vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+ interlace + c.minPorch;
/* Find the total number of lines in the vertical period */
vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+ interlace + c.minPorch;
if (type == GTF_lockVF) {
/* Estimate the vertical frequency */
vFieldRateEst = 1000000 / (hPeriodEst * vTotalLines);
if (type == GTF_lockVF) {
/* Estimate the vertical frequency */
vFieldRateEst = 1000000 / (hPeriodEst * vTotalLines);
/* Find the actual horizontal period */
hPeriod = (hPeriodEst * vFieldRateEst) / vFieldRate;
/* Find the actual horizontal period */
hPeriod = (hPeriodEst * vFieldRateEst) / vFieldRate;
/* Find the actual vertical field frequency */
vFieldRate = 1000000 / (hPeriod * vTotalLines);
}
else if (type == GTF_lockHF) {
/* Find the actual vertical field frequency */
vFieldRate = (hFreq / vTotalLines) * 1000;
}
}
/* Find the actual vertical field frequency */
vFieldRate = 1000000 / (hPeriod * vTotalLines);
}
else if (type == GTF_lockHF) {
/* Find the actual vertical field frequency */
vFieldRate = (hFreq / vTotalLines) * 1000;
}
}
/* Find the number of pixels in the left and right margins */
if (wantMargins) {
leftMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
rightMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
}
leftMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
rightMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
}
else {
leftMarginPixels = 0;
rightMarginPixels = 0;
}
leftMarginPixels = 0;
rightMarginPixels = 0;
}
/* Find the total number of active pixels in image + margins */
hTotalActivePixels = hPixels + leftMarginPixels + rightMarginPixels;
if (type == GTF_lockVF) {
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - ((c.m * hPeriod) / 1000);
}
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - ((c.m * hPeriod) / 1000);
}
else if (type == GTF_lockHF) {
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - (c.m / hFreq);
}
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - (c.m / hFreq);
}
else if (type == GTF_lockPF) {
/* Find ideal horizontal period from blanking duty cycle formula */
idealHPeriod = (((c.c - 100) + (sqrt((pow(100-c.c,2)) +
(0.4 * c.m * (hTotalActivePixels + rightMarginPixels +
leftMarginPixels) / dotClock)))) / (2 * c.m)) * 1000;
/* Find ideal horizontal period from blanking duty cycle formula */
idealHPeriod = (((c.c - 100) + (sqrt((pow(100-c.c,2)) +
(0.4 * c.m * (hTotalActivePixels + rightMarginPixels +
leftMarginPixels) / dotClock)))) / (2 * c.m)) * 1000;
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - ((c.m * idealHPeriod) / 1000);
}
/* Find the ideal blanking duty cycle */
idealDutyCycle = c.c - ((c.m * idealHPeriod) / 1000);
}
/* Find the number of pixels in blanking time */
hBlankPixels = round((hTotalActivePixels * idealDutyCycle) /
((100 - idealDutyCycle) * c.cellGran)) * c.cellGran;
((100 - idealDutyCycle) * c.cellGran)) * c.cellGran;
/* Find the total number of pixels */
hTotalPixels = hTotalActivePixels + hBlankPixels;
@ -262,35 +262,35 @@ void GTF_calcTimings(double hPixels,double vLines,double freq,
hSyncBP = hBackPorch + hSyncWidth;
if (type == GTF_lockPF) {
/* Find the horizontal frequency */
hFreq = (dotClock / hTotalPixels) * 1000;
/* Find the horizontal frequency */
hFreq = (dotClock / hTotalPixels) * 1000;
/* Find the number of lines in vSync + back porch */
vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
/* Find the number of lines in vSync + back porch */
vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
/* Find the number of lines in the V back porch alone */
vBackPorch = vSyncBP - c.vSyncRqd;
/* Find the number of lines in the V back porch alone */
vBackPorch = vSyncBP - c.vSyncRqd;
/* Find the total number of lines in the vertical period */
vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+ interlace + c.minPorch;
/* Find the total number of lines in the vertical period */
vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
+ interlace + c.minPorch;
/* Find the actual vertical field frequency */
vFieldRate = (hFreq / vTotalLines) * 1000;
}
/* Find the actual vertical field frequency */
vFieldRate = (hFreq / vTotalLines) * 1000;
}
else {
if (type == GTF_lockVF) {
/* Find the horizontal frequency */
hFreq = 1000 / hPeriod;
}
else if (type == GTF_lockHF) {
/* Find the horizontal frequency */
hPeriod = 1000 / hFreq;
}
if (type == GTF_lockVF) {
/* Find the horizontal frequency */
hFreq = 1000 / hPeriod;
}
else if (type == GTF_lockHF) {
/* Find the horizontal frequency */
hPeriod = 1000 / hFreq;
}
/* Find the pixel clock frequency */
dotClock = hTotalPixels / hPeriod;
}
/* Find the pixel clock frequency */
dotClock = hTotalPixels / hPeriod;
}
/* Return the computed frequencies */
t->vFreq = vFieldRate;
@ -315,16 +315,16 @@ void GTF_calcTimings(double hPixels,double vLines,double freq,
t->v.vSyncWidth = (int)c.vSyncRqd;
t->v.vBackPorch = (int)vBackPorch;
if (wantInterlace) {
/* Halve the timings for interlaced modes */
t->v.vTotal /= 2;
t->v.vDisp /= 2;
t->v.vSyncStart /= 2;
t->v.vSyncEnd /= 2;
t->v.vFrontPorch /= 2;
t->v.vSyncWidth /= 2;
t->v.vBackPorch /= 2;
t->dotClock /= 2;
}
/* Halve the timings for interlaced modes */
t->v.vTotal /= 2;
t->v.vDisp /= 2;
t->v.vSyncStart /= 2;
t->v.vSyncEnd /= 2;
t->v.vFrontPorch /= 2;
t->v.vSyncWidth /= 2;
t->v.vBackPorch /= 2;
t->dotClock /= 2;
}
/* Mark as GTF timing using the sync polarities */
t->interlace = (wantInterlace) ? 'I' : 'N';
@ -348,30 +348,30 @@ void main(int argc,char *argv[])
GTF_timings t;
if (argc != 5 && argc != 6) {
printf("Usage: GTFCALC <xPixels> <yPixels> <freq> [[Hz] [KHz] [MHz]] [I]\n");
printf("\n");
printf("where <xPixels> is the horizontal resolution of the mode, <yPixels> is the\n");
printf("vertical resolution of the mode. The <freq> value will be the frequency to\n");
printf("drive the calculations, and will be either the vertical frequency (in Hz)\n");
printf("the horizontal frequency (in KHz) or the dot clock (in MHz). To generate\n");
printf("timings for an interlaced mode, add 'I' to the end of the command line.\n");
printf("\n");
printf("For example to generate timings for 640x480 at 60Hz vertical:\n");
printf("\n");
printf(" GTFCALC 640 480 60 Hz\n");
printf("\n");
printf("For example to generate timings for 640x480 at 31.5KHz horizontal:\n");
printf("\n");
printf(" GTFCALC 640 480 31.5 KHz\n");
printf("\n");
printf("For example to generate timings for 640x480 with a 25.175Mhz dot clock:\n");
printf("\n");
printf(" GTFCALC 640 480 25.175 MHz\n");
printf("\n");
printf("GTFCALC will print a summary of the results found, and dump the CRTC\n");
printf("values to the UVCONFIG.CRT file in the format used by SciTech Display Doctor.\n");
exit(1);
}
printf("Usage: GTFCALC <xPixels> <yPixels> <freq> [[Hz] [KHz] [MHz]] [I]\n");
printf("\n");
printf("where <xPixels> is the horizontal resolution of the mode, <yPixels> is the\n");
printf("vertical resolution of the mode. The <freq> value will be the frequency to\n");
printf("drive the calculations, and will be either the vertical frequency (in Hz)\n");
printf("the horizontal frequency (in KHz) or the dot clock (in MHz). To generate\n");
printf("timings for an interlaced mode, add 'I' to the end of the command line.\n");
printf("\n");
printf("For example to generate timings for 640x480 at 60Hz vertical:\n");
printf("\n");
printf(" GTFCALC 640 480 60 Hz\n");
printf("\n");
printf("For example to generate timings for 640x480 at 31.5KHz horizontal:\n");
printf("\n");
printf(" GTFCALC 640 480 31.5 KHz\n");
printf("\n");
printf("For example to generate timings for 640x480 with a 25.175Mhz dot clock:\n");
printf("\n");
printf(" GTFCALC 640 480 25.175 MHz\n");
printf("\n");
printf("GTFCALC will print a summary of the results found, and dump the CRTC\n");
printf("values to the UVCONFIG.CRT file in the format used by SciTech Display Doctor.\n");
exit(1);
}
/* Get values from command line */
xPixels = atof(argv[1]);
@ -381,33 +381,33 @@ void main(int argc,char *argv[])
/* Compute the CRTC timings */
if (toupper(argv[4][0]) == 'H')
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockVF,false,interlace,&t);
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockVF,false,interlace,&t);
else if (toupper(argv[4][0]) == 'K')
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockHF,false,interlace,&t);
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockHF,false,interlace,&t);
else if (toupper(argv[4][0]) == 'M')
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockPF,false,interlace,&t);
GTF_calcTimings(xPixels,yPixels,freq,GTF_lockPF,false,interlace,&t);
else {
printf("Unknown command line!\n");
exit(1);
}
printf("Unknown command line!\n");
exit(1);
}
/* Dump summary info to standard output */
printf("CRTC values for %.0fx%.0f @ %.2f %s\n", xPixels, yPixels, freq, argv[4]);
printf("\n");
printf(" hTotal = %-4d vTotal = %-4d\n",
t.h.hTotal, t.v.vTotal);
t.h.hTotal, t.v.vTotal);
printf(" hDisp = %-4d vDisp = %-4d\n",
t.h.hDisp, t.v.vDisp);
t.h.hDisp, t.v.vDisp);
printf(" hSyncStart = %-4d vSyncStart = %-4d\n",
t.h.hSyncStart, t.v.vSyncStart);
t.h.hSyncStart, t.v.vSyncStart);
printf(" hSyncEnd = %-4d vSyncEnd = %-4d\n",
t.h.hSyncEnd, t.v.vSyncEnd);
t.h.hSyncEnd, t.v.vSyncEnd);
printf(" hFrontPorch = %-4d vFrontPorch = %-4d\n",
t.h.hFrontPorch, t.v.vFrontPorch);
t.h.hFrontPorch, t.v.vFrontPorch);
printf(" hSyncWidth = %-4d vSyncWidth = %-4d\n",
t.h.hSyncWidth, t.v.vSyncWidth);
t.h.hSyncWidth, t.v.vSyncWidth);
printf(" hBackPorch = %-4d vBackPorch = %-4d\n",
t.h.hBackPorch, t.v.vBackPorch);
t.h.hBackPorch, t.v.vBackPorch);
printf("\n");
printf(" Interlaced = %s\n", (t.interlace == 'I') ? "Yes" : "No");
printf(" H sync pol = %c\n", t.hSyncPol);
@ -419,18 +419,18 @@ void main(int argc,char *argv[])
/* Dump to file in format used by SciTech Display Doctor */
if ((f = fopen("UVCONFIG.CRT","w")) != NULL) {
fprintf(f, "[%.0f %.0f]\n", xPixels, yPixels);
fprintf(f, "%d %d %d %d '%c' %s\n",
t.h.hTotal, t.h.hDisp,
t.h.hSyncStart, t.h.hSyncEnd,
t.hSyncPol, (t.interlace == 'I') ? "I" : "NI");
fprintf(f, "%d %d %d %d '%c'\n",
t.v.vTotal, t.v.vDisp,
t.v.vSyncStart, t.v.vSyncEnd,
t.vSyncPol);
fprintf(f, "%.2f\n", t.dotClock);
fclose(f);
}
fprintf(f, "[%.0f %.0f]\n", xPixels, yPixels);
fprintf(f, "%d %d %d %d '%c' %s\n",
t.h.hTotal, t.h.hDisp,
t.h.hSyncStart, t.h.hSyncEnd,
t.hSyncPol, (t.interlace == 'I') ? "I" : "NI");
fprintf(f, "%d %d %d %d '%c'\n",
t.v.vTotal, t.v.vDisp,
t.v.vSyncStart, t.v.vSyncEnd,
t.vSyncPol);
fprintf(f, "%.2f\n", t.dotClock);
fclose(f);
}
}
#endif /* TESTING */

239
board/MAI/bios_emulator/scitech/src/common/libcimp.c
View file

@ -270,27 +270,27 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
/* Find an empty file handle to use */
for (i = 3; i < MAX_FILES; i++) {
if (!openHandles[i])
break;
}
if (!openHandles[i])
break;
}
if (openHandles[i])
return -1;
return -1;
/* Find the open flags to use */
if (_oflag & ___O_TRUNC)
strcpy(mode,"w");
strcpy(mode,"w");
else if (_oflag & ___O_CREAT)
strcpy(mode,"a");
strcpy(mode,"a");
else
strcpy(mode,"r");
strcpy(mode,"r");
if (_oflag & ___O_BINARY)
strcat(mode,"b");
strcat(mode,"b");
if (_oflag & ___O_TEXT)
strcat(mode,"t");
strcat(mode,"t");
/* Open the file and store the file handle */
if ((openHandles[i] = fopen(_path,mode)) == NULL)
return -1;
return -1;
return i;
}
@ -300,25 +300,25 @@ int _CDECL stub_access(const char *_path, int _amode)
int _CDECL stub_close(int _fildes)
{
if (_fildes >= 3 && openHandles[_fildes]) {
fclose(openHandles[_fildes]);
openHandles[_fildes] = NULL;
}
fclose(openHandles[_fildes]);
openHandles[_fildes] = NULL;
}
return 0;
}
off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
{
if (_fildes >= 3) {
fseek(openHandles[_fildes],_offset,_whence);
return ftell(openHandles[_fildes]);
}
fseek(openHandles[_fildes],_offset,_whence);
return ftell(openHandles[_fildes]);
}
return 0;
}
size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
{
if (_fildes >= 3)
return fread(_buf,1,_nbyte,openHandles[_fildes]);
return fread(_buf,1,_nbyte,openHandles[_fildes]);
return 0;
}
@ -327,18 +327,18 @@ int _CDECL stub_unlink(const char *_path)
WORD error;
if (initComplete) {
if (R0_DeleteFile((char*)_path,0,&error))
return 0;
return -1;
}
if (R0_DeleteFile((char*)_path,0,&error))
return 0;
return -1;
}
else
return i_remove(_path);
return i_remove(_path);
}
size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
{
if (_fildes >= 3)
return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
return _nbyte;
}
@ -356,7 +356,7 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
{
WORD error;
if (initComplete)
R0_SetFileAttributes((char*)filename,attrib,&error);
R0_SetFileAttributes((char*)filename,attrib,&error);
}
/* Return the current date in days since 1/1/1980 */
@ -380,59 +380,59 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
/* Find an empty file handle to use */
for (i = 3; i < MAX_FILES; i++) {
if (!openHandles[i])
break;
}
if (!openHandles[i])
break;
}
if (openHandles[i])
return -1;
return -1;
/* Find the open flags to use */
if (_oflag & ___O_TRUNC)
strcpy(mode,"w");
strcpy(mode,"w");
else if (_oflag & ___O_CREAT)
strcpy(mode,"a");
strcpy(mode,"a");
else
strcpy(mode,"r");
strcpy(mode,"r");
if (_oflag & ___O_BINARY)
strcat(mode,"b");
strcat(mode,"b");
if (_oflag & ___O_TEXT)
strcat(mode,"t");
strcat(mode,"t");
/* Open the file and store the file handle */
if ((openHandles[i] = fopen(_path,mode)) == NULL)
return -1;
return -1;
return i;
}
int _CDECL stub_close(int _fildes)
{
if (_fildes >= 3 && openHandles[_fildes]) {
fclose(openHandles[_fildes]);
openHandles[_fildes] = NULL;
}
fclose(openHandles[_fildes]);
openHandles[_fildes] = NULL;
}
return 0;
}
off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
{
if (_fildes >= 3) {
fseek(openHandles[_fildes],_offset,_whence);
return ftell(openHandles[_fildes]);
}
fseek(openHandles[_fildes],_offset,_whence);
return ftell(openHandles[_fildes]);
}
return 0;
}
size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
{
if (_fildes >= 3)
return fread(_buf,1,_nbyte,openHandles[_fildes]);
return fread(_buf,1,_nbyte,openHandles[_fildes]);
return 0;
}
size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
{
if (_fildes >= 3)
return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
return _nbyte;
}
@ -444,7 +444,7 @@ int _CDECL stub_isatty(int _fildes)
int _CDECL stub_unlink(const char *_path)
{
// TODO: Implement this!
/* TODO: Implement this! */
return -1;
}
@ -454,7 +454,7 @@ int _CDECL stub_remove(const char *_filename)
int _CDECL stub_rename(const char *_old, const char *_new)
{
// TODO: Implement this!
/* TODO: Implement this! */
return -1;
}
@ -462,11 +462,11 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
{
uint _attr = 0;
if (attrib & __A_RDONLY)
_attr |= FILE_ATTRIBUTE_READONLY;
_attr |= FILE_ATTRIBUTE_READONLY;
if (attrib & __A_HIDDEN)
_attr |= FILE_ATTRIBUTE_HIDDEN;
_attr |= FILE_ATTRIBUTE_HIDDEN;
if (attrib & __A_SYSTEM)
_attr |= FILE_ATTRIBUTE_SYSTEM;
_attr |= FILE_ATTRIBUTE_SYSTEM;
PM_setFileAttr(filename,_attr);
}
@ -506,7 +506,7 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
{
FILESTATUS3 s;
if (DosQueryPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s)))
return;
return;
s.attrFile = attrib;
DosSetPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s),0L);
}
@ -528,25 +528,25 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
/* Determine open flags */
if (_oflag & ___O_CREAT) {
if (_oflag & ___O_EXCL)
openflag = OPEN_ACTION_FAIL_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
else if (_oflag & ___O_TRUNC)
openflag = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
else
openflag = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
}
if (_oflag & ___O_EXCL)
openflag = OPEN_ACTION_FAIL_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
else if (_oflag & ___O_TRUNC)
openflag = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
else
openflag = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
}
else if (_oflag & ___O_TRUNC)
openflag = OPEN_ACTION_REPLACE_IF_EXISTS;
openflag = OPEN_ACTION_REPLACE_IF_EXISTS;
else
openflag = OPEN_ACTION_OPEN_IF_EXISTS;
openflag = OPEN_ACTION_OPEN_IF_EXISTS;
/* Determine open mode flags */
if (_oflag & ___O_RDONLY)
openmode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE;
openmode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE;
else if (_oflag & ___O_WRONLY)
openmode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE;
openmode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE;
else
openmode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE;
openmode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE;
/* Copy the path to a variable on the stack. We need to do this
* for OS/2 as when the drivers are loaded into shared kernel
@ -555,14 +555,14 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
*/
strcpy(path,_path);
if (DosOpen(path, &handle, &actiontaken, 0, FILE_NORMAL,
openflag, openmode, NULL) != NO_ERROR)
return -1;
openflag, openmode, NULL) != NO_ERROR)
return -1;
/* Handle append mode of operation */
if (_oflag & ___O_APPEND) {
if (DosSetFilePtr(handle, 0, FILE_END, &error) != NO_ERROR)
return -1;
}
if (DosSetFilePtr(handle, 0, FILE_END, &error) != NO_ERROR)
return -1;
}
return handle;
}
@ -578,16 +578,16 @@ int _CDECL stub_access(const char *_path, int _amode)
*/
strcpy(path,_path);
if (DosQueryPathInfo(path, FIL_STANDARD, &fs, sizeof(fs)) != NO_ERROR)
return -1;
return -1;
if ((_amode & W_OK) && (fs.attrFile & FILE_READONLY))
return -1;
return -1;
return 0;
}
int _CDECL stub_close(int _fildes)
{
if (DosClose(_fildes) != NO_ERROR)
return -1;
return -1;
return 0;
}
@ -596,17 +596,17 @@ off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
ULONG cbActual, origin;
switch (_whence) {
case SEEK_CUR:
origin = FILE_CURRENT;
break;
case SEEK_END:
origin = FILE_END;
break;
default:
origin = FILE_BEGIN;
}
case SEEK_CUR:
origin = FILE_CURRENT;
break;
case SEEK_END:
origin = FILE_END;
break;
default:
origin = FILE_BEGIN;
}
if (DosSetFilePtr(_fildes, _offset, origin, &cbActual) != NO_ERROR)
return -1;
return -1;
return cbActual;
}
@ -621,19 +621,19 @@ size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
* in kernel space and will cause DosRead to bail internally.
*/
while (_nbyte > BUF_SIZE) {
if (DosRead(_fildes, file_io_buf, BUF_SIZE, &cbRead) != NO_ERROR)
return -1;
cbActual += cbRead;
memcpy(p,file_io_buf,BUF_SIZE);
p += BUF_SIZE;
_nbyte -= BUF_SIZE;
}
if (DosRead(_fildes, file_io_buf, BUF_SIZE, &cbRead) != NO_ERROR)
return -1;
cbActual += cbRead;
memcpy(p,file_io_buf,BUF_SIZE);
p += BUF_SIZE;
_nbyte -= BUF_SIZE;
}
if (_nbyte) {
if (DosRead(_fildes, file_io_buf, _nbyte, &cbRead) != NO_ERROR)
return -1;
cbActual += cbRead;
memcpy(p,file_io_buf,_nbyte);
}
if (DosRead(_fildes, file_io_buf, _nbyte, &cbRead) != NO_ERROR)
return -1;
cbActual += cbRead;
memcpy(p,file_io_buf,_nbyte);
}
return cbActual;
}
@ -648,19 +648,19 @@ size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
* in kernel space and will cause DosWrite to bail internally.
*/
while (_nbyte > BUF_SIZE) {
memcpy(file_io_buf,p,BUF_SIZE);
if (DosWrite(_fildes, file_io_buf, BUF_SIZE, &cbWrite) != NO_ERROR)
return -1;
cbActual += cbWrite;
p += BUF_SIZE;
_nbyte -= BUF_SIZE;
}
memcpy(file_io_buf,p,BUF_SIZE);
if (DosWrite(_fildes, file_io_buf, BUF_SIZE, &cbWrite) != NO_ERROR)
return -1;
cbActual += cbWrite;
p += BUF_SIZE;
_nbyte -= BUF_SIZE;
}
if (_nbyte) {
memcpy(file_io_buf,p,_nbyte);
if (DosWrite(_fildes, file_io_buf, _nbyte, &cbWrite) != NO_ERROR)
return -1;
cbActual += cbWrite;
}
memcpy(file_io_buf,p,_nbyte);
if (DosWrite(_fildes, file_io_buf, _nbyte, &cbWrite) != NO_ERROR)
return -1;
cbActual += cbWrite;
}
return cbActual;
}
@ -675,7 +675,7 @@ int _CDECL stub_unlink(const char *_path)
*/
strcpy(path,_path);
if (DosDelete(path) != NO_ERROR)
return -1;
return -1;
return 0;
}
@ -684,7 +684,7 @@ int _CDECL stub_isatty(int _fildes)
ULONG htype, flags;
if (DosQueryHType(_fildes, &htype, &flags) != NO_ERROR)
return 0;
return 0;
return ((htype & 0xFF) == HANDTYPE_DEVICE);
}
@ -700,7 +700,7 @@ int _CDECL stub_remove(const char *_path)
*/
strcpy(path,_path);
if (DosDelete(path) != NO_ERROR)
return -1;
return -1;
return 0;
}
@ -717,7 +717,7 @@ int _CDECL stub_rename(const char *_old, const char *_new)
strcpy(old,_old);
strcpy(new,_new);
if (DosMove(old, new) != NO_ERROR)
return -1;
return -1;
return 0;
}
@ -734,23 +734,23 @@ void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
{
int oflag_tab[] = {
___O_RDONLY, O_RDONLY,
___O_WRONLY, O_WRONLY,
___O_RDWR, O_RDWR,
___O_BINARY, O_BINARY,
___O_TEXT, O_TEXT,
___O_CREAT, O_CREAT,
___O_EXCL, O_EXCL,
___O_TRUNC, O_TRUNC,
___O_APPEND, O_APPEND,
};
___O_RDONLY, O_RDONLY,
___O_WRONLY, O_WRONLY,
___O_RDWR, O_RDWR,
___O_BINARY, O_BINARY,
___O_TEXT, O_TEXT,
___O_CREAT, O_CREAT,
___O_EXCL, O_EXCL,
___O_TRUNC, O_TRUNC,
___O_APPEND, O_APPEND,
};
int i,oflag = 0;
/* Translate the oflag's to the OS dependent versions */
for (i = 0; i < sizeof(oflag_tab) / sizeof(int); i += 2) {
if (_oflag & oflag_tab[i])
oflag |= oflag_tab[i+1];
}
if (_oflag & oflag_tab[i])
oflag |= oflag_tab[i+1];
}
return open(_path,oflag,_mode);
}
@ -825,4 +825,3 @@ void * _CDECL stub_signal(int sig, void *handler)
return (void*)signal(sig,(__code_ptr)handler);
#endif
}

345
board/MAI/bios_emulator/scitech/src/common/peloader.c
View file

@ -79,35 +79,35 @@ static int PE_readHeader(
result = PE_invalidDLLImage;
fseek(f, startOffset, SEEK_SET);
if (fread(&exehdr, 1, sizeof(exehdr), f) != sizeof(exehdr))
return false;
return false;
if (exehdr.signature != 0x5A4D)
return false;
return false;
/* Now seek to the start of the PE header defined at offset 0x3C
* in the MS-DOS EXE header, and read the signature and check it.
*/
fseek(f, startOffset+0x3C, SEEK_SET);
if (fread(&offset, 1, sizeof(offset), f) != sizeof(offset))
return false;
return false;
fseek(f, startOffset+offset, SEEK_SET);
if (fread(&signature, 1, sizeof(signature), f) != sizeof(signature))
return false;
return false;
if (signature != 0x00004550)
return false;
return false;
/* Now read the PE file header and check that it is correct */
if (fread(filehdr, 1, sizeof(*filehdr), f) != sizeof(*filehdr))
return false;
return false;
if (filehdr->Machine != IMAGE_FILE_MACHINE_I386)
return false;
return false;
if (!(filehdr->Characteristics & IMAGE_FILE_32BIT_MACHINE))
return false;
return false;
if (!(filehdr->Characteristics & IMAGE_FILE_DLL))
return false;
return false;
if (fread(opthdr, 1, sizeof(*opthdr), f) != sizeof(*opthdr))
return false;
return false;
if (opthdr->Magic != 0x10B)
return false;
return false;
/* Success, so return true! */
return true;
@ -138,15 +138,15 @@ ulong PEAPI PE_getFileSize(
/* Read the PE file headers from disk */
if (!PE_readHeader(f,startOffset,&filehdr,&opthdr))
return 0xFFFFFFFF;
return 0xFFFFFFFF;
/* Scan all the section headers summing up the total size */
size = opthdr.SizeOfHeaders;
for (i = 0; i < filehdr.NumberOfSections; i++) {
if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
return 0xFFFFFFFF;
size += secthdr.SizeOfRawData;
}
if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
return 0xFFFFFFFF;
size += secthdr.SizeOfRawData;
}
return size;
}
@ -199,7 +199,7 @@ PE_MODULE * PEAPI PE_loadLibraryExt(
/* Read the PE file headers from disk */
if (!PE_readHeader(f,startOffset,&filehdr,&opthdr))
return NULL;
return NULL;
/* Scan all the section headers and find the necessary sections */
text_off = data_off = reloc_off = export_off = 0;
@ -208,56 +208,56 @@ PE_MODULE * PEAPI PE_loadLibraryExt(
export_addr = export_size = export_end = 0;
reloc_size = 0;
for (i = 0; i < filehdr.NumberOfSections; i++) {
if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
goto Error;
if (strcmp(secthdr.Name, ".edata") == 0 || strcmp(secthdr.Name, ".rdata") == 0) {
/* Exports section */
export_off = secthdr.PointerToRawData;
export_addr = secthdr.VirtualAddress;
export_size = secthdr.SizeOfRawData;
export_end = export_addr + export_size;
}
else if (strcmp(secthdr.Name, ".idata") == 0) {
/* Imports section, ignore */
}
else if (strcmp(secthdr.Name, ".reloc") == 0) {
/* Relocations section */
reloc_off = secthdr.PointerToRawData;
reloc_size = secthdr.SizeOfRawData;
}
else if (!text_off && secthdr.Characteristics & IMAGE_SCN_CNT_CODE) {
/* Code section */
text_off = secthdr.PointerToRawData;
text_addr = secthdr.VirtualAddress;
text_size = secthdr.SizeOfRawData;
}
else if (!data_off && secthdr.Characteristics & IMAGE_SCN_CNT_INITIALIZED_DATA) {
/* Data section */
data_off = secthdr.PointerToRawData;
data_addr = secthdr.VirtualAddress;
data_size = secthdr.SizeOfRawData;
data_end = data_addr + data_size;
}
}
if (fread(&secthdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
goto Error;
if (strcmp(secthdr.Name, ".edata") == 0 || strcmp(secthdr.Name, ".rdata") == 0) {
/* Exports section */
export_off = secthdr.PointerToRawData;
export_addr = secthdr.VirtualAddress;
export_size = secthdr.SizeOfRawData;
export_end = export_addr + export_size;
}
else if (strcmp(secthdr.Name, ".idata") == 0) {
/* Imports section, ignore */
}
else if (strcmp(secthdr.Name, ".reloc") == 0) {
/* Relocations section */
reloc_off = secthdr.PointerToRawData;
reloc_size = secthdr.SizeOfRawData;
}
else if (!text_off && secthdr.Characteristics & IMAGE_SCN_CNT_CODE) {
/* Code section */
text_off = secthdr.PointerToRawData;
text_addr = secthdr.VirtualAddress;
text_size = secthdr.SizeOfRawData;
}
else if (!data_off && secthdr.Characteristics & IMAGE_SCN_CNT_INITIALIZED_DATA) {
/* Data section */
data_off = secthdr.PointerToRawData;
data_addr = secthdr.VirtualAddress;
data_size = secthdr.SizeOfRawData;
data_end = data_addr + data_size;
}
}
/* Check to make sure that we have all the sections we need */
if (!text_off || !data_off || !export_off || !reloc_off) {
result = PE_invalidDLLImage;
goto Error;
}
result = PE_invalidDLLImage;
goto Error;
}
/* Find the size of the image to load allocate memory for it */
image_size = MAX(export_end,data_end) - text_addr;
*size = sizeof(PE_MODULE) + image_size + 4096;
if (shared)
hMod = PM_mallocShared(*size);
hMod = PM_mallocShared(*size);
else
hMod = PM_malloc(*size);
hMod = PM_malloc(*size);
reloc = PM_malloc(reloc_size);
if (!hMod || !reloc) {
result = PE_outOfMemory;
goto Error;
}
result = PE_outOfMemory;
goto Error;
}
hMod->text = (uchar*)ROUND_4K((ulong)hMod + sizeof(PE_MODULE));
hMod->data = (uchar*)((ulong)hMod->text + (data_addr - text_addr));
@ -272,48 +272,48 @@ PE_MODULE * PEAPI PE_loadLibraryExt(
result = PE_invalidDLLImage;
fseek(f, startOffset+text_off, SEEK_SET);
if (fread(hMod->text, 1, text_size, f) != text_size)
goto Error;
goto Error;
fseek(f, startOffset+data_off, SEEK_SET);
if (fread(hMod->data, 1, data_size, f) != data_size)
goto Error;
goto Error;
fseek(f, startOffset+export_off, SEEK_SET);
if (fread(hMod->export, 1, export_size, f) != export_size)
goto Error;
goto Error;
fseek(f, startOffset+reloc_off, SEEK_SET);
if (fread(reloc, 1, reloc_size, f) != reloc_size)
goto Error;
goto Error;
/* Now perform relocations on all sections in the image */
delta = (ulong)hMod->text - opthdr.ImageBase - text_addr;
baseReloc = (BASE_RELOCATION*)reloc;
for (;;) {
/* Check for termination condition */
if (!baseReloc->PageRVA || !baseReloc->BlockSize)
break;
/* Check for termination condition */
if (!baseReloc->PageRVA || !baseReloc->BlockSize)
break;
/* Do fixups */
pageOffset = baseReloc->PageRVA - hMod->textBase;
numFixups = (baseReloc->BlockSize - sizeof(BASE_RELOCATION)) / sizeof(ushort);
fixup = (ushort*)(baseReloc + 1);
for (i = 0; i < numFixups; i++) {
relocType = *fixup >> 12;
if (relocType) {
offset = pageOffset + (*fixup & 0x0FFF);
*(ulong*)(hMod->text + offset) += delta;
}
fixup++;
}
/* Do fixups */
pageOffset = baseReloc->PageRVA - hMod->textBase;
numFixups = (baseReloc->BlockSize - sizeof(BASE_RELOCATION)) / sizeof(ushort);
fixup = (ushort*)(baseReloc + 1);
for (i = 0; i < numFixups; i++) {
relocType = *fixup >> 12;
if (relocType) {
offset = pageOffset + (*fixup & 0x0FFF);
*(ulong*)(hMod->text + offset) += delta;
}
fixup++;
}
/* Move to next relocation block */
baseReloc = (BASE_RELOCATION*)((ulong)baseReloc + baseReloc->BlockSize);
}
/* Move to next relocation block */
baseReloc = (BASE_RELOCATION*)((ulong)baseReloc + baseReloc->BlockSize);
}
/* Initialise the C runtime library for the loaded DLL */
result = PE_unableToInitLibC;
if ((InitLibC = (InitLibC_t)PE_getProcAddress(hMod,"_InitLibC")) == NULL)
goto Error;
goto Error;
if (!InitLibC(&___imports,PM_getOSType()))
goto Error;
goto Error;
/* Clean up, close the file and return the loaded module handle */
PM_free(reloc);
@ -322,9 +322,9 @@ PE_MODULE * PEAPI PE_loadLibraryExt(
Error:
if (shared)
PM_freeShared(hMod);
PM_freeShared(hMod);
else
PM_free(hMod);
PM_free(hMod);
PM_free(reloc);
return NULL;
}
@ -360,53 +360,53 @@ PE_MODULE * PEAPI PE_loadLibrary(
#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
if (!shared) {
PM_MODULE hInst;
InitLibC_t InitLibC;
PM_MODULE hInst;
InitLibC_t InitLibC;
/* For Win32 if are building checked libraries for debugging, we use
* the real Win32 DLL functions so that we can debug the resulting DLL
* files with the Win32 debuggers. Note that we can't do this if
* we need to load the files into a shared memory context.
*/
if ((hInst = PM_loadLibrary(szDLLName)) == NULL) {
result = PE_fileNotFound;
return NULL;
}
/* For Win32 if are building checked libraries for debugging, we use
* the real Win32 DLL functions so that we can debug the resulting DLL
* files with the Win32 debuggers. Note that we can't do this if
* we need to load the files into a shared memory context.
*/
if ((hInst = PM_loadLibrary(szDLLName)) == NULL) {
result = PE_fileNotFound;
return NULL;
}
/* Initialise the C runtime library for the loaded DLL */
result = PE_unableToInitLibC;
if ((InitLibC = (void*)PM_getProcAddress(hInst,"_InitLibC")) == NULL)
return NULL;
if (!InitLibC(&___imports,PM_getOSType()))
return NULL;
/* Initialise the C runtime library for the loaded DLL */
result = PE_unableToInitLibC;
if ((InitLibC = (void*)PM_getProcAddress(hInst,"_InitLibC")) == NULL)
return NULL;
if (!InitLibC(&___imports,PM_getOSType()))
return NULL;
/* Allocate the PE_MODULE structure */
if ((hMod = PM_malloc(sizeof(*hMod))) == NULL)
return NULL;
hMod->text = (void*)hInst;
hMod->shared = -1;
/* Allocate the PE_MODULE structure */
if ((hMod = PM_malloc(sizeof(*hMod))) == NULL)
return NULL;
hMod->text = (void*)hInst;
hMod->shared = -1;
/* DLL loaded successfully so return module handle */
result = PE_ok;
return hMod;
}
/* DLL loaded successfully so return module handle */
result = PE_ok;
return hMod;
}
else
#endif
{
FILE *f;
ulong size;
{
FILE *f;
ulong size;
/* Attempt to open the file on disk */
if (shared < 0)
shared = 0;
if ((f = fopen(szDLLName,"rb")) == NULL) {
result = PE_fileNotFound;
return NULL;
}
hMod = PE_loadLibraryExt(f,0,&size,shared);
fclose(f);
return hMod;
}
/* Attempt to open the file on disk */
if (shared < 0)
shared = 0;
if ((f = fopen(szDLLName,"rb")) == NULL) {
result = PE_fileNotFound;
return NULL;
}
hMod = PE_loadLibraryExt(f,0,&size,shared);
fclose(f);
return hMod;
}
}
/****************************************************************************
@ -445,14 +445,14 @@ PE_MODULE * PEAPI PE_loadLibraryMGL(
*/
#if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__)
if (getenv("MGL_ROOT")) {
strcpy(path,getenv("MGL_ROOT"));
PM_backslash(path);
}
strcpy(path,getenv("MGL_ROOT"));
PM_backslash(path);
}
strcat(path,"drivers");
PM_backslash(path);
strcat(path,szDLLName);
if ((hMod = PE_loadLibrary(path,shared)) != NULL)
return hMod;
return hMod;
#endif
strcpy(path,"drivers");
PM_backslash(path);
@ -488,39 +488,39 @@ void * PEAPI PE_getProcAddress(
{
#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
if (hModule->shared == -1)
return (void*)PM_getProcAddress(hModule->text,szProcName);
return (void*)PM_getProcAddress(hModule->text,szProcName);
else
#endif
{
uint i;
EXPORT_DIRECTORY *exports;
ulong funcOffset;
ulong *AddressTable;
ulong *NameTable;
ushort *OrdinalTable;
char *name;
{
uint i;
EXPORT_DIRECTORY *exports;
ulong funcOffset;
ulong *AddressTable;
ulong *NameTable;
ushort *OrdinalTable;
char *name;
/* Find the address of the export tables from the export section */
if (!hModule)
return NULL;
exports = (EXPORT_DIRECTORY*)(hModule->export + hModule->exportDir);
AddressTable = (ulong*)(hModule->export + exports->AddressTableRVA - hModule->exportBase);
NameTable = (ulong*)(hModule->export + exports->NameTableRVA - hModule->exportBase);
OrdinalTable = (ushort*)(hModule->export + exports->OrdinalTableRVA - hModule->exportBase);
/* Find the address of the export tables from the export section */
if (!hModule)
return NULL;
exports = (EXPORT_DIRECTORY*)(hModule->export + hModule->exportDir);
AddressTable = (ulong*)(hModule->export + exports->AddressTableRVA - hModule->exportBase);
NameTable = (ulong*)(hModule->export + exports->NameTableRVA - hModule->exportBase);
OrdinalTable = (ushort*)(hModule->export + exports->OrdinalTableRVA - hModule->exportBase);
/* Search the export name table to find the function name */
for (i = 0; i < exports->NumberOfNamePointers; i++) {
name = (char*)(hModule->export + NameTable[i] - hModule->exportBase);
if (strcmp(name,szProcName) == 0)
break;
}
if (i == exports->NumberOfNamePointers)
return NULL;
funcOffset = AddressTable[OrdinalTable[i]];
if (!funcOffset)
return NULL;
return (void*)(hModule->text + funcOffset - hModule->textBase);
}
/* Search the export name table to find the function name */
for (i = 0; i < exports->NumberOfNamePointers; i++) {
name = (char*)(hModule->export + NameTable[i] - hModule->exportBase);
if (strcmp(name,szProcName) == 0)
break;
}
if (i == exports->NumberOfNamePointers)
return NULL;
funcOffset = AddressTable[OrdinalTable[i]];
if (!funcOffset)
return NULL;
return (void*)(hModule->text + funcOffset - hModule->textBase);
}
}
/****************************************************************************
@ -546,25 +546,25 @@ void PEAPI PE_freeLibrary(
#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
if (hModule->shared == -1) {
/* Run the C runtime library exit code on module unload */
if ((TerminateLibC = (TerminateLibC_t)PM_getProcAddress(hModule->text,"_TerminateLibC")) != NULL)
TerminateLibC();
PM_freeLibrary(hModule->text);
PM_free(hModule);
}
/* Run the C runtime library exit code on module unload */
if ((TerminateLibC = (TerminateLibC_t)PM_getProcAddress(hModule->text,"_TerminateLibC")) != NULL)
TerminateLibC();
PM_freeLibrary(hModule->text);
PM_free(hModule);
}
else
#endif
{
if (hModule) {
/* Run the C runtime library exit code on module unload */
if ((TerminateLibC = (TerminateLibC_t)PE_getProcAddress(hModule,"_TerminateLibC")) != NULL)
TerminateLibC();
if (hModule->shared)
PM_freeShared(hModule);
else
PM_free(hModule);
}
}
{
if (hModule) {
/* Run the C runtime library exit code on module unload */
if ((TerminateLibC = (TerminateLibC_t)PE_getProcAddress(hModule,"_TerminateLibC")) != NULL)
TerminateLibC();
if (hModule->shared)
PM_freeShared(hModule);
else
PM_free(hModule);
}
}
}
/****************************************************************************
@ -584,4 +584,3 @@ int PEAPI PE_getError(void)
{
return result;
}

506
board/MAI/bios_emulator/scitech/src/common/vesavbe.c
View file

@ -73,10 +73,10 @@ void VBEAPI VBE_init(void)
****************************************************************************/
{
if (!state->VESABuf_ptr) {
/* Allocate a global buffer for communicating with the VESA VBE */
if ((state->VESABuf_ptr = PM_getVESABuf(&VESABuf_len, &state->VESABuf_rseg, &state->VESABuf_roff)) == NULL)
PM_fatalError("VESAVBE.C: Real mode memory allocation failed!");
}
/* Allocate a global buffer for communicating with the VESA VBE */
if ((state->VESABuf_ptr = PM_getVESABuf(&VESABuf_len, &state->VESABuf_rseg, &state->VESABuf_roff)) == NULL)
PM_fatalError("VESAVBE.C: Real mode memory allocation failed!");
}
}
void * VBEAPI VBE_getRMBuf(uint *len,uint *rseg,uint *roff)
@ -129,7 +129,7 @@ void VBEAPI VBE_callESDI(RMREGS *regs, void *buffer, int size)
RMSREGS sregs;
if (!state->VESABuf_ptr)
PM_fatalError("You *MUST* call VBE_init() before you can call the VESAVBE.C module!");
PM_fatalError("You *MUST* call VBE_init() before you can call the VESAVBE.C module!");
sregs.es = (ushort)state->VESABuf_rseg;
regs->x.di = (ushort)state->VESABuf_roff;
memcpy(state->VESABuf_ptr, buffer, size);
@ -157,7 +157,7 @@ static char *VBE_copyStrToLocal(char *p,char *realPtr,char *max)
v = PM_mapRealPointer((uint)((ulong)realPtr >> 16), (uint)((ulong)realPtr & 0xFFFF));
while (*v != 0 && p < max)
*p++ = *v++;
*p++ = *v++;
*p++ = 0;
return p;
}
@ -178,7 +178,7 @@ static void VBE_copyShortToLocal(ushort *p,ushort *realPtr)
v = PM_mapRealPointer((uint)((ulong)realPtr >> 16),(uint)((ulong)realPtr & 0xFFFF));
while (*v != 0xFFFF)
*p++ = *v++;
*p++ = *v++;
*p = 0xFFFF;
}
#endif
@ -200,26 +200,26 @@ int VBEAPI VBE_detectEXT(VBE_vgaInfo *vgaInfo,ibool forceUniVBE)
regs.x.ax = 0x4F00; /* Get SuperVGA information */
if (forceUniVBE) {
regs.x.bx = 0x1234;
regs.x.cx = 0x4321;
}
regs.x.bx = 0x1234;
regs.x.cx = 0x4321;
}
else {
regs.x.bx = 0;
regs.x.cx = 0;
}
regs.x.bx = 0;
regs.x.cx = 0;
}
strncpy(vgaInfo->VESASignature,"VBE2",4);
VBE_callESDI(&regs, vgaInfo, sizeof(*vgaInfo));
if (regs.x.ax != VBE_SUCCESS)
return 0;
return 0;
if (strncmp(vgaInfo->VESASignature,"VESA",4) != 0)
return 0;
return 0;
/* Check for bogus BIOSes that return a VBE version number that is
* not correct, and fix it up. We also check the OemVendorNamePtr for a
* valid value, and if it is invalid then we also reset to VBE 1.2.
*/
if (vgaInfo->VESAVersion >= 0x200 && vgaInfo->OemVendorNamePtr == 0)
vgaInfo->VESAVersion = 0x102;
vgaInfo->VESAVersion = 0x102;
#ifndef REALMODE
/* Relocate all the indirect information (mode tables, OEM strings
* etc) from the low 1Mb memory region into a static buffer in
@ -227,23 +227,23 @@ int VBEAPI VBE_detectEXT(VBE_vgaInfo *vgaInfo,ibool forceUniVBE)
* from mapping the strings from real mode to protected mode.
*/
{
char *p,*p2;
char *p,*p2;
p2 = VBE_copyStrToLocal(localBuf,vgaInfo->OemStringPtr,MAX_LOCAL_BUF);
vgaInfo->OemStringPtr = localBuf;
if (vgaInfo->VESAVersion >= 0x200) {
p = VBE_copyStrToLocal(p2,vgaInfo->OemVendorNamePtr,MAX_LOCAL_BUF);
vgaInfo->OemVendorNamePtr = p2;
p2 = VBE_copyStrToLocal(p,vgaInfo->OemProductNamePtr,MAX_LOCAL_BUF);
vgaInfo->OemProductNamePtr = p;
p = VBE_copyStrToLocal(p2,vgaInfo->OemProductRevPtr,MAX_LOCAL_BUF);
vgaInfo->OemProductRevPtr = p2;
VBE_copyShortToLocal((ushort*)p,vgaInfo->VideoModePtr);
vgaInfo->VideoModePtr = (ushort*)p;
}
p = VBE_copyStrToLocal(p2,vgaInfo->OemVendorNamePtr,MAX_LOCAL_BUF);
vgaInfo->OemVendorNamePtr = p2;
p2 = VBE_copyStrToLocal(p,vgaInfo->OemProductNamePtr,MAX_LOCAL_BUF);
vgaInfo->OemProductNamePtr = p;
p = VBE_copyStrToLocal(p2,vgaInfo->OemProductRevPtr,MAX_LOCAL_BUF);
vgaInfo->OemProductRevPtr = p2;
VBE_copyShortToLocal((ushort*)p,vgaInfo->VideoModePtr);
vgaInfo->VideoModePtr = (ushort*)p;
}
else {
VBE_copyShortToLocal((ushort*)p2,vgaInfo->VideoModePtr);
vgaInfo->VideoModePtr = (ushort*)p2;
}
VBE_copyShortToLocal((ushort*)p2,vgaInfo->VideoModePtr);
vgaInfo->VideoModePtr = (ushort*)p2;
}
}
#endif
state->VBEMemory = vgaInfo->TotalMemory * 64;
@ -253,17 +253,17 @@ int VBEAPI VBE_detectEXT(VBE_vgaInfo *vgaInfo,ibool forceUniVBE)
*/
haveRiva128 = false;
if (vgaInfo->VESAVersion >= 0x300 &&
(strstr(vgaInfo->OemStringPtr,"NVidia") != NULL ||
strstr(vgaInfo->OemStringPtr,"Riva") != NULL)) {
haveRiva128 = true;
}
(strstr(vgaInfo->OemStringPtr,"NVidia") != NULL ||
strstr(vgaInfo->OemStringPtr,"Riva") != NULL)) {
haveRiva128 = true;
}
/* Check for Matrox G400 cards which claim to be VBE 3.0
* compliant yet they don't implement the refresh rate control
* functions.
*/
if (vgaInfo->VESAVersion >= 0x300 && (strcmp(vgaInfo->OemProductNamePtr,"Matrox G400") == 0))
vgaInfo->VESAVersion = 0x200;
vgaInfo->VESAVersion = 0x200;
return (state->VBEVersion = vgaInfo->VESAVersion);
}
@ -305,70 +305,70 @@ ibool VBEAPI VBE_getModeInfo(int mode,VBE_modeInfo *modeInfo)
regs.x.cx = (ushort)mode;
VBE_callESDI(&regs, modeInfo, sizeof(*modeInfo));
if (regs.x.ax != VBE_SUCCESS)
return false;
return false;
if ((modeInfo->ModeAttributes & vbeMdAvailable) == 0)
return false;
return false;
/* Map out triple buffer and stereo flags for NVidia Riva128
* chips.
*/
if (haveRiva128) {
modeInfo->ModeAttributes &= ~vbeMdTripleBuf;
modeInfo->ModeAttributes &= ~vbeMdStereo;
}
modeInfo->ModeAttributes &= ~vbeMdTripleBuf;
modeInfo->ModeAttributes &= ~vbeMdStereo;
}
/* Support old style RGB definitions for VBE 1.1 BIOSes */
bits = modeInfo->BitsPerPixel;
if (modeInfo->MemoryModel == vbeMemPK && bits > 8) {
modeInfo->MemoryModel = vbeMemRGB;
switch (bits) {
case 15:
modeInfo->RedMaskSize = 5;
modeInfo->RedFieldPosition = 10;
modeInfo->GreenMaskSize = 5;
modeInfo->GreenFieldPosition = 5;
modeInfo->BlueMaskSize = 5;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 1;
modeInfo->RsvdFieldPosition = 15;
break;
case 16:
modeInfo->RedMaskSize = 5;
modeInfo->RedFieldPosition = 11;
modeInfo->GreenMaskSize = 5;
modeInfo->GreenFieldPosition = 5;
modeInfo->BlueMaskSize = 5;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 0;
modeInfo->RsvdFieldPosition = 0;
break;
case 24:
modeInfo->RedMaskSize = 8;
modeInfo->RedFieldPosition = 16;
modeInfo->GreenMaskSize = 8;
modeInfo->GreenFieldPosition = 8;
modeInfo->BlueMaskSize = 8;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 0;
modeInfo->RsvdFieldPosition = 0;
break;
}
}
modeInfo->MemoryModel = vbeMemRGB;
switch (bits) {
case 15:
modeInfo->RedMaskSize = 5;
modeInfo->RedFieldPosition = 10;
modeInfo->GreenMaskSize = 5;
modeInfo->GreenFieldPosition = 5;
modeInfo->BlueMaskSize = 5;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 1;
modeInfo->RsvdFieldPosition = 15;
break;
case 16:
modeInfo->RedMaskSize = 5;
modeInfo->RedFieldPosition = 11;
modeInfo->GreenMaskSize = 5;
modeInfo->GreenFieldPosition = 5;
modeInfo->BlueMaskSize = 5;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 0;
modeInfo->RsvdFieldPosition = 0;
break;
case 24:
modeInfo->RedMaskSize = 8;
modeInfo->RedFieldPosition = 16;
modeInfo->GreenMaskSize = 8;
modeInfo->GreenFieldPosition = 8;
modeInfo->BlueMaskSize = 8;
modeInfo->BlueFieldPosition = 0;
modeInfo->RsvdMaskSize = 0;
modeInfo->RsvdFieldPosition = 0;
break;
}
}
/* Convert the 32k direct color modes of VBE 1.2+ BIOSes to
* be recognised as 15 bits per pixel modes.
*/
if (bits == 16 && modeInfo->RsvdMaskSize == 1)
modeInfo->BitsPerPixel = 15;
modeInfo->BitsPerPixel = 15;
/* Fix up bogus BIOS'es that report incorrect reserved pixel masks
* for 32K color modes. Quite a number of BIOS'es have this problem,
* and this affects our OS/2 drivers in VBE fallback mode.
*/
if (bits == 15 && (modeInfo->RsvdMaskSize != 1 || modeInfo->RsvdFieldPosition != 15)) {
modeInfo->RsvdMaskSize = 1;
modeInfo->RsvdFieldPosition = 15;
}
modeInfo->RsvdMaskSize = 1;
modeInfo->RsvdFieldPosition = 15;
}
return true;
}
@ -391,20 +391,20 @@ long VBEAPI VBE_getPageSize(VBE_modeInfo *mi)
size = (long)mi->BytesPerScanLine * (long)mi->YResolution;
if (mi->BitsPerPixel == 4) {
/* We have a 16 color video mode, so round up the page size to
* 8k, 16k, 32k or 64k boundaries depending on how large it is.
*/
/* We have a 16 color video mode, so round up the page size to
* 8k, 16k, 32k or 64k boundaries depending on how large it is.
*/
size = (size + 0x1FFFL) & 0xFFFFE000L;
if (size != 0x2000) {
size = (size + 0x3FFFL) & 0xFFFFC000L;
if (size != 0x4000) {
size = (size + 0x7FFFL) & 0xFFFF8000L;
if (size != 0x8000)
size = (size + 0xFFFFL) & 0xFFFF0000L;
}
}
}
size = (size + 0x1FFFL) & 0xFFFFE000L;
if (size != 0x2000) {
size = (size + 0x3FFFL) & 0xFFFFC000L;
if (size != 0x4000) {
size = (size + 0x7FFFL) & 0xFFFF8000L;
if (size != 0x8000)
size = (size + 0xFFFFL) & 0xFFFF0000L;
}
}
}
else size = (size + 0xFFFFL) & 0xFFFF0000L;
return size;
}
@ -425,26 +425,26 @@ ibool VBEAPI VBE_setVideoModeExt(int mode,VBE_CRTCInfo *crtc)
RMREGS regs;
if (state->VBEVersion < 0x200 && mode < 0x100) {
/* Some VBE implementations barf terribly if you try to set non-VBE
* video modes with the VBE set mode call. VBE 2.0 implementations
* must be able to handle this.
*/
regs.h.al = (ushort)mode;
regs.h.ah = 0;
PM_int86(0x10,&regs,&regs);
}
/* Some VBE implementations barf terribly if you try to set non-VBE
* video modes with the VBE set mode call. VBE 2.0 implementations
* must be able to handle this.
*/
regs.h.al = (ushort)mode;
regs.h.ah = 0;
PM_int86(0x10,&regs,&regs);
}
else {
if (state->VBEVersion < 0x300 && (mode & vbeRefreshCtrl))
return false;
regs.x.ax = 0x4F02;
regs.x.bx = (ushort)mode;
if ((mode & vbeRefreshCtrl) && crtc)
VBE_callESDI(&regs, crtc, sizeof(*crtc));
else
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return false;
}
if (state->VBEVersion < 0x300 && (mode & vbeRefreshCtrl))
return false;
regs.x.ax = 0x4F02;
regs.x.bx = (ushort)mode;
if ((mode & vbeRefreshCtrl) && crtc)
VBE_callESDI(&regs, crtc, sizeof(*crtc));
else
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return false;
}
return true;
}
@ -475,7 +475,7 @@ int VBEAPI VBE_getVideoMode(void)
regs.x.ax = 0x4F03;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return -1;
return -1;
return regs.x.bx;
}
@ -515,7 +515,7 @@ int VBEAPI VBE_getBank(int window)
regs.h.bl = window;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return -1;
return -1;
return regs.x.dx;
}
@ -637,7 +637,7 @@ ibool VBEAPI VBE_setDisplayStart(int x,int y,ibool waitVRT)
regs.x.ax = 0x4F07;
if (waitVRT)
regs.x.bx = 0x80;
regs.x.bx = 0x80;
else regs.x.bx = 0x00;
regs.x.cx = x;
regs.x.dx = y;
@ -685,12 +685,12 @@ ibool VBEAPI VBE_setDisplayStartAlt(ulong startAddr,ibool waitVRT)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = waitVRT ? 0x82 : 0x02;
regs.e.ecx = startAddr;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
regs.x.ax = 0x4F07;
regs.x.bx = waitVRT ? 0x82 : 0x02;
regs.e.ecx = startAddr;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
return false;
}
@ -712,12 +712,12 @@ int VBEAPI VBE_getDisplayStartStatus(void)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = 0x0004;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax == VBE_SUCCESS)
return (regs.x.cx != 0);
}
regs.x.ax = 0x4F07;
regs.x.bx = 0x0004;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax == VBE_SUCCESS)
return (regs.x.cx != 0);
}
return -1;
}
@ -738,11 +738,11 @@ ibool VBEAPI VBE_enableStereoMode(void)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = 0x0005;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
regs.x.ax = 0x4F07;
regs.x.bx = 0x0005;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
return false;
}
@ -762,11 +762,11 @@ ibool VBEAPI VBE_disableStereoMode(void)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = 0x0006;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
regs.x.ax = 0x4F07;
regs.x.bx = 0x0006;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
return false;
}
@ -793,13 +793,13 @@ ibool VBEAPI VBE_setStereoDisplayStart(ulong leftAddr,ulong rightAddr,
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F07;
regs.x.bx = waitVRT ? 0x83 : 0x03;
regs.e.ecx = leftAddr;
regs.e.edx = rightAddr;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
regs.x.ax = 0x4F07;
regs.x.bx = waitVRT ? 0x83 : 0x03;
regs.e.ecx = leftAddr;
regs.e.edx = rightAddr;
PM_int86(0x10,&regs,&regs);
return regs.x.ax == VBE_SUCCESS;
}
return false;
}
@ -832,14 +832,14 @@ ulong VBEAPI VBE_getClosestClock(ushort mode,ulong pixelClock)
RMREGS regs;
if (state->VBEVersion >= 0x300) {
regs.x.ax = 0x4F0B;
regs.h.bl = 0x00;
regs.e.ecx = pixelClock;
regs.x.dx = mode;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax == VBE_SUCCESS)
return regs.e.ecx;
}
regs.x.ax = 0x4F0B;
regs.h.bl = 0x00;
regs.e.ecx = pixelClock;
regs.x.dx = mode;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax == VBE_SUCCESS)
return regs.e.ecx;
}
return -1;
}
@ -875,7 +875,7 @@ int VBEAPI VBE_getDACWidth(void)
regs.h.bl = 0x01;
PM_int86(0x10,&regs,&regs);
if (regs.x.ax != VBE_SUCCESS)
return -1;
return -1;
return regs.h.bh;
}
@ -927,11 +927,11 @@ void * VBEAPI VBE_getBankedPointer(VBE_modeInfo *modeInfo)
*/
ulong seg = (ushort)modeInfo->WinASegment;
if (seg != 0) {
if (seg == 0xA000)
return (void*)PM_getA0000Pointer();
else
return (void*)PM_mapPhysicalAddr(seg << 4,0xFFFF,true);
}
if (seg == 0xA000)
return (void*)PM_getA0000Pointer();
else
return (void*)PM_mapPhysicalAddr(seg << 4,0xFFFF,true);
}
return NULL;
}
@ -956,14 +956,14 @@ void * VBEAPI VBE_getLinearPointer(VBE_modeInfo *modeInfo)
/* Search for an already mapped pointer */
for (i = 0; i < numPtrs; i++) {
if (physPtr[i] == modeInfo->PhysBasePtr)
return linPtr[i];
}
if (physPtr[i] == modeInfo->PhysBasePtr)
return linPtr[i];
}
if (numPtrs < MAX_LIN_PTRS) {
physPtr[numPtrs] = modeInfo->PhysBasePtr;
linPtr[numPtrs] = PM_mapPhysicalAddr(modeInfo->PhysBasePtr,(state->VBEMemory * 1024L)-1,true);
return linPtr[numPtrs++];
}
physPtr[numPtrs] = modeInfo->PhysBasePtr;
linPtr[numPtrs] = PM_mapPhysicalAddr(modeInfo->PhysBasePtr,(state->VBEMemory * 1024L)-1,true);
return linPtr[numPtrs++];
}
return NULL;
}
@ -989,56 +989,56 @@ static void InitPMCode(void)
int pmLen;
if (!state->pmInfo && state->VBEVersion >= 0x200) {
regs.x.ax = 0x4F0A;
regs.x.bx = 0;
PM_int86x(0x10,&regs,&regs,&sregs);
if (regs.x.ax != VBE_SUCCESS)
return;
if (VBE_shared)
state->pmInfo = PM_mallocShared(regs.x.cx);
else
state->pmInfo = PM_malloc(regs.x.cx);
if (state->pmInfo == NULL)
return;
state->pmInfo32 = state->pmInfo;
pmLen = regs.x.cx;
regs.x.ax = 0x4F0A;
regs.x.bx = 0;
PM_int86x(0x10,&regs,&regs,&sregs);
if (regs.x.ax != VBE_SUCCESS)
return;
if (VBE_shared)
state->pmInfo = PM_mallocShared(regs.x.cx);
else
state->pmInfo = PM_malloc(regs.x.cx);
if (state->pmInfo == NULL)
return;
state->pmInfo32 = state->pmInfo;
pmLen = regs.x.cx;
/* Relocate the block into our local data segment */
code = PM_mapRealPointer(sregs.es,regs.x.di);
memcpy(state->pmInfo,code,pmLen);
/* Relocate the block into our local data segment */
code = PM_mapRealPointer(sregs.es,regs.x.di);
memcpy(state->pmInfo,code,pmLen);
/* Now do a sanity check on the information we recieve to ensure
* that is is correct. Some BIOS return totally bogus information
* in here (Matrox is one)! Under DOS this works OK, but under OS/2
* we are screwed.
*/
if (state->pmInfo->setWindow >= pmLen ||
state->pmInfo->setDisplayStart >= pmLen ||
state->pmInfo->setPalette >= pmLen ||
state->pmInfo->IOPrivInfo >= pmLen) {
if (VBE_shared)
PM_freeShared(state->pmInfo);
else
PM_free(state->pmInfo);
state->pmInfo32 = state->pmInfo = NULL;
return;
}
/* Now do a sanity check on the information we recieve to ensure
* that is is correct. Some BIOS return totally bogus information
* in here (Matrox is one)! Under DOS this works OK, but under OS/2
* we are screwed.
*/
if (state->pmInfo->setWindow >= pmLen ||
state->pmInfo->setDisplayStart >= pmLen ||
state->pmInfo->setPalette >= pmLen ||
state->pmInfo->IOPrivInfo >= pmLen) {
if (VBE_shared)
PM_freeShared(state->pmInfo);
else
PM_free(state->pmInfo);
state->pmInfo32 = state->pmInfo = NULL;
return;
}
/* Read the IO priveledge info and determine if we need to
* pass a selector to MMIO registers to the bank switch code.
* Since we no longer support selector allocation, we no longer
* support this mechanism so we disable the protected mode
* interface in this case.
*/
if (state->pmInfo->IOPrivInfo && !state->MMIOSel) {
ushort *p = (ushort*)((uchar*)state->pmInfo + state->pmInfo->IOPrivInfo);
while (*p != 0xFFFF)
p++;
p++;
if (*p != 0xFFFF)
VBE_freePMCode();
}
}
/* Read the IO priveledge info and determine if we need to
* pass a selector to MMIO registers to the bank switch code.
* Since we no longer support selector allocation, we no longer
* support this mechanism so we disable the protected mode
* interface in this case.
*/
if (state->pmInfo->IOPrivInfo && !state->MMIOSel) {
ushort *p = (ushort*)((uchar*)state->pmInfo + state->pmInfo->IOPrivInfo);
while (*p != 0xFFFF)
p++;
p++;
if (*p != 0xFFFF)
VBE_freePMCode();
}
}
}
void * VBEAPI VBE_getSetBank(void)
@ -1050,10 +1050,10 @@ void * VBEAPI VBE_getSetBank(void)
****************************************************************************/
{
if (state->VBEVersion >= 0x200) {
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setWindow;
}
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setWindow;
}
return NULL;
}
@ -1066,10 +1066,10 @@ void * VBEAPI VBE_getSetDisplayStart(void)
****************************************************************************/
{
if (state->VBEVersion >= 0x200) {
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setDisplayStart;
}
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setDisplayStart;
}
return NULL;
}
@ -1082,10 +1082,10 @@ void * VBEAPI VBE_getSetPalette(void)
****************************************************************************/
{
if (state->VBEVersion >= 0x200) {
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setPalette;
}
InitPMCode();
if (state->pmInfo)
return (uchar*)state->pmInfo + state->pmInfo->setPalette;
}
return NULL;
}
@ -1104,13 +1104,13 @@ void VBEAPI VBE_freePMCode(void)
****************************************************************************/
{
if (state->pmInfo) {
if (VBE_shared)
PM_freeShared(state->pmInfo);
else
PM_free(state->pmInfo);
state->pmInfo = NULL;
state->pmInfo32 = NULL;
}
if (VBE_shared)
PM_freeShared(state->pmInfo);
else
PM_free(state->pmInfo);
state->pmInfo = NULL;
state->pmInfo32 = NULL;
}
}
void VBEAPI VBE_sharePMCode(void)
@ -1183,31 +1183,31 @@ ibool VBEAPI VBE_getBankFunc32(int *codeLen,void **bankFunc,int dualBanks,
InitPMCode();
if (state->VBEVersion >= 0x200 && state->pmInfo32 && !state->MMIOSel) {
code = (uchar*)state->pmInfo32 + state->pmInfo32->setWindow;
if (state->pmInfo32->extensionSig == VBE20_EXT_SIG)
len = state->pmInfo32->setWindowLen-1;
else {
/* We are running on a system without the UniVBE 5.2 extension.
* We do as best we can by scanning through the code for the
* ret function to determine the length. This is not foolproof,
* but is the best we can do.
*/
p = code;
while (*p != 0xC3)
p++;
len = p - code;
}
if ((len + sizeof(VBE20A_bankFunc32_Start) + sizeof(VBE20_bankFunc32_End)) > sizeof(bankFunc32))
PM_fatalError("32-bit bank switch function too long!");
copy(p,bankFunc32,VBE20A_bankFunc32_Start);
memcpy(p,code,len);
p += len;
copy(p,p,VBE20_bankFunc32_End);
*codeLen = p - bankFunc32;
bankFunc32[VBE20_adjustOffset] = (uchar)bankAdjust;
*bankFunc = bankFunc32;
return true;
}
code = (uchar*)state->pmInfo32 + state->pmInfo32->setWindow;
if (state->pmInfo32->extensionSig == VBE20_EXT_SIG)
len = state->pmInfo32->setWindowLen-1;
else {
/* We are running on a system without the UniVBE 5.2 extension.
* We do as best we can by scanning through the code for the
* ret function to determine the length. This is not foolproof,
* but is the best we can do.
*/
p = code;
while (*p != 0xC3)
p++;
len = p - code;
}
if ((len + sizeof(VBE20A_bankFunc32_Start) + sizeof(VBE20_bankFunc32_End)) > sizeof(bankFunc32))
PM_fatalError("32-bit bank switch function too long!");
copy(p,bankFunc32,VBE20A_bankFunc32_Start);
memcpy(p,code,len);
p += len;
copy(p,p,VBE20_bankFunc32_End);
*codeLen = p - bankFunc32;
bankFunc32[VBE20_adjustOffset] = (uchar)bankAdjust;
*bankFunc = bankFunc32;
return true;
}
return false;
}

4
board/MAI/bios_emulator/scitech/src/pm/beos/cpuinfo.c
View file

@ -64,8 +64,8 @@ Initialise the counter and return the frequency of the counter.
static void GetCounterFrequency(
CPU_largeInteger *freq)
{
// TODO: Return the frequency of the counter in here. You should try to
// normalise this value to be around 100,000 ticks per second.
/* TODO: Return the frequency of the counter in here. You should try to */
/* normalise this value to be around 100,000 ticks per second. */
freq->low = 1000000;
freq->high = 0;
}

70
board/MAI/bios_emulator/scitech/src/pm/beos/event.c
View file

@ -59,7 +59,7 @@ events.
****************************************************************************/
ulong _EVT_getTicks(void)
{
// TODO: Implement this for your OS!
/* TODO: Implement this for your OS! */
}
/****************************************************************************
@ -68,36 +68,36 @@ Pumps all messages in the application message queue into our event queue.
****************************************************************************/
static void _EVT_pumpMessages(void)
{
// TODO: The purpose of this function is to read all keyboard and mouse
// events from the OS specific event queue, translate them and post
// them into the SciTech event queue.
//
// NOTE: There are a couple of important things that this function must
// take care of:
//
// 1. Support for KEYDOWN, KEYREPEAT and KEYUP is required.
//
// 2. Support for reading hardware scan code as well as ASCII
// translated values is required. Games use the scan codes rather
// than ASCII values. Scan codes go into the high order byte of the
// keyboard message field.
//
// 3. Support for at least reading mouse motion data (mickeys) from the
// mouse is required. Using the mickey values, we can then translate
// to mouse cursor coordinates scaled to the range of the current
// graphics display mode. Mouse values are scaled based on the
// global 'rangeX' and 'rangeY'.
//
// 4. Support for a timestamp for the events is required, which is
// defined as the number of milliseconds since some event (usually
// system startup). This is the timestamp when the event occurred
// (ie: at interrupt time) not when it was stuff into the SciTech
// event queue.
//
// 5. Support for mouse double click events. If the OS has a native
// mechanism to determine this, it should be used. Otherwise the
// time stamp information will be used by the generic event code
// to generate double click events.
/* TODO: The purpose of this function is to read all keyboard and mouse */
/* events from the OS specific event queue, translate them and post */
/* them into the SciTech event queue. */
/* */
/* NOTE: There are a couple of important things that this function must */
/* take care of: */
/* */
/* 1. Support for KEYDOWN, KEYREPEAT and KEYUP is required. */
/* */
/* 2. Support for reading hardware scan code as well as ASCII */
/* translated values is required. Games use the scan codes rather */
/* than ASCII values. Scan codes go into the high order byte of the */
/* keyboard message field. */
/* */
/* 3. Support for at least reading mouse motion data (mickeys) from the */
/* mouse is required. Using the mickey values, we can then translate */
/* to mouse cursor coordinates scaled to the range of the current */
/* graphics display mode. Mouse values are scaled based on the */
/* global 'rangeX' and 'rangeY'. */
/* */
/* 4. Support for a timestamp for the events is required, which is */
/* defined as the number of milliseconds since some event (usually */
/* system startup). This is the timestamp when the event occurred */
/* (ie: at interrupt time) not when it was stuff into the SciTech */
/* event queue. */
/* */
/* 5. Support for mouse double click events. If the OS has a native */
/* mechanism to determine this, it should be used. Otherwise the */
/* time stamp information will be used by the generic event code */
/* to generate double click events. */
}
/****************************************************************************
@ -141,7 +141,7 @@ void EVTAPI EVT_init(
initEventQueue();
memset(keyUpMsg,0,sizeof(keyUpMsg));
// TODO: Do any OS specific initialisation here
/* TODO: Do any OS specific initialisation here */
/* Catch program termination signals so we can clean up properly */
signal(SIGABRT, _EVT_abort);
@ -171,7 +171,7 @@ and this function can be used to resume it again later.
****************************************************************************/
void EVT_resume(void)
{
// Do nothing for non DOS systems
/* Do nothing for non DOS systems */
}
/****************************************************************************
@ -181,7 +181,7 @@ de-install the event handling code.
****************************************************************************/
void EVT_suspend(void)
{
// Do nothing for non DOS systems
/* Do nothing for non DOS systems */
}
/****************************************************************************
@ -195,5 +195,5 @@ void EVT_exit(void)
signal(SIGFPE, SIG_DFL);
signal(SIGINT, SIG_DFL);
// TODO: Do any OS specific cleanup in here
/* TODO: Do any OS specific cleanup in here */
}

4
board/MAI/bios_emulator/scitech/src/pm/beos/oshdr.h
View file

@ -28,5 +28,5 @@
*
****************************************************************************/
// This is where you include OS specific headers for the event handling
// library.
/* This is where you include OS specific headers for the event handling */
/* library. */

298
board/MAI/bios_emulator/scitech/src/pm/beos/pm.c
View file

@ -38,7 +38,7 @@
#include <stdlib.h>
#include <string.h>
// TODO: Include any BeOS specific headers here!
/* TODO: Include any BeOS specific headers here! */
/*--------------------------- Global variables ----------------------------*/
@ -48,12 +48,12 @@ static void (PMAPIP fatalErrorCleanup)(void) = NULL;
void PMAPI PM_init(void)
{
// TODO: Do any initialisation in here. This includes getting IOPL
// access for the process calling PM_init. This will get called
// more than once.
/* TODO: Do any initialisation in here. This includes getting IOPL */
/* access for the process calling PM_init. This will get called */
/* more than once. */
// TODO: If you support the supplied MTRR register stuff (you need to
// be at ring 0 for this!), you should initialise it in here.
/* TODO: If you support the supplied MTRR register stuff (you need to */
/* be at ring 0 for this!), you should initialise it in here. */
/* MTRR_init(); */
}
@ -68,9 +68,9 @@ void PMAPI PM_backslash(char *s)
{
uint pos = strlen(s);
if (s[pos-1] != '/') {
s[pos] = '/';
s[pos+1] = '\0';
}
s[pos] = '/';
s[pos+1] = '\0';
}
}
void PMAPI PM_setFatalErrorCleanup(
@ -81,112 +81,112 @@ void PMAPI PM_setFatalErrorCleanup(
void PMAPI PM_fatalError(const char *msg)
{
// TODO: If you are running in a GUI environment without a console,
// this needs to be changed to bring up a fatal error message
// box and terminate the program.
/* TODO: If you are running in a GUI environment without a console, */
/* this needs to be changed to bring up a fatal error message */
/* box and terminate the program. */
if (fatalErrorCleanup)
fatalErrorCleanup();
fatalErrorCleanup();
fprintf(stderr,"%s\n", msg);
exit(1);
}
void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff)
{
// No BIOS access for the BeOS
/* No BIOS access for the BeOS */
return NULL;
}
int PMAPI PM_kbhit(void)
{
// TODO: This function checks if a key is available to be read. This
// should be implemented, but is mostly used by the test programs
// these days.
/* TODO: This function checks if a key is available to be read. This */
/* should be implemented, but is mostly used by the test programs */
/* these days. */
return true;
}
int PMAPI PM_getch(void)
{
// TODO: This returns the ASCII code of the key pressed. This
// should be implemented, but is mostly used by the test programs
// these days.
/* TODO: This returns the ASCII code of the key pressed. This */
/* should be implemented, but is mostly used by the test programs */
/* these days. */
return 0xD;
}
int PMAPI PM_openConsole(void)
{
// TODO: Opens up a fullscreen console for graphics output. If your
// console does not have graphics/text modes, this can be left
// empty. The main purpose of this is to disable console switching
// when in graphics modes if you can switch away from fullscreen
// consoles (if you want to allow switching, this can be done
// elsewhere with a full save/restore state of the graphics mode).
/* TODO: Opens up a fullscreen console for graphics output. If your */
/* console does not have graphics/text modes, this can be left */
/* empty. The main purpose of this is to disable console switching */
/* when in graphics modes if you can switch away from fullscreen */
/* consoles (if you want to allow switching, this can be done */
/* elsewhere with a full save/restore state of the graphics mode). */
return 0;
}
int PMAPI PM_getConsoleStateSize(void)
{
// TODO: Returns the size of the console state buffer used to save the
// state of the console before going into graphics mode. This is
// used to restore the console back to normal when we are done.
/* TODO: Returns the size of the console state buffer used to save the */
/* state of the console before going into graphics mode. This is */
/* used to restore the console back to normal when we are done. */
return 1;
}
void PMAPI PM_saveConsoleState(void *stateBuf,int console_id)
{
// TODO: Saves the state of the console into the state buffer. This is
// used to restore the console back to normal when we are done.
// We will always restore 80x25 text mode after being in graphics
// mode, so if restoring text mode is all you need to do this can
// be left empty.
/* TODO: Saves the state of the console into the state buffer. This is */
/* used to restore the console back to normal when we are done. */
/* We will always restore 80x25 text mode after being in graphics */
/* mode, so if restoring text mode is all you need to do this can */
/* be left empty. */
}
void PMAPI PM_restoreConsoleState(const void *stateBuf,int console_id)
{
// TODO: Restore the state of the console from the state buffer. This is
// used to restore the console back to normal when we are done.
// We will always restore 80x25 text mode after being in graphics
// mode, so if restoring text mode is all you need to do this can
// be left empty.
/* TODO: Restore the state of the console from the state buffer. This is */
/* used to restore the console back to normal when we are done. */
/* We will always restore 80x25 text mode after being in graphics */
/* mode, so if restoring text mode is all you need to do this can */
/* be left empty. */
}
void PMAPI PM_closeConsole(int console_id)
{
// TODO: Close the console when we are done, going back to text mode.
/* TODO: Close the console when we are done, going back to text mode. */
}
void PM_setOSCursorLocation(int x,int y)
{
// TODO: Set the OS console cursor location to the new value. This is
// generally used for new OS ports (used mostly for DOS).
/* TODO: Set the OS console cursor location to the new value. This is */
/* generally used for new OS ports (used mostly for DOS). */
}
void PM_setOSScreenWidth(int width,int height)
{
// TODO: Set the OS console screen width. This is generally unused for
// new OS ports.
/* TODO: Set the OS console screen width. This is generally unused for */
/* new OS ports. */
}
ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler ih, int frequency)
{
// TODO: Install a real time clock interrupt handler. Normally this
// will not be supported from most OS'es in user land, so an
// alternative mechanism is needed to enable software stereo.
// Hence leave this unimplemented unless you have a high priority
// mechanism to call the 32-bit callback when the real time clock
// interrupt fires.
/* TODO: Install a real time clock interrupt handler. Normally this */
/* will not be supported from most OS'es in user land, so an */
/* alternative mechanism is needed to enable software stereo. */
/* Hence leave this unimplemented unless you have a high priority */
/* mechanism to call the 32-bit callback when the real time clock */
/* interrupt fires. */
return false;
}
void PMAPI PM_setRealTimeClockFrequency(int frequency)
{
// TODO: Set the real time clock interrupt frequency. Used for stereo
// LC shutter glasses when doing software stereo. Usually sets
// the frequency to around 2048 Hz.
/* TODO: Set the real time clock interrupt frequency. Used for stereo */
/* LC shutter glasses when doing software stereo. Usually sets */
/* the frequency to around 2048 Hz. */
}
void PMAPI PM_restoreRealTimeClockHandler(void)
{
// TODO: Restores the real time clock handler.
/* TODO: Restores the real time clock handler. */
}
char * PMAPI PM_getCurrentPath(
@ -219,8 +219,8 @@ const char * PMAPI PM_getNucleusConfigPath(void)
const char * PMAPI PM_getUniqueID(void)
{
// TODO: Return a unique ID for the machine. If a unique ID is not
// available, return the machine name.
/* TODO: Return a unique ID for the machine. If a unique ID is not */
/* available, return the machine name. */
static char buf[128];
gethostname(buf, 128);
return buf;
@ -228,7 +228,7 @@ const char * PMAPI PM_getUniqueID(void)
const char * PMAPI PM_getMachineName(void)
{
// TODO: Return the network machine name for the machine.
/* TODO: Return the network machine name for the machine. */
static char buf[128];
gethostname(buf, 128);
return buf;
@ -236,7 +236,7 @@ const char * PMAPI PM_getMachineName(void)
void * PMAPI PM_getBIOSPointer(void)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
return NULL;
}
@ -244,212 +244,212 @@ void * PMAPI PM_getA0000Pointer(void)
{
static void *bankPtr;
if (!bankPtr)
bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
return bankPtr;
}
void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
{
// TODO: This function maps a physical memory address to a linear
// address in the address space of the calling process.
/* TODO: This function maps a physical memory address to a linear */
/* address in the address space of the calling process. */
// NOTE: This function *must* be able to handle any phsyical base
// address, and hence you will have to handle rounding of
// the physical base address to a page boundary (ie: 4Kb on
// x86 CPU's) to be able to properly map in the memory
// region.
/* NOTE: This function *must* be able to handle any phsyical base */
/* address, and hence you will have to handle rounding of */
/* the physical base address to a page boundary (ie: 4Kb on */
/* x86 CPU's) to be able to properly map in the memory */
/* region. */
// NOTE: If possible the isCached bit should be used to ensure that
// the PCD (Page Cache Disable) and PWT (Page Write Through)
// bits are set to disable caching for a memory mapping used
// for MMIO register access. We also disable caching using
// the MTRR registers for Pentium Pro and later chipsets so if
// MTRR support is enabled for your OS then you can safely ignore
// the isCached flag and always enable caching in the page
// tables.
/* NOTE: If possible the isCached bit should be used to ensure that */
/* the PCD (Page Cache Disable) and PWT (Page Write Through) */
/* bits are set to disable caching for a memory mapping used */
/* for MMIO register access. We also disable caching using */
/* the MTRR registers for Pentium Pro and later chipsets so if */
/* MTRR support is enabled for your OS then you can safely ignore */
/* the isCached flag and always enable caching in the page */
/* tables. */
return NULL;
}
void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
{
// TODO: This function will free a physical memory mapping previously
// allocated with PM_mapPhysicalAddr() if at all possible. If
// you can't free physical memory mappings, simply do nothing.
/* TODO: This function will free a physical memory mapping previously */
/* allocated with PM_mapPhysicalAddr() if at all possible. If */
/* you can't free physical memory mappings, simply do nothing. */
}
ulong PMAPI PM_getPhysicalAddr(void *p)
{
// TODO: This function should find the physical address of a linear
// address.
/* TODO: This function should find the physical address of a linear */
/* address. */
return 0xFFFFFFFFUL;
}
void PMAPI PM_sleep(ulong milliseconds)
{
// TODO: Put the process to sleep for milliseconds
/* TODO: Put the process to sleep for milliseconds */
}
int PMAPI PM_getCOMPort(int port)
{
// TODO: Re-code this to determine real values using the Plug and Play
// manager for the OS.
/* TODO: Re-code this to determine real values using the Plug and Play */
/* manager for the OS. */
switch (port) {
case 0: return 0x3F8;
case 1: return 0x2F8;
}
case 0: return 0x3F8;
case 1: return 0x2F8;
}
return 0;
}
int PMAPI PM_getLPTPort(int port)
{
// TODO: Re-code this to determine real values using the Plug and Play
// manager for the OS.
/* TODO: Re-code this to determine real values using the Plug and Play */
/* manager for the OS. */
switch (port) {
case 0: return 0x3BC;
case 1: return 0x378;
case 2: return 0x278;
}
case 0: return 0x3BC;
case 1: return 0x378;
case 2: return 0x278;
}
return 0;
}
void * PMAPI PM_mallocShared(long size)
{
// TODO: This is used to allocate memory that is shared between process
// that all access the common Nucleus drivers via a common display
// driver DLL. If your OS does not support shared memory (or if
// the display driver does not need to allocate shared memory
// for each process address space), this should just call PM_malloc.
/* TODO: This is used to allocate memory that is shared between process */
/* that all access the common Nucleus drivers via a common display */
/* driver DLL. If your OS does not support shared memory (or if */
/* the display driver does not need to allocate shared memory */
/* for each process address space), this should just call PM_malloc. */
return PM_malloc(size);
}
void PMAPI PM_freeShared(void *ptr)
{
// TODO: Free the shared memory block. This will be called in the context
// of the original calling process that allocated the shared
// memory with PM_mallocShared. Simply call free if you do not
// need this.
/* TODO: Free the shared memory block. This will be called in the context */
/* of the original calling process that allocated the shared */
/* memory with PM_mallocShared. Simply call free if you do not */
/* need this. */
PM_free(ptr);
}
void * PMAPI PM_mapToProcess(void *base,ulong limit)
{
// TODO: This function is used to map a physical memory mapping
// previously allocated with PM_mapPhysicalAddr into the
// address space of the calling process. If the memory mapping
// allocated by PM_mapPhysicalAddr is global to all processes,
// simply return the pointer.
/* TODO: This function is used to map a physical memory mapping */
/* previously allocated with PM_mapPhysicalAddr into the */
/* address space of the calling process. If the memory mapping */
/* allocated by PM_mapPhysicalAddr is global to all processes, */
/* simply return the pointer. */
return base;
}
void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
return NULL;
}
void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
return NULL;
}
void PMAPI PM_freeRealSeg(void *mem)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
}
void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
}
int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
return 0;
}
int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
RMSREGS *sregs)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
return 0;
}
void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in,
RMSREGS *sregs)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
}
void PMAPI PM_availableMemory(ulong *physical,ulong *total)
{
// TODO: Report the amount of available memory, both the amount of
// physical memory left and the amount of virtual memory left.
// If the OS does not provide these services, report 0's.
/* TODO: Report the amount of available memory, both the amount of */
/* physical memory left and the amount of virtual memory left. */
/* If the OS does not provide these services, report 0's. */
*physical = *total = 0;
}
void * PMAPI PM_allocLockedMem(uint size,ulong *physAddr,ibool contiguous,ibool below16Meg)
{
// TODO: Allocate a block of locked, physical memory of the specified
// size. This is used for bus master operations. If this is not
// supported by the OS, return NULL and bus mastering will not
// be used.
/* TODO: Allocate a block of locked, physical memory of the specified */
/* size. This is used for bus master operations. If this is not */
/* supported by the OS, return NULL and bus mastering will not */
/* be used. */
return NULL;
}
void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous)
{
// TODO: Free a memory block allocated with PM_allocLockedMem.
/* TODO: Free a memory block allocated with PM_allocLockedMem. */
}
void PMAPI PM_setBankA(int bank)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
}
void PMAPI PM_setBankAB(int bank)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
}
void PMAPI PM_setCRTStart(int x,int y,int waitVRT)
{
// No BIOS access on the BeOS
/* No BIOS access on the BeOS */
}
ibool PMAPI PM_enableWriteCombine(ulong base,ulong length,uint type)
{
// TODO: This function should enable Pentium Pro and Pentium II MTRR
// write combining for the passed in physical memory base address
// and length. Normally this is done via calls to an OS specific
// device driver as this can only be done at ring 0.
//
// NOTE: This is a *very* important function to implement! If you do
// not implement, graphics performance on the latest Intel chips
// will be severly impaired. For sample code that can be used
// directly in a ring 0 device driver, see the MSDOS implementation
// which includes assembler code to do this directly (if the
// program is running at ring 0).
/* TODO: This function should enable Pentium Pro and Pentium II MTRR */
/* write combining for the passed in physical memory base address */
/* and length. Normally this is done via calls to an OS specific */
/* device driver as this can only be done at ring 0. */
/* */
/* NOTE: This is a *very* important function to implement! If you do */
/* not implement, graphics performance on the latest Intel chips */
/* will be severly impaired. For sample code that can be used */
/* directly in a ring 0 device driver, see the MSDOS implementation */
/* which includes assembler code to do this directly (if the */
/* program is running at ring 0). */
return false;
}
ibool PMAPI PM_doBIOSPOST(ushort axVal,ulong BIOSPhysAddr,void *mappedBIOS)
{
// TODO: This function is used to run the BIOS POST code on a secondary
// controller to initialise it for use. This is not necessary
// for multi-controller operation, but it will make it a lot
// more convenicent for end users (otherwise they have to boot
// the system once with the secondary controller as primary, and
// then boot with both controllers installed).
//
// Even if you don't support full BIOS access, it would be
// adviseable to be able to POST the secondary controllers in the
// system using this function as a minimum requirement. Some
// graphics hardware has registers that contain values that only
// the BIOS knows about, which makes bring up a card from cold
// reset difficult if the BIOS has not POST'ed it.
/* TODO: This function is used to run the BIOS POST code on a secondary */
/* controller to initialise it for use. This is not necessary */
/* for multi-controller operation, but it will make it a lot */
/* more convenicent for end users (otherwise they have to boot */
/* the system once with the secondary controller as primary, and */
/* then boot with both controllers installed). */
/* */
/* Even if you don't support full BIOS access, it would be */
/* adviseable to be able to POST the secondary controllers in the */
/* system using this function as a minimum requirement. Some */
/* graphics hardware has registers that contain values that only */
/* the BIOS knows about, which makes bring up a card from cold */
/* reset difficult if the BIOS has not POST'ed it. */
return false;
}
@ -506,7 +506,7 @@ ibool PMAPI PM_driveValid(
char drive)
{
if (drive == 3)
return true;
return true;
return false;
}
@ -533,7 +533,7 @@ void PMAPI PM_setFileAttr(
const char *filename,
uint attrib)
{
// TODO: Set the file attributes for a file
/* TODO: Set the file attributes for a file */
(void)filename;
(void)attrib;
}

20
board/MAI/bios_emulator/scitech/src/pm/beos/ztimer.c
View file

@ -36,7 +36,7 @@ Initialise the Zen Timer module internals.
****************************************************************************/
void _ZTimerInit(void)
{
// TODO: Do any specific internal initialisation in here
/* TODO: Do any specific internal initialisation in here */
}
/****************************************************************************
@ -46,8 +46,8 @@ Start the Zen Timer counting.
static void _LZTimerOn(
LZTimerObject *tm)
{
// TODO: Start the Zen Timer counting. This should be a macro if
// possible.
/* TODO: Start the Zen Timer counting. This should be a macro if */
/* possible. */
}
/****************************************************************************
@ -57,8 +57,8 @@ Compute the lap time since the timer was started.
static ulong _LZTimerLap(
LZTimerObject *tm)
{
// TODO: Compute the lap time between the current time and when the
// timer was started.
/* TODO: Compute the lap time between the current time and when the */
/* timer was started. */
return 0;
}
@ -69,7 +69,7 @@ Stop the Zen Timer counting.
static void _LZTimerOff(
LZTimerObject *tm)
{
// TODO: Stop the timer counting. Should be a macro if possible.
/* TODO: Stop the timer counting. Should be a macro if possible. */
}
/****************************************************************************
@ -79,7 +79,7 @@ Compute the elapsed time in microseconds between start and end timings.
static ulong _LZTimerCount(
LZTimerObject *tm)
{
// TODO: Compute the elapsed time and return it. Always microseconds.
/* TODO: Compute the elapsed time and return it. Always microseconds. */
return 0;
}
@ -95,9 +95,9 @@ Read the Long Period timer from the OS
****************************************************************************/
static ulong _ULZReadTime(void)
{
// TODO: Read the long period timer from the OS. The resolution of this
// timer should be around 1/20 of a second for timing long
// periods if possible.
/* TODO: Read the long period timer from the OS. The resolution of this */
/* timer should be around 1/20 of a second for timing long */
/* periods if possible. */
}
/****************************************************************************

274
board/MAI/bios_emulator/scitech/src/pm/common.c
View file

@ -98,9 +98,9 @@ static ibool TryPath(
strcpy(filename,bpdpath);
strcat(filename,dllname);
if ((f = fopen(filename,"rb")) == NULL)
return false;
return false;
if (cachedpath)
strcpy(cachedpath,bpdpath);
strcpy(cachedpath,bpdpath);
fclose(f);
return true;
}
@ -121,20 +121,20 @@ static ibool GetLocalOverride(void)
static ibool local_override = -1;
if (local_override == -1) {
local_override = false;
strcpy(filename,PM_getNucleusPath());
PM_backslash(filename);
strcat(filename,"graphics.ini");
if ((f = fopen(filename,"r")) != NULL) {
while (!feof(f) && fgets(filename,sizeof(filename),f)) {
if (strnicmp(filename,"uselocal",8) == 0) {
local_override = ((*(filename+9) - '0') == 1);
break;
}
}
fclose(f);
}
}
local_override = false;
strcpy(filename,PM_getNucleusPath());
PM_backslash(filename);
strcat(filename,"graphics.ini");
if ((f = fopen(filename,"r")) != NULL) {
while (!feof(f) && fgets(filename,sizeof(filename),f)) {
if (strnicmp(filename,"uselocal",8) == 0) {
local_override = ((*(filename+9) - '0') == 1);
break;
}
}
fclose(f);
}
}
return local_override;
}
@ -164,44 +164,44 @@ ibool PMAPI PM_findBPD(
/* On the first call determine the path to the Nucleus drivers */
if (cachedpath[0] == 0) {
/* First try in the global system Nucleus driver path if
* the local override setting is not enabled.
*/
PM_init();
if (!GetLocalOverride()) {
if (TryPath(bpdpath,cachedpath,PM_getNucleusPath(),"",dllname))
return true;
}
/* First try in the global system Nucleus driver path if
* the local override setting is not enabled.
*/
PM_init();
if (!GetLocalOverride()) {
if (TryPath(bpdpath,cachedpath,PM_getNucleusPath(),"",dllname))
return true;
}
/* Next try in the local application directory if available */
if (localBPDPath[0] != 0) {
if (TryPath(bpdpath,cachedpath,localBPDPath,"",dllname))
return true;
}
else {
/* Next try in the local application directory if available */
if (localBPDPath[0] != 0) {
if (TryPath(bpdpath,cachedpath,localBPDPath,"",dllname))
return true;
}
else {
#if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__)
char *mgl_root;
if ((mgl_root = getenv("MGL_ROOT")) != NULL) {
if (TryPath(bpdpath,cachedpath,mgl_root,"drivers",dllname))
return true;
}
char *mgl_root;
if ((mgl_root = getenv("MGL_ROOT")) != NULL) {
if (TryPath(bpdpath,cachedpath,mgl_root,"drivers",dllname))
return true;
}
#endif
PM_getCurrentPath(bpdpath,PM_MAX_PATH);
if (TryPath(bpdpath,cachedpath,bpdpath,"drivers",dllname))
return true;
}
PM_getCurrentPath(bpdpath,PM_MAX_PATH);
if (TryPath(bpdpath,cachedpath,bpdpath,"drivers",dllname))
return true;
}
/* Finally try in the global system path again so that we
* will still find the drivers in the global system path if
* the local override option is on, but the application does
* not have any local override drivers.
*/
if (TryPath(bpdpath,cachedpath,PM_getNucleusPath(),"",dllname))
return true;
/* Finally try in the global system path again so that we
* will still find the drivers in the global system path if
* the local override option is on, but the application does
* not have any local override drivers.
*/
if (TryPath(bpdpath,cachedpath,PM_getNucleusPath(),"",dllname))
return true;
/* Whoops, we can't find the BPD file! */
return false;
}
/* Whoops, we can't find the BPD file! */
return false;
}
/* Always try in the previously discovered path */
return TryPath(bpdpath,NULL,cachedpath,"",dllname);
@ -216,9 +216,9 @@ static char *_stpcpy(
const char *_src)
{
if (!_dest || !_src)
return 0;
return 0;
while ((*_dest++ = *_src++) != 0)
;
;
return --_dest;
}
@ -233,13 +233,13 @@ static void safe_strncpy(
unsigned maxlen)
{
if (dst) {
if(strlen(src) >= maxlen) {
strncpy(dst, src, maxlen);
dst[maxlen] = 0;
}
else
strcpy(dst, src);
}
if(strlen(src) >= maxlen) {
strncpy(dst, src, maxlen);
dst[maxlen] = 0;
}
else
strcpy(dst, src);
}
}
/****************************************************************************
@ -250,16 +250,16 @@ static int findDot(
char *p)
{
if (*(p-1) == '.')
p--;
p--;
switch (*--p) {
case ':':
if (*(p-2) != '\0')
break;
case '/':
case '\\':
case '\0':
return true;
}
case ':':
if (*(p-2) != '\0')
break;
case '/':
case '\\':
case '\0':
return true;
}
return false;
}
@ -299,25 +299,25 @@ void PMAPI PM_makepath(
const char *ext)
{
if (drive && *drive) {
*path++ = *drive;
*path++ = ':';
}
*path++ = *drive;
*path++ = ':';
}
if (dir && *dir) {
path = _stpcpy(path,dir);
if (*(path-1) != '\\' && *(path-1) != '/')
path = _stpcpy(path,dir);
if (*(path-1) != '\\' && *(path-1) != '/')
#ifdef __UNIX__
*path++ = '/';
*path++ = '/';
#else
*path++ = '\\';
*path++ = '\\';
#endif
}
}
if (name)
path = _stpcpy(path,name);
path = _stpcpy(path,name);
if (ext && *ext) {
if (*ext != '.')
*path++ = '.';
path = _stpcpy(path,ext);
}
if (*ext != '.')
*path++ = '.';
path = _stpcpy(path,ext);
}
*path = 0;
}
@ -377,7 +377,7 @@ int PMAPI PM_splitpath(
/* Copy filename into template up to PM_MAX_PATH characters */
p = buf;
if ((temp = strlen(path)) > PM_MAX_PATH)
temp = PM_MAX_PATH;
temp = PM_MAX_PATH;
*p++ = 0;
strncpy(p, path, temp);
*(p += temp) = 0;
@ -385,53 +385,53 @@ int PMAPI PM_splitpath(
/* Split the filename and fill corresponding nonzero pointers */
temp = 0;
for (;;) {
switch (*--p) {
case '.':
if (!temp && (*(p+1) == '\0'))
temp = findDot(p);
if ((!temp) && ((ret & PM_HAS_EXTENSION) == 0)) {
ret |= PM_HAS_EXTENSION;
safe_strncpy(ext, p, PM_MAX_PATH - 1);
*p = 0;
}
continue;
case ':':
if (p != &buf[2])
continue;
case '\0':
if (temp) {
if (*++p)
ret |= PM_HAS_DIRECTORY;
safe_strncpy(dir, p, PM_MAX_PATH - 1);
*p-- = 0;
break;
}
case '/':
case '\\':
if (!temp) {
temp++;
if (*++p)
ret |= PM_HAS_FILENAME;
safe_strncpy(name, p, PM_MAX_PATH - 1);
*p-- = 0;
if (*p == 0 || (*p == ':' && p == &buf[2]))
break;
}
continue;
case '*':
case '?':
if (!temp)
ret |= PM_HAS_WILDCARDS;
default:
continue;
}
break;
}
switch (*--p) {
case '.':
if (!temp && (*(p+1) == '\0'))
temp = findDot(p);
if ((!temp) && ((ret & PM_HAS_EXTENSION) == 0)) {
ret |= PM_HAS_EXTENSION;
safe_strncpy(ext, p, PM_MAX_PATH - 1);
*p = 0;
}
continue;
case ':':
if (p != &buf[2])
continue;
case '\0':
if (temp) {
if (*++p)
ret |= PM_HAS_DIRECTORY;
safe_strncpy(dir, p, PM_MAX_PATH - 1);
*p-- = 0;
break;
}
case '/':
case '\\':
if (!temp) {
temp++;
if (*++p)
ret |= PM_HAS_FILENAME;
safe_strncpy(name, p, PM_MAX_PATH - 1);
*p-- = 0;
if (*p == 0 || (*p == ':' && p == &buf[2]))
break;
}
continue;
case '*':
case '?':
if (!temp)
ret |= PM_HAS_WILDCARDS;
default:
continue;
}
break;
}
if (*p == ':') {
if (buf[1])
ret |= PM_HAS_DRIVE;
safe_strncpy(drive, &buf[1], PM_MAX_DRIVE - 1);
}
if (buf[1])
ret |= PM_HAS_DRIVE;
safe_strncpy(drive, &buf[1], PM_MAX_DRIVE - 1);
}
return ret;
}
@ -466,15 +466,15 @@ void PMAPI PM_blockUntilTimeout(
static ibool firstTime = true;
if (firstTime) {
firstTime = false;
LZTimerOnExt(&tm);
}
firstTime = false;
LZTimerOnExt(&tm);
}
else {
if ((msDelay = (microseconds - LZTimerLapExt(&tm)) / 1000L) > 0)
PM_sleep(msDelay);
while (LZTimerLapExt(&tm) < microseconds)
;
LZTimerOffExt(&tm);
LZTimerOnExt(&tm);
}
if ((msDelay = (microseconds - LZTimerLapExt(&tm)) / 1000L) > 0)
PM_sleep(msDelay);
while (LZTimerLapExt(&tm) < microseconds)
;
LZTimerOffExt(&tm);
LZTimerOnExt(&tm);
}
}

51
board/MAI/bios_emulator/scitech/src/pm/common/agp.c
View file

@ -54,22 +54,22 @@ size of the available AGP aperture in megabytes.
ulong PMAPI PM_agpInit(void)
{
if ((agp = AGP_loadDriver(0)) == NULL)
return 0;
return 0;
driver.dwSize = sizeof(driver);
if (!agp->QueryFunctions(AGP_GET_DRIVERFUNCS,&driver))
return 0;
return 0;
switch (driver.GetApertureSize()) {
case agpSize4MB: return 4;
case agpSize8MB: return 8;
case agpSize16MB: return 16;
case agpSize32MB: return 32;
case agpSize64MB: return 64;
case agpSize128MB: return 128;
case agpSize256MB: return 256;
case agpSize512MB: return 512;
case agpSize1GB: return 1024;
case agpSize2GB: return 2048;
}
case agpSize4MB: return 4;
case agpSize8MB: return 8;
case agpSize16MB: return 16;
case agpSize32MB: return 32;
case agpSize64MB: return 64;
case agpSize128MB: return 128;
case agpSize256MB: return 256;
case agpSize512MB: return 512;
case agpSize1GB: return 1024;
case agpSize2GB: return 2048;
}
return 0;
}
@ -106,18 +106,18 @@ ibool PMAPI PM_agpReservePhysical(
PM_physAddr *physAddr)
{
switch (type) {
case PM_agpUncached:
type = agpUncached;
break;
case PM_agpWriteCombine:
type = agpWriteCombine;
break;
case PM_agpIntelDCACHE:
type = agpIntelDCACHE;
break;
default:
return false;
}
case PM_agpUncached:
type = agpUncached;
break;
case PM_agpWriteCombine:
type = agpWriteCombine;
break;
case PM_agpIntelDCACHE:
type = agpIntelDCACHE;
break;
default:
return false;
}
return driver.ReservePhysical(numPages,type,physContext,physAddr) == nOK;
}
@ -187,4 +187,3 @@ ibool PMAPI PM_agpFreePhysical(
}
#endif /* !REALMODE */

457
board/MAI/bios_emulator/scitech/src/pm/common/keyboard.c
View file

@ -52,18 +52,18 @@ static uchar translateScan(
int n,pivot,val;
for (n = count; n > 0; ) {
pivot = n >> 1;
test = table + pivot;
val = scanCode - test->scanCode;
if (val < 0)
n = pivot;
else if (val == 0)
return test->asciiCode;
else {
table = test + 1;
n -= pivot + 1;
}
}
pivot = n >> 1;
test = table + pivot;
val = scanCode - test->scanCode;
if (val < 0)
n = pivot;
else if (val == 0)
return test->asciiCode;
else {
table = test + 1;
n -= pivot + 1;
}
}
return 0;
}
@ -84,35 +84,35 @@ void _EVT_maskKeyCode(
evt->message &= ~0xFF;
if (evt->modifiers & EVT_NUMLOCK) {
if ((ascii = translateScan(scan,EVT.codePage->numPad,EVT.codePage->numPadLen)) != 0) {
evt->message |= ascii;
return;
}
}
if ((ascii = translateScan(scan,EVT.codePage->numPad,EVT.codePage->numPadLen)) != 0) {
evt->message |= ascii;
return;
}
}
if (evt->modifiers & EVT_CTRLSTATE) {
evt->message |= translateScan(scan,EVT.codePage->ctrl,EVT.codePage->ctrlLen);
return;
}
evt->message |= translateScan(scan,EVT.codePage->ctrl,EVT.codePage->ctrlLen);
return;
}
if (evt->modifiers & EVT_CAPSLOCK) {
if (evt->modifiers & EVT_SHIFTKEY) {
if ((ascii = translateScan(scan,EVT.codePage->shiftCaps,EVT.codePage->shiftCapsLen)) != 0) {
evt->message |= ascii;
return;
}
}
else {
if ((ascii = translateScan(scan,EVT.codePage->caps,EVT.codePage->capsLen)) != 0) {
evt->message |= ascii;
return;
}
}
}
if (evt->modifiers & EVT_SHIFTKEY) {
if ((ascii = translateScan(scan,EVT.codePage->shiftCaps,EVT.codePage->shiftCapsLen)) != 0) {
evt->message |= ascii;
return;
}
}
else {
if ((ascii = translateScan(scan,EVT.codePage->caps,EVT.codePage->capsLen)) != 0) {
evt->message |= ascii;
return;
}
}
}
if (evt->modifiers & EVT_SHIFTKEY) {
if ((ascii = translateScan(scan,EVT.codePage->shift,EVT.codePage->shiftLen)) != 0) {
evt->message |= ascii;
return;
}
}
if ((ascii = translateScan(scan,EVT.codePage->shift,EVT.codePage->shiftLen)) != 0) {
evt->message |= ascii;
return;
}
}
evt->message |= translateScan(scan,EVT.codePage->normal,EVT.codePage->normalLen);
}
@ -124,9 +124,9 @@ static ibool _EVT_isKeyDown(
uchar scanCode)
{
if (scanCode > 0x7F)
return false;
return false;
else
return EVT.keyTable[scanCode] != 0;
return EVT.keyTable[scanCode] != 0;
}
/****************************************************************************
@ -139,7 +139,7 @@ Adds a new keyboard event to the event queue. This routine is called from
within the keyboard interrupt subroutine!
NOTE: Interrupts are OFF when this routine is called by the keyboard ISR,
and we leave them OFF the entire time.
and we leave them OFF the entire time.
****************************************************************************/
static void addKeyEvent(
uint what,
@ -148,31 +148,31 @@ static void addKeyEvent(
event_t evt;
if (EVT.count < EVENTQSIZE) {
/* Save information in event record */
evt.when = _EVT_getTicks();
evt.what = what;
evt.message = message | 0x10000UL;
evt.where_x = 0;
evt.where_y = 0;
evt.relative_x = 0;
evt.relative_y = 0;
evt.modifiers = EVT.keyModifiers;
if (evt.what == EVT_KEYREPEAT) {
if (EVT.oldKey != -1)
EVT.evtq[EVT.oldKey].message += 0x10000UL;
else {
EVT.oldKey = EVT.freeHead;
addEvent(&evt); /* Add to tail of event queue */
}
}
else {
/* Save information in event record */
evt.when = _EVT_getTicks();
evt.what = what;
evt.message = message | 0x10000UL;
evt.where_x = 0;
evt.where_y = 0;
evt.relative_x = 0;
evt.relative_y = 0;
evt.modifiers = EVT.keyModifiers;
if (evt.what == EVT_KEYREPEAT) {
if (EVT.oldKey != -1)
EVT.evtq[EVT.oldKey].message += 0x10000UL;
else {
EVT.oldKey = EVT.freeHead;
addEvent(&evt); /* Add to tail of event queue */
}
}
else {
#ifdef __QNX__
_EVT_maskKeyCode(&evt);
_EVT_maskKeyCode(&evt);
#endif
addEvent(&evt); /* Add to tail of event queue */
}
EVT.oldMove = -1;
}
addEvent(&evt); /* Add to tail of event queue */
}
EVT.oldMove = -1;
}
}
/****************************************************************************
@ -184,7 +184,7 @@ static int kbWaitForWriteReady(void)
{
int timeout = 8192;
while ((timeout > 0) && (PM_inpb(0x64) & 0x02))
timeout--;
timeout--;
return (timeout > 0);
}
@ -197,7 +197,7 @@ static int kbWaitForReadReady(void)
{
int timeout = 8192;
while ((timeout > 0) && (!(PM_inpb(0x64) & 0x01)))
timeout--;
timeout--;
return (timeout > 0);
}
@ -215,20 +215,20 @@ static int kbSendData(
int timeout, temp;
do {
if (!kbWaitForWriteReady())
return 0;
PM_outpb(0x60,data);
timeout = 8192;
while (--timeout > 0) {
if (!kbWaitForReadReady())
return 0;
temp = PM_inpb(0x60);
if (temp == 0xFA)
return 1;
if (temp == 0xFE)
break;
}
} while ((resends-- > 0) && (timeout > 0));
if (!kbWaitForWriteReady())
return 0;
PM_outpb(0x60,data);
timeout = 8192;
while (--timeout > 0) {
if (!kbWaitForReadReady())
return 0;
temp = PM_inpb(0x60);
if (temp == 0xFA)
return 1;
if (temp == 0xFE)
break;
}
} while ((resends-- > 0) && (timeout > 0));
return 0;
}
@ -245,10 +245,10 @@ static void setLEDS(
uint modifiers)
{
if (EVT.allowLEDS) {
if (!kbSendData(0xED) || !kbSendData((modifiers>>9) & 7)) {
kbSendData(0xF4);
}
}
if (!kbSendData(0xED) || !kbSendData((modifiers>>9) & 7)) {
kbSendData(0xF4);
}
}
}
/****************************************************************************
@ -256,7 +256,7 @@ REMARKS:
Function to process raw scan codes read from the keyboard controller.
NOTE: Interrupts are OFF when this routine is called by the keyboard ISR,
and we leave them OFF the entire time.
and we leave them OFF the entire time.
{secret}
****************************************************************************/
void processRawScanCode(
@ -267,156 +267,156 @@ void processRawScanCode(
int what;
if (pauseLoop) {
/* Skip scan codes until the pause key sequence has been read */
pauseLoop--;
}
/* Skip scan codes until the pause key sequence has been read */
pauseLoop--;
}
else if (scan == 0xE0) {
/* This signals the start of an extended scan code sequence */
extended = 1;
}
/* This signals the start of an extended scan code sequence */
extended = 1;
}
else if (scan == 0xE1) {
/* The Pause key sends a strange scan code sequence, which is:
*
* E1 1D 52 E1 9D D2
*
* However there is never any release code nor any auto-repeat for
* this key. For this reason we simply ignore the key and skip the
* next 5 scan codes read from the keyboard.
*/
pauseLoop = 5;
}
/* The Pause key sends a strange scan code sequence, which is:
*
* E1 1D 52 E1 9D D2
*
* However there is never any release code nor any auto-repeat for
* this key. For this reason we simply ignore the key and skip the
* next 5 scan codes read from the keyboard.
*/
pauseLoop = 5;
}
else {
/* Process the scan code normally (it may be an extended code
* however!). Bit 7 means key was released, and bits 0-6 are the
* scan code.
*/
what = (scan & 0x80) ? EVT_KEYUP : EVT_KEYDOWN;
scan &= 0x7F;
if (extended) {
extended = 0;
if (scan == 0x2A || scan == 0x36) {
/* Ignore these extended scan code sequences. These are
* used by the keyboard controller to wrap around certain
* key sequences for the keypad (and when NUMLOCK is down
* internally).
*/
return;
}
/* Process the scan code normally (it may be an extended code
* however!). Bit 7 means key was released, and bits 0-6 are the
* scan code.
*/
what = (scan & 0x80) ? EVT_KEYUP : EVT_KEYDOWN;
scan &= 0x7F;
if (extended) {
extended = 0;
if (scan == 0x2A || scan == 0x36) {
/* Ignore these extended scan code sequences. These are
* used by the keyboard controller to wrap around certain
* key sequences for the keypad (and when NUMLOCK is down
* internally).
*/
return;
}
/* Convert extended codes for key sequences that we map to
* virtual scan codes so the user can detect them in their
* code.
*/
switch (scan) {
case KB_leftCtrl: scan = KB_rightCtrl; break;
case KB_leftAlt: scan = KB_rightAlt; break;
case KB_divide: scan = KB_padDivide; break;
case KB_enter: scan = KB_padEnter; break;
case KB_padTimes: scan = KB_sysReq; break;
}
}
else {
/* Convert regular scan codes for key sequences that we map to
* virtual scan codes so the user can detect them in their
* code.
*/
switch (scan) {
case KB_left: scan = KB_padLeft; break;
case KB_right: scan = KB_padRight; break;
case KB_up: scan = KB_padUp; break;
case KB_down: scan = KB_padDown; break;
case KB_insert: scan = KB_padInsert; break;
case KB_delete: scan = KB_padDelete; break;
case KB_home: scan = KB_padHome; break;
case KB_end: scan = KB_padEnd; break;
case KB_pageUp: scan = KB_padPageUp; break;
case KB_pageDown: scan = KB_padPageDown; break;
}
}
/* Convert extended codes for key sequences that we map to
* virtual scan codes so the user can detect them in their
* code.
*/
switch (scan) {
case KB_leftCtrl: scan = KB_rightCtrl; break;
case KB_leftAlt: scan = KB_rightAlt; break;
case KB_divide: scan = KB_padDivide; break;
case KB_enter: scan = KB_padEnter; break;
case KB_padTimes: scan = KB_sysReq; break;
}
}
else {
/* Convert regular scan codes for key sequences that we map to
* virtual scan codes so the user can detect them in their
* code.
*/
switch (scan) {
case KB_left: scan = KB_padLeft; break;
case KB_right: scan = KB_padRight; break;
case KB_up: scan = KB_padUp; break;
case KB_down: scan = KB_padDown; break;
case KB_insert: scan = KB_padInsert; break;
case KB_delete: scan = KB_padDelete; break;
case KB_home: scan = KB_padHome; break;
case KB_end: scan = KB_padEnd; break;
case KB_pageUp: scan = KB_padPageUp; break;
case KB_pageDown: scan = KB_padPageDown; break;
}
}
/* Determine if the key is an UP, DOWN or REPEAT and maintain the
* up/down status of all keys in our global key array.
*/
if (what == EVT_KEYDOWN) {
if (EVT.keyTable[scan])
what = EVT_KEYREPEAT;
else
EVT.keyTable[scan] = scan;
}
else {
EVT.keyTable[scan] = 0;
}
/* Determine if the key is an UP, DOWN or REPEAT and maintain the
* up/down status of all keys in our global key array.
*/
if (what == EVT_KEYDOWN) {
if (EVT.keyTable[scan])
what = EVT_KEYREPEAT;
else
EVT.keyTable[scan] = scan;
}
else {
EVT.keyTable[scan] = 0;
}
/* Handle shift key modifiers */
if (what != EVT_KEYREPEAT) {
switch (scan) {
case KB_capsLock:
if (what == EVT_KEYDOWN)
EVT.keyModifiers ^= EVT_CAPSLOCK;
setLEDS(EVT.keyModifiers);
break;
case KB_numLock:
if (what == EVT_KEYDOWN)
EVT.keyModifiers ^= EVT_NUMLOCK;
setLEDS(EVT.keyModifiers);
break;
case KB_scrollLock:
if (what == EVT_KEYDOWN)
EVT.keyModifiers ^= EVT_SCROLLLOCK;
setLEDS(EVT.keyModifiers);
break;
case KB_leftShift:
if (what == EVT_KEYUP)
EVT.keyModifiers &= ~EVT_LEFTSHIFT;
else
EVT.keyModifiers |= EVT_LEFTSHIFT;
break;
case KB_rightShift:
if (what == EVT_KEYUP)
EVT.keyModifiers &= ~EVT_RIGHTSHIFT;
else
EVT.keyModifiers |= EVT_RIGHTSHIFT;
break;
case KB_leftCtrl:
if (what == EVT_KEYUP)
EVT.keyModifiers &= ~EVT_LEFTCTRL;
else
EVT.keyModifiers |= EVT_LEFTCTRL;
break;
case KB_rightCtrl:
if (what == EVT_KEYUP)
EVT.keyModifiers &= ~EVT_RIGHTCTRL;
else
EVT.keyModifiers |= EVT_RIGHTCTRL;
break;
case KB_leftAlt:
if (what == EVT_KEYUP)
EVT.keyModifiers &= ~EVT_LEFTALT;
else
EVT.keyModifiers |= EVT_LEFTALT;
break;
case KB_rightAlt:
if (what == EVT_KEYUP)
EVT.keyModifiers &= ~EVT_RIGHTALT;
else
EVT.keyModifiers |= EVT_RIGHTALT;
break;
/* Handle shift key modifiers */
if (what != EVT_KEYREPEAT) {
switch (scan) {
case KB_capsLock:
if (what == EVT_KEYDOWN)
EVT.keyModifiers ^= EVT_CAPSLOCK;
setLEDS(EVT.keyModifiers);
break;
case KB_numLock:
if (what == EVT_KEYDOWN)
EVT.keyModifiers ^= EVT_NUMLOCK;
setLEDS(EVT.keyModifiers);
break;
case KB_scrollLock:
if (what == EVT_KEYDOWN)
EVT.keyModifiers ^= EVT_SCROLLLOCK;
setLEDS(EVT.keyModifiers);
break;
case KB_leftShift:
if (what == EVT_KEYUP)
EVT.keyModifiers &= ~EVT_LEFTSHIFT;
else
EVT.keyModifiers |= EVT_LEFTSHIFT;
break;
case KB_rightShift:
if (what == EVT_KEYUP)
EVT.keyModifiers &= ~EVT_RIGHTSHIFT;
else
EVT.keyModifiers |= EVT_RIGHTSHIFT;
break;
case KB_leftCtrl:
if (what == EVT_KEYUP)
EVT.keyModifiers &= ~EVT_LEFTCTRL;
else
EVT.keyModifiers |= EVT_LEFTCTRL;
break;
case KB_rightCtrl:
if (what == EVT_KEYUP)
EVT.keyModifiers &= ~EVT_RIGHTCTRL;
else
EVT.keyModifiers |= EVT_RIGHTCTRL;
break;
case KB_leftAlt:
if (what == EVT_KEYUP)
EVT.keyModifiers &= ~EVT_LEFTALT;
else
EVT.keyModifiers |= EVT_LEFTALT;
break;
case KB_rightAlt:
if (what == EVT_KEYUP)
EVT.keyModifiers &= ~EVT_RIGHTALT;
else
EVT.keyModifiers |= EVT_RIGHTALT;
break;
#ifdef SUPPORT_CTRL_ALT_DEL
case KB_delete:
if ((EVT.keyModifiers & EVT_CTRLSTATE) && (EVT.keyModifiers & EVT_ALTSTATE))
Reboot();
break;
case KB_delete:
if ((EVT.keyModifiers & EVT_CTRLSTATE) && (EVT.keyModifiers & EVT_ALTSTATE))
Reboot();
break;
#endif
}
}
}
}
/* Add the untranslated key code to the event queue. All
* translation to ASCII from the key codes occurs when the key
* is extracted from the queue, saving time in the low level
* interrupt handler.
*/
addKeyEvent(what,scan << 8);
}
/* Add the untranslated key code to the event queue. All
* translation to ASCII from the key codes occurs when the key
* is extracted from the queue, saving time in the low level
* interrupt handler.
*/
addKeyEvent(what,scan << 8);
}
}
/****************************************************************************
@ -442,9 +442,8 @@ void EVTAPI EVT_allowLEDS(
{
EVT.allowLEDS = true;
if (enable)
setLEDS(EVT.keyModifiers);
setLEDS(EVT.keyModifiers);
else
setLEDS(0);
setLEDS(0);
EVT.allowLEDS = enable;
}

600
board/MAI/bios_emulator/scitech/src/pm/common/mtrr.c
View file

@ -106,26 +106,26 @@ static int MTRR_haveWriteCombine(void)
ulong config,dummy;
switch (cpuFamily) {
case CPU_AMD:
if (cpuType < CPU_AMDAthlon) {
/* AMD K6-2 stepping 8 and later support the MTRR registers.
* The earlier K6-2 steppings (300Mhz models) do not
* support MTRR's.
*/
if ((cpuType < CPU_AMDK6_2) || (cpuType == CPU_AMDK6_2 && cpuStepping < 8))
return 0;
return 1;
}
/* Fall through for AMD Athlon which uses P6 style MTRR's */
case CPU_Intel:
_MTRR_readMSR(INTEL_cap_MSR,&config,&dummy);
return (config & (1 << 10));
case CPU_Cyrix:
/* Cyrix 6x86 and later support the MTRR registers */
if (cpuType < CPU_Cyrix6x86)
return 0;
return 1;
}
case CPU_AMD:
if (cpuType < CPU_AMDAthlon) {
/* AMD K6-2 stepping 8 and later support the MTRR registers.
* The earlier K6-2 steppings (300Mhz models) do not
* support MTRR's.
*/
if ((cpuType < CPU_AMDK6_2) || (cpuType == CPU_AMDK6_2 && cpuStepping < 8))
return 0;
return 1;
}
/* Fall through for AMD Athlon which uses P6 style MTRR's */
case CPU_Intel:
_MTRR_readMSR(INTEL_cap_MSR,&config,&dummy);
return (config & (1 << 10));
case CPU_Cyrix:
/* Cyrix 6x86 and later support the MTRR registers */
if (cpuType < CPU_Cyrix6x86)
return 0;
return 1;
}
return 0;
}
@ -149,10 +149,10 @@ static int GENERIC_getFreeRegion(
ulong lbase,lsize;
for (i = 0; i < numMTRR; i++) {
getMTRR(i,&lbase,&lsize,&ltype);
if (lsize < 1)
return i;
}
getMTRR(i,&lbase,&lsize,&ltype);
if (lsize < 1)
return i;
}
(void)base;
(void)size;
return -1;
@ -178,10 +178,10 @@ static int AMDK6_getFreeRegion(
ulong lbase,lsize;
for (i = 0; i < numMTRR; i++) {
getMTRR(i,&lbase,&lsize,&ltype);
if (lsize < 1)
return i;
}
getMTRR(i,&lbase,&lsize,&ltype);
if (lsize < 1)
return i;
}
(void)base;
(void)size;
return -1;
@ -207,23 +207,23 @@ static int CYRIX_getFreeRegion(
ulong lbase, lsize;
if (size > 0x2000000UL) {
/* If we are to set up a region >32M then look at ARR7 immediately */
getMTRR(7,&lbase,&lsize,&ltype);
if (lsize < 1)
return 7;
}
/* If we are to set up a region >32M then look at ARR7 immediately */
getMTRR(7,&lbase,&lsize,&ltype);
if (lsize < 1)
return 7;
}
else {
/* Check ARR0-6 registers */
for (i = 0; i < 7; i++) {
getMTRR(i,&lbase,&lsize,&ltype);
if (lsize < 1)
return i;
}
/* Try ARR7 but its size must be at least 256K */
getMTRR(7,&lbase,&lsize,&ltype);
if ((lsize < 1) && (size >= 0x40000))
return i;
}
/* Check ARR0-6 registers */
for (i = 0; i < 7; i++) {
getMTRR(i,&lbase,&lsize,&ltype);
if (lsize < 1)
return i;
}
/* Try ARR7 but its size must be at least 256K */
getMTRR(7,&lbase,&lsize,&ltype);
if ((lsize < 1) && (size >= 0x40000))
return i;
}
(void)base;
return -1;
}
@ -240,20 +240,20 @@ static void MTRR_beginUpdate(
{
c->flags = _MTRR_disableInt();
if (cpuFamily != CPU_AMD || (cpuFamily == CPU_AMD && cpuType >= CPU_AMDAthlon)) {
switch (cpuFamily) {
case CPU_Intel:
case CPU_AMD:
/* Disable MTRRs, and set the default type to uncached */
c->cr4Val = _MTRR_saveCR4();
_MTRR_readMSR(INTEL_defType_MSR,&c->defTypeLo,&c->defTypeHi);
_MTRR_writeMSR(INTEL_defType_MSR,c->defTypeLo & 0xF300UL,c->defTypeHi);
break;
case CPU_Cyrix:
c->ccr3 = _MTRR_getCx86(CX86_CCR3);
_MTRR_setCx86(CX86_CCR3, (uchar)((c->ccr3 & 0x0F) | 0x10));
break;
}
}
switch (cpuFamily) {
case CPU_Intel:
case CPU_AMD:
/* Disable MTRRs, and set the default type to uncached */
c->cr4Val = _MTRR_saveCR4();
_MTRR_readMSR(INTEL_defType_MSR,&c->defTypeLo,&c->defTypeHi);
_MTRR_writeMSR(INTEL_defType_MSR,c->defTypeLo & 0xF300UL,c->defTypeHi);
break;
case CPU_Cyrix:
c->ccr3 = _MTRR_getCx86(CX86_CCR3);
_MTRR_setCx86(CX86_CCR3, (uchar)((c->ccr3 & 0x0F) | 0x10));
break;
}
}
}
/****************************************************************************
@ -267,18 +267,18 @@ static void MTRR_endUpdate(
MTRRContext *c)
{
if (cpuFamily != CPU_AMD || (cpuFamily == CPU_AMD && cpuType >= CPU_AMDAthlon)) {
PM_flushTLB();
switch (cpuFamily) {
case CPU_Intel:
case CPU_AMD:
_MTRR_writeMSR(INTEL_defType_MSR,c->defTypeLo,c->defTypeHi);
_MTRR_restoreCR4(c->cr4Val);
break;
case CPU_Cyrix:
_MTRR_setCx86(CX86_CCR3,(uchar)c->ccr3);
break;
}
}
PM_flushTLB();
switch (cpuFamily) {
case CPU_Intel:
case CPU_AMD:
_MTRR_writeMSR(INTEL_defType_MSR,c->defTypeLo,c->defTypeHi);
_MTRR_restoreCR4(c->cr4Val);
break;
case CPU_Cyrix:
_MTRR_setCx86(CX86_CCR3,(uchar)c->ccr3);
break;
}
}
/* Re-enable interrupts (if enabled previously) */
_MTRR_restoreInt(c->flags);
@ -304,12 +304,12 @@ static void INTEL_getMTRR(
_MTRR_readMSR(INTEL_physMask_MSR(reg),&maskLo,&hi);
if ((maskLo & 0x800) == 0) {
/* MTRR is disabled, so it is free */
*base = 0;
*size = 0;
*type = 0;
return;
}
/* MTRR is disabled, so it is free */
*base = 0;
*size = 0;
*type = 0;
return;
}
_MTRR_readMSR(INTEL_physBase_MSR(reg),&baseLo,&hi);
maskLo = (maskLo & 0xFFFFF000UL);
*size = ~(maskLo - 1);
@ -338,15 +338,15 @@ static void INTEL_setMTRR(
MTRR_beginUpdate(&c);
if (size == 0) {
/* The invalid bit is kept in the mask, so we simply clear the
* relevant mask register to disable a range.
*/
_MTRR_writeMSR(INTEL_physMask_MSR(reg),0,0);
}
/* The invalid bit is kept in the mask, so we simply clear the
* relevant mask register to disable a range.
*/
_MTRR_writeMSR(INTEL_physMask_MSR(reg),0,0);
}
else {
_MTRR_writeMSR(INTEL_physBase_MSR(reg),base | type,0);
_MTRR_writeMSR(INTEL_physMask_MSR(reg),~(size - 1) | 0x800,0);
}
_MTRR_writeMSR(INTEL_physBase_MSR(reg),base | type,0);
_MTRR_writeMSR(INTEL_physMask_MSR(reg),~(size - 1) | 0x800,0);
}
MTRR_endUpdate(&c);
}
@ -386,19 +386,19 @@ static void AMD_getMTRR(
/* Upper dword is region 1, lower is region 0 */
_MTRR_readMSR(0xC0000085, &low, &high);
if (reg == 1)
low = high;
low = high;
/* Find the base and type for the region */
*base = low & 0xFFFE0000;
*type = 0;
if (low & 1)
*type = PM_MTRR_UNCACHABLE;
*type = PM_MTRR_UNCACHABLE;
if (low & 2)
*type = PM_MTRR_WRCOMB;
*type = PM_MTRR_WRCOMB;
if ((low & 3) == 0) {
*size = 0;
return;
}
*size = 0;
return;
}
/* This needs a little explaining. The size is stored as an
* inverted mask of bits of 128K granularity 15 bits long offset
@ -441,26 +441,26 @@ static void AMD_setMTRR(
MTRR_beginUpdate(&c);
_MTRR_readMSR(0xC0000085, &low, &high);
if (size == 0) {
/* Clear register to disable */
if (reg)
high = 0;
else
low = 0;
}
/* Clear register to disable */
if (reg)
high = 0;
else
low = 0;
}
else {
/* Set the register to the base (already shifted for us), the
* type (off by one) and an inverted bitmask of the size
* The size is the only odd bit. We are fed say 512K
* We invert this and we get 111 1111 1111 1011 but
* if you subtract one and invert you get the desired
* 111 1111 1111 1100 mask
*/
newVal = (((~(size-1)) >> 15) & 0x0001FFFC) | base | (type+1);
if (reg)
high = newVal;
else
low = newVal;
}
/* Set the register to the base (already shifted for us), the
* type (off by one) and an inverted bitmask of the size
* The size is the only odd bit. We are fed say 512K
* We invert this and we get 111 1111 1111 1011 but
* if you subtract one and invert you get the desired
* 111 1111 1111 1100 mask
*/
newVal = (((~(size-1)) >> 15) & 0x0001FFFC) | base | (type+1);
if (reg)
high = newVal;
else
low = newVal;
}
/* The writeback rule is quite specific. See the manual. Its
* disable local interrupts, write back the cache, set the MTRR
@ -507,29 +507,29 @@ static void CYRIX_getMTRR(
* Note: shift==0xF means 4G, this is unsupported.
*/
if (shift)
*size = (reg < 7 ? 0x800UL : 0x20000UL) << shift;
*size = (reg < 7 ? 0x800UL : 0x20000UL) << shift;
else
*size = 0;
*size = 0;
/* Bit 0 is Cache Enable on ARR7, Cache Disable on ARR0-ARR6 */
if (reg < 7) {
switch (rcr) {
case 1: *type = PM_MTRR_UNCACHABLE; break;
case 8: *type = PM_MTRR_WRBACK; break;
case 9: *type = PM_MTRR_WRCOMB; break;
case 24:
default: *type = PM_MTRR_WRTHROUGH; break;
}
}
switch (rcr) {
case 1: *type = PM_MTRR_UNCACHABLE; break;
case 8: *type = PM_MTRR_WRBACK; break;
case 9: *type = PM_MTRR_WRCOMB; break;
case 24:
default: *type = PM_MTRR_WRTHROUGH; break;
}
}
else {
switch (rcr) {
case 0: *type = PM_MTRR_UNCACHABLE; break;
case 8: *type = PM_MTRR_WRCOMB; break;
case 9: *type = PM_MTRR_WRBACK; break;
case 25:
default: *type = PM_MTRR_WRTHROUGH; break;
}
}
switch (rcr) {
case 0: *type = PM_MTRR_UNCACHABLE; break;
case 8: *type = PM_MTRR_WRCOMB; break;
case 9: *type = PM_MTRR_WRBACK; break;
case 25:
default: *type = PM_MTRR_WRTHROUGH; break;
}
}
}
/****************************************************************************
@ -557,23 +557,23 @@ static void CYRIX_setMTRR(
size >>= (reg < 7 ? 12 : 18);
size &= 0x7FFF; /* Make sure arr_size <= 14 */
for (arr_size = 0; size; arr_size++, size >>= 1)
;
;
if (reg < 7) {
switch (type) {
case PM_MTRR_UNCACHABLE: arr_type = 1; break;
case PM_MTRR_WRCOMB: arr_type = 9; break;
case PM_MTRR_WRTHROUGH: arr_type = 24; break;
default: arr_type = 8; break;
}
}
switch (type) {
case PM_MTRR_UNCACHABLE: arr_type = 1; break;
case PM_MTRR_WRCOMB: arr_type = 9; break;
case PM_MTRR_WRTHROUGH: arr_type = 24; break;
default: arr_type = 8; break;
}
}
else {
switch (type) {
case PM_MTRR_UNCACHABLE: arr_type = 0; break;
case PM_MTRR_WRCOMB: arr_type = 8; break;
case PM_MTRR_WRTHROUGH: arr_type = 25; break;
default: arr_type = 9; break;
}
}
switch (type) {
case PM_MTRR_UNCACHABLE: arr_type = 0; break;
case PM_MTRR_WRCOMB: arr_type = 8; break;
case PM_MTRR_WRTHROUGH: arr_type = 25; break;
default: arr_type = 9; break;
}
}
MTRR_beginUpdate(&c);
_MTRR_setCx86((uchar)arr, ((uchar*)&base)[3]);
_MTRR_setCx86((uchar)(arr+1), ((uchar*)&base)[2]);
@ -615,28 +615,28 @@ static void CYRIX_initARR(void)
ccr[5] = _MTRR_getCx86(CX86_CCR5);
ccr[6] = _MTRR_getCx86(CX86_CCR6);
if (ccr[3] & 1)
ccrc[3] = 1;
ccrc[3] = 1;
else {
/* Disable SMM mode (bit 1), access to SMM memory (bit 2) and
* access to SMM memory through ARR3 (bit 7).
*/
if (ccr[6] & 0x02) {
ccr[6] &= 0xFD;
ccrc[6] = 1; /* Disable write protection of ARR3. */
_MTRR_setCx86(CX86_CCR6,ccr[6]);
}
}
/* Disable SMM mode (bit 1), access to SMM memory (bit 2) and
* access to SMM memory through ARR3 (bit 7).
*/
if (ccr[6] & 0x02) {
ccr[6] &= 0xFD;
ccrc[6] = 1; /* Disable write protection of ARR3. */
_MTRR_setCx86(CX86_CCR6,ccr[6]);
}
}
/* If we changed CCR1 in memory, change it in the processor, too. */
if (ccrc[1])
_MTRR_setCx86(CX86_CCR1,ccr[1]);
_MTRR_setCx86(CX86_CCR1,ccr[1]);
/* Enable ARR usage by the processor */
if (!(ccr[5] & 0x20)) {
ccr[5] |= 0x20;
ccrc[5] = 1;
_MTRR_setCx86(CX86_CCR5,ccr[5]);
}
ccr[5] |= 0x20;
ccrc[5] = 1;
_MTRR_setCx86(CX86_CCR5,ccr[5]);
}
/* We are finished updating */
MTRR_endUpdate(&c);
@ -654,72 +654,72 @@ void MTRR_init(void)
/* Check that we have a compatible CPU */
if (numMTRR == -1) {
numMTRR = 0;
if (!_MTRR_isRing0())
return;
cpu = CPU_getProcessorType();
cpuFamily = cpu & CPU_familyMask;
cpuType = cpu & CPU_mask;
cpuStepping = (cpu & CPU_steppingMask) >> CPU_steppingShift;
switch (cpuFamily) {
case CPU_Intel:
/* Intel Pentium Pro and later support the MTRR registers */
if (cpuType < CPU_PentiumPro)
return;
_MTRR_readMSR(INTEL_cap_MSR,&eax,&edx);
numMTRR = eax & 0xFF;
getMTRR = INTEL_getMTRR;
setMTRR = INTEL_setMTRR;
getFreeRegion = GENERIC_getFreeRegion;
INTEL_disableBankedWriteCombine();
break;
case CPU_AMD:
/* AMD K6-2 and later support the MTRR registers */
if ((cpuType < CPU_AMDK6_2) || (cpuType == CPU_AMDK6_2 && cpuStepping < 8))
return;
if (cpuType < CPU_AMDAthlon) {
numMTRR = 2; /* AMD CPU's have 2 MTRR's */
getMTRR = AMD_getMTRR;
setMTRR = AMD_setMTRR;
getFreeRegion = AMDK6_getFreeRegion;
numMTRR = 0;
if (!_MTRR_isRing0())
return;
cpu = CPU_getProcessorType();
cpuFamily = cpu & CPU_familyMask;
cpuType = cpu & CPU_mask;
cpuStepping = (cpu & CPU_steppingMask) >> CPU_steppingShift;
switch (cpuFamily) {
case CPU_Intel:
/* Intel Pentium Pro and later support the MTRR registers */
if (cpuType < CPU_PentiumPro)
return;
_MTRR_readMSR(INTEL_cap_MSR,&eax,&edx);
numMTRR = eax & 0xFF;
getMTRR = INTEL_getMTRR;
setMTRR = INTEL_setMTRR;
getFreeRegion = GENERIC_getFreeRegion;
INTEL_disableBankedWriteCombine();
break;
case CPU_AMD:
/* AMD K6-2 and later support the MTRR registers */
if ((cpuType < CPU_AMDK6_2) || (cpuType == CPU_AMDK6_2 && cpuStepping < 8))
return;
if (cpuType < CPU_AMDAthlon) {
numMTRR = 2; /* AMD CPU's have 2 MTRR's */
getMTRR = AMD_getMTRR;
setMTRR = AMD_setMTRR;
getFreeRegion = AMDK6_getFreeRegion;
/* For some reason some IBM systems with K6-2 processors
* have write combined enabled for the system BIOS
* region from 0xE0000 to 0xFFFFFF. We need *both* MTRR's
* for our own graphics drivers, so if we detect any
* regions below the 1Meg boundary, we remove them
* so we can use this MTRR register ourselves.
*/
for (i = 0; i < numMTRR; i++) {
getMTRR(i,&lbase,&lsize,&ltype);
if (lbase < 0x100000)
setMTRR(i,0,0,0);
}
}
else {
/* AMD Athlon uses P6 style MTRR's */
_MTRR_readMSR(INTEL_cap_MSR,&eax,&edx);
numMTRR = eax & 0xFF;
getMTRR = INTEL_getMTRR;
setMTRR = INTEL_setMTRR;
getFreeRegion = GENERIC_getFreeRegion;
INTEL_disableBankedWriteCombine();
}
break;
case CPU_Cyrix:
/* Cyrix 6x86 and later support the MTRR registers */
if (cpuType < CPU_Cyrix6x86 || cpuType >= CPU_CyrixMediaGX)
return;
numMTRR = 8; /* Cyrix CPU's have 8 ARR's */
getMTRR = CYRIX_getMTRR;
setMTRR = CYRIX_setMTRR;
getFreeRegion = CYRIX_getFreeRegion;
CYRIX_initARR();
break;
default:
return;
}
}
/* For some reason some IBM systems with K6-2 processors
* have write combined enabled for the system BIOS
* region from 0xE0000 to 0xFFFFFF. We need *both* MTRR's
* for our own graphics drivers, so if we detect any
* regions below the 1Meg boundary, we remove them
* so we can use this MTRR register ourselves.
*/
for (i = 0; i < numMTRR; i++) {
getMTRR(i,&lbase,&lsize,&ltype);
if (lbase < 0x100000)
setMTRR(i,0,0,0);
}
}
else {
/* AMD Athlon uses P6 style MTRR's */
_MTRR_readMSR(INTEL_cap_MSR,&eax,&edx);
numMTRR = eax & 0xFF;
getMTRR = INTEL_getMTRR;
setMTRR = INTEL_setMTRR;
getFreeRegion = GENERIC_getFreeRegion;
INTEL_disableBankedWriteCombine();
}
break;
case CPU_Cyrix:
/* Cyrix 6x86 and later support the MTRR registers */
if (cpuType < CPU_Cyrix6x86 || cpuType >= CPU_CyrixMediaGX)
return;
numMTRR = 8; /* Cyrix CPU's have 8 ARR's */
getMTRR = CYRIX_getMTRR;
setMTRR = CYRIX_setMTRR;
getFreeRegion = CYRIX_getFreeRegion;
CYRIX_initARR();
break;
default:
return;
}
}
}
/****************************************************************************
@ -745,93 +745,93 @@ int MTRR_enableWriteCombine(
/* Check that we have a CPU that supports MTRR's and type is valid */
if (numMTRR <= 0) {
if (!_MTRR_isRing0())
return PM_MTRR_ERR_NO_OS_SUPPORT;
return PM_MTRR_NOT_SUPPORTED;
}
if (!_MTRR_isRing0())
return PM_MTRR_ERR_NO_OS_SUPPORT;
return PM_MTRR_NOT_SUPPORTED;
}
if (type >= PM_MTRR_MAX)
return PM_MTRR_ERR_PARAMS;
return PM_MTRR_ERR_PARAMS;
/* If the type is WC, check that this processor supports it */
if (!MTRR_haveWriteCombine())
return PM_MTRR_ERR_NOWRCOMB;
return PM_MTRR_ERR_NOWRCOMB;
/* Adjust the boundaries depending on the CPU type */
switch (cpuFamily) {
case CPU_AMD:
if (cpuType < CPU_AMDAthlon) {
/* Apply the K6 block alignment and size rules. In order:
* o Uncached or gathering only
* o 128K or bigger block
* o Power of 2 block
* o base suitably aligned to the power
*/
if (type > PM_MTRR_WRCOMB && (size < (1 << 17) || (size & ~(size-1))-size || (base & (size-1))))
return PM_MTRR_ERR_NOT_ALIGNED;
break;
}
/* Fall through for AMD Athlon which uses P6 style MTRR's */
case CPU_Intel:
case CPU_Cyrix:
if ((base & 0xFFF) || (size & 0xFFF)) {
/* Base and size must be multiples of 4Kb */
return PM_MTRR_ERR_NOT_4KB_ALIGNED;
}
if (base < 0x100000) {
/* Base must be >= 1Mb */
return PM_MTRR_ERR_BELOW_1MB;
}
case CPU_AMD:
if (cpuType < CPU_AMDAthlon) {
/* Apply the K6 block alignment and size rules. In order:
* o Uncached or gathering only
* o 128K or bigger block
* o Power of 2 block
* o base suitably aligned to the power
*/
if (type > PM_MTRR_WRCOMB && (size < (1 << 17) || (size & ~(size-1))-size || (base & (size-1))))
return PM_MTRR_ERR_NOT_ALIGNED;
break;
}
/* Fall through for AMD Athlon which uses P6 style MTRR's */
case CPU_Intel:
case CPU_Cyrix:
if ((base & 0xFFF) || (size & 0xFFF)) {
/* Base and size must be multiples of 4Kb */
return PM_MTRR_ERR_NOT_4KB_ALIGNED;
}
if (base < 0x100000) {
/* Base must be >= 1Mb */
return PM_MTRR_ERR_BELOW_1MB;
}
/* Check upper bits of base and last are equal and lower bits
* are 0 for base and 1 for last
*/
last = base + size - 1;
for (lbase = base; !(lbase & 1) && (last & 1); lbase = lbase >> 1, last = last >> 1)
;
if (lbase != last) {
/* Base is not aligned on the correct boundary */
return PM_MTRR_ERR_NOT_ALIGNED;
}
break;
default:
return PM_MTRR_NOT_SUPPORTED;
}
/* Check upper bits of base and last are equal and lower bits
* are 0 for base and 1 for last
*/
last = base + size - 1;
for (lbase = base; !(lbase & 1) && (last & 1); lbase = lbase >> 1, last = last >> 1)
;
if (lbase != last) {
/* Base is not aligned on the correct boundary */
return PM_MTRR_ERR_NOT_ALIGNED;
}
break;
default:
return PM_MTRR_NOT_SUPPORTED;
}
/* Search for existing MTRR */
for (i = 0; i < numMTRR; ++i) {
getMTRR(i,&lbase,&lsize,&ltype);
if (lbase == 0 && lsize == 0)
continue;
if (base > lbase + (lsize-1))
continue;
if ((base < lbase) && (base+size-1 < lbase))
continue;
getMTRR(i,&lbase,&lsize,&ltype);
if (lbase == 0 && lsize == 0)
continue;
if (base > lbase + (lsize-1))
continue;
if ((base < lbase) && (base+size-1 < lbase))
continue;
/* Check that we don't overlap an existing region */
if (type != PM_MTRR_UNCACHABLE) {
if ((base < lbase) || (base+size-1 > lbase+lsize-1))
return PM_MTRR_ERR_OVERLAP;
}
else if (base == lbase && size == lsize) {
/* The region already exists so leave it alone */
return PM_MTRR_ERR_OK;
}
/* Check that we don't overlap an existing region */
if (type != PM_MTRR_UNCACHABLE) {
if ((base < lbase) || (base+size-1 > lbase+lsize-1))
return PM_MTRR_ERR_OVERLAP;
}
else if (base == lbase && size == lsize) {
/* The region already exists so leave it alone */
return PM_MTRR_ERR_OK;
}
/* New region is enclosed by an existing region, so only allow
* a new type to be created if we are setting a region to be
* uncacheable (such as MMIO registers within a framebuffer).
*/
if (ltype != (int)type) {
if (type == PM_MTRR_UNCACHABLE)
continue;
return PM_MTRR_ERR_TYPE_MISMATCH;
}
return PM_MTRR_ERR_OK;
}
/* New region is enclosed by an existing region, so only allow
* a new type to be created if we are setting a region to be
* uncacheable (such as MMIO registers within a framebuffer).
*/
if (ltype != (int)type) {
if (type == PM_MTRR_UNCACHABLE)
continue;
return PM_MTRR_ERR_TYPE_MISMATCH;
}
return PM_MTRR_ERR_OK;
}
/* Search for an empty MTRR */
if ((i = getFreeRegion(base,size)) < 0)
return PM_MTRR_ERR_NONE_FREE;
return PM_MTRR_ERR_NONE_FREE;
setMTRR(i,base,size,type);
return PM_MTRR_ERR_OK;
}
@ -852,16 +852,16 @@ int PMAPI PM_enumWriteCombine(
/* Check that we have a CPU that supports MTRR's and type is valid */
if (numMTRR <= 0) {
if (!_MTRR_isRing0())
return PM_MTRR_ERR_NO_OS_SUPPORT;
return PM_MTRR_NOT_SUPPORTED;
}
if (!_MTRR_isRing0())
return PM_MTRR_ERR_NO_OS_SUPPORT;
return PM_MTRR_NOT_SUPPORTED;
}
/* Enumerate all existing MTRR's */
for (i = 0; i < numMTRR; ++i) {
getMTRR(i,&lbase,&lsize,&ltype);
callback(lbase,lsize,ltype);
}
getMTRR(i,&lbase,&lsize,&ltype);
callback(lbase,lsize,ltype);
}
return PM_MTRR_ERR_OK;
}
#endif

466
board/MAI/bios_emulator/scitech/src/pm/common/pcilib.c
View file

@ -67,13 +67,13 @@
typedef union {
struct {
ulong signature; /* _32_ */
ulong entry; /* 32 bit physical address */
uchar revision; /* Revision level, 0 */
uchar length; /* Length in paragraphs should be 01 */
uchar checksum; /* All bytes must add up to zero */
uchar reserved[5]; /* Must be zero */
} fields;
ulong signature; /* _32_ */
ulong entry; /* 32 bit physical address */
uchar revision; /* Revision level, 0 */
uchar length; /* Length in paragraphs should be 01 */
uchar checksum; /* All bytes must add up to zero */
uchar reserved[5]; /* Must be zero */
} fields;
char chars[16];
} PCI_bios32;
@ -143,54 +143,54 @@ static int PCIBIOS_detect(
/* Bail if we have already detected no BIOS is present */
if (PCIBIOSVersion == 0)
return 0;
return 0;
/* First scan the memory from 0xE0000 to 0xFFFFF looking for the
* BIOS32 service directory, so we can determine if we can call it
* from 32-bit protected mode.
*/
if (PCIBIOSVersion == -1) {
PCIBIOSVersion = 0;
BIOSImage = PM_mapPhysicalAddr(0xE0000,BIOS_LIMIT,false);
if (!BIOSImage)
return 0;
BIOSEnd = BIOSImage + 0x20000;
for (BIOSDir = (PCI_bios32*)BIOSImage; BIOSDir < (PCI_bios32*)BIOSEnd; BIOSDir++) {
uchar sum;
int i,length;
PCIBIOSVersion = 0;
BIOSImage = PM_mapPhysicalAddr(0xE0000,BIOS_LIMIT,false);
if (!BIOSImage)
return 0;
BIOSEnd = BIOSImage + 0x20000;
for (BIOSDir = (PCI_bios32*)BIOSImage; BIOSDir < (PCI_bios32*)BIOSEnd; BIOSDir++) {
uchar sum;
int i,length;
if (BIOSDir->fields.signature != BIOS32_SIGNATURE)
continue;
length = BIOSDir->fields.length * 16;
if (!length)
continue;
for (sum = i = 0; i < length ; i++)
sum += BIOSDir->chars[i];
if (sum != 0)
continue;
BIOSEntry.address = (ulong)BIOSImage + (BIOSDir->fields.entry - 0xE0000);
BIOSEntry.segment = _PCI_getCS();
break;
}
if (BIOSDir->fields.signature != BIOS32_SIGNATURE)
continue;
length = BIOSDir->fields.length * 16;
if (!length)
continue;
for (sum = i = 0; i < length ; i++)
sum += BIOSDir->chars[i];
if (sum != 0)
continue;
BIOSEntry.address = (ulong)BIOSImage + (BIOSDir->fields.entry - 0xE0000);
BIOSEntry.segment = _PCI_getCS();
break;
}
/* If we found the BIOS32 directory, call it to get the address of the
* PCI services.
*/
if (BIOSEntry.address == 0)
return 0;
if (_BIOS32_service(PCI_SERVICE,0,&physBase,&length,&offset,BIOSEntry) != 0)
return 0;
PCIPhysEntry = physBase + offset;
PCIEntry.address = (ulong)BIOSImage + (PCIPhysEntry - 0xE0000);
PCIEntry.segment = _PCI_getCS();
}
/* If we found the BIOS32 directory, call it to get the address of the
* PCI services.
*/
if (BIOSEntry.address == 0)
return 0;
if (_BIOS32_service(PCI_SERVICE,0,&physBase,&length,&offset,BIOSEntry) != 0)
return 0;
PCIPhysEntry = physBase + offset;
PCIEntry.address = (ulong)BIOSImage + (PCIPhysEntry - 0xE0000);
PCIEntry.segment = _PCI_getCS();
}
#endif
/* We found the BIOS entry, so now do the version check */
version = _PCIBIOS_isPresent(PCI_BIOS_PRESENT,&signature,&stat,lastBus,PCIEntry);
if (version > 0 && ((stat >> 8) == 0) && signature == PCI_SIGNATURE) {
*hwType = stat & 0xFF;
return PCIBIOSVersion = version;
}
*hwType = stat & 0xFF;
return PCIBIOSVersion = version;
}
return 0;
}
@ -215,16 +215,16 @@ static ibool CheckDuplicate(
{
/* Ignore devices with a vendor ID of 0 */
if (info->VendorID == 0)
return true;
return true;
/* NOTE: We only check against the current device on
* the bus to ensure that we do not exclude
* multiple controllers of the same device ID.
*/
if (info->slot.p.Bus == prev->slot.p.Bus &&
info->slot.p.Device == prev->slot.p.Device &&
info->DeviceID == prev->DeviceID)
return true;
info->slot.p.Device == prev->slot.p.Device &&
info->DeviceID == prev->DeviceID)
return true;
return false;
}
@ -253,41 +253,41 @@ static int PCI_enumerateMech1(
tmp = PM_inpd(0xCF8);
PM_outpd(0xCF8,slot.i);
if ((PM_inpd(0xCF8) == slot.i) && (PM_inpd(0xCFC) != 0xFFFFFFFFUL)) {
/* PCI access mechanism 1 - the preferred mechanism */
for (bus = 0; bus < 8; bus++) {
slot.p.Bus = bus;
for (device = 0; device < 32; device++) {
slot.p.Device = device;
for (function = 0; function < 8; function++) {
slot.p.Function = function;
slot.p.Register = 0;
PM_outpd(0xCF8,slot.i);
if (PM_inpd(0xCFC) != 0xFFFFFFFFUL) {
memset(&pci,0,sizeof(pci));
pci.dwSize = sizeof(pci);
pci.mech1 = 1;
pci.slot = slot;
lp = (ulong*)&(pci.VendorID);
for (i = 0; i < NUM_PCI_REG; i++, lp++) {
slot.p.Register = i;
PM_outpd(0xCF8,slot.i);
*lp = PM_inpd(0xCFC);
}
if (!CheckDuplicate(&pci,&prev)) {
if (info)
COPY_STRUCTURE(&info[numFound],&pci);
++numFound;
}
prev = pci;
}
}
}
}
/* PCI access mechanism 1 - the preferred mechanism */
for (bus = 0; bus < 8; bus++) {
slot.p.Bus = bus;
for (device = 0; device < 32; device++) {
slot.p.Device = device;
for (function = 0; function < 8; function++) {
slot.p.Function = function;
slot.p.Register = 0;
PM_outpd(0xCF8,slot.i);
if (PM_inpd(0xCFC) != 0xFFFFFFFFUL) {
memset(&pci,0,sizeof(pci));
pci.dwSize = sizeof(pci);
pci.mech1 = 1;
pci.slot = slot;
lp = (ulong*)&(pci.VendorID);
for (i = 0; i < NUM_PCI_REG; i++, lp++) {
slot.p.Register = i;
PM_outpd(0xCF8,slot.i);
*lp = PM_inpd(0xCFC);
}
if (!CheckDuplicate(&pci,&prev)) {
if (info)
COPY_STRUCTURE(&info[numFound],&pci);
++numFound;
}
prev = pci;
}
}
}
}
/* Disable PCI config cycle on exit */
PM_outpd(0xCF8,0);
return numFound;
}
/* Disable PCI config cycle on exit */
PM_outpd(0xCF8,0);
return numFound;
}
PM_outpd(0xCF8,tmp);
/* No hardware access mechanism 1 found */
@ -320,42 +320,42 @@ static int PCI_enumerateMech2(
PM_outpb(0xCF8,0x00);
PM_outpb(0xCFA,0x00);
if (PM_inpb(0xCF8) == 0x00 && PM_inpb(0xCFB) == 0x00) {
/* PCI access mechanism 2 - the older mechanism for legacy busses */
for (bus = 0; bus < 2; bus++) {
slot.p.Bus = bus;
PM_outpb(0xCFA,(uchar)bus);
for (device = 0; device < 16; device++) {
slot.p.Device = device;
deviceIO = 0xC000 + (device << 8);
for (function = 0; function < 8; function++) {
slot.p.Function = function;
slot.p.Register = 0;
PM_outpb(0xCF8,(uchar)((function << 1) | 0x10));
if (PM_inpd(deviceIO) != 0xFFFFFFFFUL) {
memset(&pci,0,sizeof(pci));
pci.dwSize = sizeof(pci);
pci.mech1 = 0;
pci.slot = slot;
lp = (ulong*)&(pci.VendorID);
for (i = 0; i < NUM_PCI_REG; i++, lp++) {
slot.p.Register = i;
*lp = PM_inpd(deviceIO + (i << 2));
}
if (!CheckDuplicate(&pci,&prev)) {
if (info)
COPY_STRUCTURE(&info[numFound],&pci);
++numFound;
}
prev = pci;
}
}
}
}
/* PCI access mechanism 2 - the older mechanism for legacy busses */
for (bus = 0; bus < 2; bus++) {
slot.p.Bus = bus;
PM_outpb(0xCFA,(uchar)bus);
for (device = 0; device < 16; device++) {
slot.p.Device = device;
deviceIO = 0xC000 + (device << 8);
for (function = 0; function < 8; function++) {
slot.p.Function = function;
slot.p.Register = 0;
PM_outpb(0xCF8,(uchar)((function << 1) | 0x10));
if (PM_inpd(deviceIO) != 0xFFFFFFFFUL) {
memset(&pci,0,sizeof(pci));
pci.dwSize = sizeof(pci);
pci.mech1 = 0;
pci.slot = slot;
lp = (ulong*)&(pci.VendorID);
for (i = 0; i < NUM_PCI_REG; i++, lp++) {
slot.p.Register = i;
*lp = PM_inpd(deviceIO + (i << 2));
}
if (!CheckDuplicate(&pci,&prev)) {
if (info)
COPY_STRUCTURE(&info[numFound],&pci);
++numFound;
}
prev = pci;
}
}
}
}
/* Disable PCI config cycle on exit */
PM_outpb(0xCF8,0);
return numFound;
}
/* Disable PCI config cycle on exit */
PM_outpb(0xCF8,0);
return numFound;
}
/* No hardware access mechanism 2 found */
return 0;
@ -394,32 +394,32 @@ static int PCI_enumerateBIOS(
PCIDeviceInfo pci,prev = {0};
if (PCIBIOS_detect(&hwType,&lastBus)) {
/* PCI BIOS access - the ultimate fallback */
for (bus = 0; bus <= lastBus; bus++) {
slot.p.Bus = bus;
for (device = 0; device < 32; device++) {
slot.p.Device = device;
for (function = 0; function < 8; function++) {
slot.p.Function = function;
if (PCIBIOS_readDWORD(0,slot.i) != 0xFFFFFFFFUL) {
memset(&pci,0,sizeof(pci));
pci.dwSize = sizeof(pci);
pci.mech1 = 2;
pci.slot = slot;
lp = (ulong*)&(pci.VendorID);
for (i = 0; i < NUM_PCI_REG; i++, lp++)
*lp = PCIBIOS_readDWORD(i << 2,slot.i);
if (!CheckDuplicate(&pci,&prev)) {
if (info)
COPY_STRUCTURE(&info[numFound],&pci);
++numFound;
}
prev = pci;
}
}
}
}
}
/* PCI BIOS access - the ultimate fallback */
for (bus = 0; bus <= lastBus; bus++) {
slot.p.Bus = bus;
for (device = 0; device < 32; device++) {
slot.p.Device = device;
for (function = 0; function < 8; function++) {
slot.p.Function = function;
if (PCIBIOS_readDWORD(0,slot.i) != 0xFFFFFFFFUL) {
memset(&pci,0,sizeof(pci));
pci.dwSize = sizeof(pci);
pci.mech1 = 2;
pci.slot = slot;
lp = (ulong*)&(pci.VendorID);
for (i = 0; i < NUM_PCI_REG; i++, lp++)
*lp = PCIBIOS_readDWORD(i << 2,slot.i);
if (!CheckDuplicate(&pci,&prev)) {
if (info)
COPY_STRUCTURE(&info[numFound],&pci);
++numFound;
}
prev = pci;
}
}
}
}
}
/* Return number of devices found */
return numFound;
@ -447,11 +447,11 @@ int _ASMAPI PCI_enumerate(
* stuff we can't do directly.
*/
if ((numFound = PCI_enumerateMech1(info)) == 0) {
if ((numFound = PCI_enumerateMech2(info)) == 0) {
if ((numFound = PCI_enumerateBIOS(info)) == 0)
return 0;
}
}
if ((numFound = PCI_enumerateMech2(info)) == 0) {
if ((numFound = PCI_enumerateBIOS(info)) == 0)
return 0;
}
}
return numFound;
}
@ -493,22 +493,22 @@ ulong _ASMAPI PCI_findBARSize(
base = PCI_accessReg(bar,0,PCI_READ_DWORD,pci);
if (base && !(base & 0x1)) {
/* For some strange reason some devices don't properly decode
* their base address registers (Intel PCI/PCI bridges!), and
* we read completely bogus values. We check for that here
* and clear out those BAR's.
*
* We check for that here because at least the low 12 bits
* of the address range must be zeros, since the page size
* on IA32 processors is always 4Kb.
*/
if ((base & 0xFFF) == 0) {
PCI_accessReg(bar,0xFFFFFFFF,PCI_WRITE_DWORD,pci);
size = PCI_accessReg(bar,0,PCI_READ_DWORD,pci) & ~0xFF;
size = ~size+1;
PCI_accessReg(bar,base,PCI_WRITE_DWORD,pci);
}
}
/* For some strange reason some devices don't properly decode
* their base address registers (Intel PCI/PCI bridges!), and
* we read completely bogus values. We check for that here
* and clear out those BAR's.
*
* We check for that here because at least the low 12 bits
* of the address range must be zeros, since the page size
* on IA32 processors is always 4Kb.
*/
if ((base & 0xFFF) == 0) {
PCI_accessReg(bar,0xFFFFFFFF,PCI_WRITE_DWORD,pci);
size = PCI_accessReg(bar,0,PCI_READ_DWORD,pci) & ~0xFF;
size = ~size+1;
PCI_accessReg(bar,base,PCI_WRITE_DWORD,pci);
}
}
pci->slot.p.Register = 0;
return size;
}
@ -542,49 +542,49 @@ ulong _ASMAPI PCI_accessReg(
int iobase;
if (info->mech1 == 2) {
/* Use PCI BIOS access since we dont have direct hardware access */
switch (func) {
case PCI_READ_BYTE:
return (uchar)_PCIBIOS_service(READ_CONFIG_BYTE,info->slot.i >> 8,index,0,PCIEntry);
case PCI_READ_WORD:
return (ushort)_PCIBIOS_service(READ_CONFIG_WORD,info->slot.i >> 8,index,0,PCIEntry);
case PCI_READ_DWORD:
return (ulong)_PCIBIOS_service(READ_CONFIG_DWORD,info->slot.i >> 8,index,0,PCIEntry);
case PCI_WRITE_BYTE:
_PCIBIOS_service(WRITE_CONFIG_BYTE,info->slot.i >> 8,index,value,PCIEntry);
break;
case PCI_WRITE_WORD:
_PCIBIOS_service(WRITE_CONFIG_WORD,info->slot.i >> 8,index,value,PCIEntry);
break;
case PCI_WRITE_DWORD:
_PCIBIOS_service(WRITE_CONFIG_DWORD,info->slot.i >> 8,index,value,PCIEntry);
break;
}
}
/* Use PCI BIOS access since we dont have direct hardware access */
switch (func) {
case PCI_READ_BYTE:
return (uchar)_PCIBIOS_service(READ_CONFIG_BYTE,info->slot.i >> 8,index,0,PCIEntry);
case PCI_READ_WORD:
return (ushort)_PCIBIOS_service(READ_CONFIG_WORD,info->slot.i >> 8,index,0,PCIEntry);
case PCI_READ_DWORD:
return (ulong)_PCIBIOS_service(READ_CONFIG_DWORD,info->slot.i >> 8,index,0,PCIEntry);
case PCI_WRITE_BYTE:
_PCIBIOS_service(WRITE_CONFIG_BYTE,info->slot.i >> 8,index,value,PCIEntry);
break;
case PCI_WRITE_WORD:
_PCIBIOS_service(WRITE_CONFIG_WORD,info->slot.i >> 8,index,value,PCIEntry);
break;
case PCI_WRITE_DWORD:
_PCIBIOS_service(WRITE_CONFIG_DWORD,info->slot.i >> 8,index,value,PCIEntry);
break;
}
}
else {
/* Use direct hardware access mechanisms */
if (info->mech1) {
/* PCI access mechanism 1 */
iobase = 0xCFC + (index & 3);
info->slot.p.Register = index >> 2;
PM_outpd(0xCF8,info->slot.i);
}
else {
/* PCI access mechanism 2 */
PM_outpb(0xCF8,(uchar)((info->slot.p.Function << 1) | 0x10));
PM_outpb(0xCFA,(uchar)info->slot.p.Bus);
iobase = 0xC000 + (info->slot.p.Device << 8) + index;
}
switch (func) {
case PCI_READ_BYTE:
case PCI_READ_WORD:
case PCI_READ_DWORD: value = PM_inpd(iobase); break;
case PCI_WRITE_BYTE: PM_outpb(iobase,(uchar)value); break;
case PCI_WRITE_WORD: PM_outpw(iobase,(ushort)value); break;
case PCI_WRITE_DWORD: PM_outpd(iobase,(ulong)value); break;
}
PM_outpd(0xCF8,0);
}
/* Use direct hardware access mechanisms */
if (info->mech1) {
/* PCI access mechanism 1 */
iobase = 0xCFC + (index & 3);
info->slot.p.Register = index >> 2;
PM_outpd(0xCF8,info->slot.i);
}
else {
/* PCI access mechanism 2 */
PM_outpb(0xCF8,(uchar)((info->slot.p.Function << 1) | 0x10));
PM_outpb(0xCFA,(uchar)info->slot.p.Bus);
iobase = 0xC000 + (info->slot.p.Device << 8) + index;
}
switch (func) {
case PCI_READ_BYTE:
case PCI_READ_WORD:
case PCI_READ_DWORD: value = PM_inpd(iobase); break;
case PCI_WRITE_BYTE: PM_outpb(iobase,(uchar)value); break;
case PCI_WRITE_WORD: PM_outpw(iobase,(ushort)value); break;
case PCI_WRITE_DWORD: PM_outpd(iobase,(ulong)value); break;
}
PM_outpd(0xCF8,0);
}
return value;
}
@ -608,14 +608,14 @@ ibool _ASMAPI PCI_getIRQRoutingOptions(
int ret;
if (PCIPhysEntry) {
buf.BufferSize = numDevices * sizeof(PCIRouteInfo);
buf.DataBuffer = buffer;
if ((ret = _PCIBIOS_getRouting(&buf,PCIEntry)) == 0x89)
return buf.BufferSize / sizeof(PCIRouteInfo);
if (ret != 0)
return -1;
return 0;
}
buf.BufferSize = numDevices * sizeof(PCIRouteInfo);
buf.DataBuffer = buffer;
if ((ret = _PCIBIOS_getRouting(&buf,PCIEntry)) == 0x89)
return buf.BufferSize / sizeof(PCIRouteInfo);
if (ret != 0)
return -1;
return 0;
}
/* We currently only support this via the PCI BIOS functions */
return -1;
@ -642,13 +642,13 @@ ibool _ASMAPI PCI_setHardwareIRQ(
uint IRQ)
{
if (PCIPhysEntry) {
if (_PCIBIOS_setIRQ(info->slot.i >> 8,intPin,IRQ,PCIEntry)) {
info->u.type0.InterruptPin = intPin;
info->u.type0.InterruptLine = IRQ;
return true;
}
return false;
}
if (_PCIBIOS_setIRQ(info->slot.i >> 8,intPin,IRQ,PCIEntry)) {
info->u.type0.InterruptPin = intPin;
info->u.type0.InterruptLine = IRQ;
return true;
}
return false;
}
/* We currently only support this via the PCI BIOS functions */
return false;
@ -668,7 +668,7 @@ void _ASMAPI PCI_generateSpecialCyle(
ulong specialCycleData)
{
if (PCIPhysEntry)
_PCIBIOS_specialCycle(bus,specialCycleData,PCIEntry);
_PCIBIOS_specialCycle(bus,specialCycleData,PCIEntry);
/* We currently only support this via the PCI BIOS functions */
}
@ -699,14 +699,14 @@ void _ASMAPI PCI_readRegBlock(
int endCount = count - middleCount * 4 - startCount;
for (i = 0,pb = dst; i < startCount; i++, index++) {
*pb++ = (uchar)PCI_accessReg(index,0,PCI_READ_BYTE,info);
}
*pb++ = (uchar)PCI_accessReg(index,0,PCI_READ_BYTE,info);
}
for (i = 0,pd = (ulong*)pb; i < middleCount; i++, index += 4) {
*pd++ = (ulong)PCI_accessReg(index,0,PCI_READ_DWORD,info);
}
*pd++ = (ulong)PCI_accessReg(index,0,PCI_READ_DWORD,info);
}
for (i = 0,pb = (uchar*)pd; i < endCount; i++, index++) {
*pb++ = (uchar)PCI_accessReg(index,0,PCI_READ_BYTE,info);
}
*pb++ = (uchar)PCI_accessReg(index,0,PCI_READ_BYTE,info);
}
}
/****************************************************************************
@ -736,12 +736,12 @@ void _ASMAPI PCI_writeRegBlock(
int endCount = count - middleCount * 4 - startCount;
for (i = 0,pb = src; i < startCount; i++, index++) {
PCI_accessReg(index,*pb++,PCI_WRITE_BYTE,info);
}
PCI_accessReg(index,*pb++,PCI_WRITE_BYTE,info);
}
for (i = 0,pd = (ulong*)pb; i < middleCount; i++, index += 4) {
PCI_accessReg(index,*pd++,PCI_WRITE_DWORD,info);
}
PCI_accessReg(index,*pd++,PCI_WRITE_DWORD,info);
}
for (i = 0,pb = (uchar*)pd; i < endCount; i++, index++) {
PCI_accessReg(index,*pb++,PCI_WRITE_BYTE,info);
}
PCI_accessReg(index,*pb++,PCI_WRITE_BYTE,info);
}
}

80
board/MAI/bios_emulator/scitech/src/pm/common/unixio.c
View file

@ -65,9 +65,9 @@ static void convertFindData(
strcat(filename,blk->d_name);
stat(filename,&st);
if (!(st.st_mode & S_IWRITE))
findData->attrib |= PM_FILE_READONLY;
findData->attrib |= PM_FILE_READONLY;
if (st.st_mode & S_IFDIR)
findData->attrib |= PM_FILE_DIRECTORY;
findData->attrib |= PM_FILE_DIRECTORY;
findData->sizeLo = st.st_size;
findData->sizeHi = 0;
strncpy(findData->name,blk->d_name,PM_MAX_PATH);
@ -91,24 +91,24 @@ static ibool filematch(
PM_backslash(fullpath);
strcat(fullpath, dire->d_name);
if (stat(fullpath, &st) != 0)
return false;
return false;
for (; i < (int)strlen(dire->d_name) && j < (int)strlen(pattern); i++, j++) {
if (pattern[j] == '*' && lastchar != '\\') {
if (pattern[j+1] == '\0')
return true;
while (dire->d_name[i++] != pattern[j+1]) {
if (dire->d_name[i] == '\0')
return false;
}
i -= 2;
}
else if (dire->d_name[i] != pattern[j] &&
!(pattern[j] == '?' && lastchar != '\\'))
return false;
lastchar = pattern[i];
}
if (pattern[j] == '*' && lastchar != '\\') {
if (pattern[j+1] == '\0')
return true;
while (dire->d_name[i++] != pattern[j+1]) {
if (dire->d_name[i] == '\0')
return false;
}
i -= 2;
}
else if (dire->d_name[i] != pattern[j] &&
!(pattern[j] == '?' && lastchar != '\\'))
return false;
lastchar = pattern[i];
}
if (j == (int)strlen(pattern) && i == (int)strlen(dire->d_name))
return true;
return true;
return false;
}
@ -126,23 +126,23 @@ void * PMAPI PM_findFirstFile(
char ext[PM_MAX_PATH];
if ((d = PM_malloc(sizeof(*d))) == NULL)
return PM_FILE_INVALID;
return PM_FILE_INVALID;
PM_splitpath(filename,NULL,d->path,name,ext);
strcpy(d->mask,name);
strcat(d->mask,ext);
if (strlen(d->path) == 0)
strcpy(d->path, ".");
strcpy(d->path, ".");
if (d->path[strlen(d->path)-1] == '/')
d->path[strlen(d->path)-1] = 0;
d->path[strlen(d->path)-1] = 0;
if ((d->d = opendir(d->path)) != NULL) {
while ((dire = readdir(d->d)) != NULL) {
if (filematch(d->mask,d->path,dire)) {
convertFindData(findData,dire,d->path);
return d;
}
}
closedir(d->d);
}
while ((dire = readdir(d->d)) != NULL) {
if (filematch(d->mask,d->path,dire)) {
convertFindData(findData,dire,d->path);
return d;
}
}
closedir(d->d);
}
PM_free(d);
return PM_FILE_INVALID;
}
@ -159,11 +159,11 @@ ibool PMAPI PM_findNextFile(
struct dirent *dire;
while ((dire = readdir(d->d)) != NULL) {
if (filematch(d->mask,d->path,dire)) {
convertFindData(findData,dire,d->path);
return true;
}
}
if (filematch(d->mask,d->path,dire)) {
convertFindData(findData,dire,d->path);
return true;
}
}
return false;
}
@ -197,7 +197,7 @@ ibool PMAPI PM_driveValid(
char drive)
{
if (drive == 3)
return true;
return true;
return false;
}
@ -230,9 +230,9 @@ void PMAPI PM_setFileAttr(
stat(filename,&st);
mode = st.st_mode;
if (attrib & PM_FILE_READONLY)
mode &= ~S_IWRITE;
mode &= ~S_IWRITE;
else
mode |= S_IWRITE;
mode |= S_IWRITE;
chmod(filename,mode);
}
@ -247,7 +247,7 @@ uint PMAPI PM_getFileAttr(
stat(filename,&st);
if (st.st_mode & S_IWRITE)
return 0;
return 0;
return PM_FILE_READONLY;
}
@ -280,7 +280,7 @@ ibool PMAPI PM_getFileTime(
ibool gmTime,
PM_time *time)
{
// TODO: Implement this!
/* TODO: Implement this! */
(void)filename;
(void)gmTime;
(void)time;
@ -297,7 +297,7 @@ ibool PMAPI PM_setFileTime(
ibool gmTime,
PM_time *time)
{
// TODO: Implement this!
/* TODO: Implement this! */
(void)filename;
(void)gmTime;
(void)time;

80
board/MAI/bios_emulator/scitech/src/pm/common/vgastate.c
View file

@ -104,7 +104,7 @@ static void vga_delay(void)
* what we need.
*/
for (i = 0; i <= 10; i++)
PM_outpb(0x80, 0);
PM_outpb(0x80, 0);
}
/****************************************************************************
@ -152,9 +152,9 @@ static void vga_savepalette(
_port_out(0, PEL_IR);
for (i = 0; i < 768; i++) {
vga_delay();
*pal++ = _port_in(PEL_D);
}
vga_delay();
*pal++ = _port_in(PEL_D);
}
}
/****************************************************************************
@ -169,9 +169,9 @@ static void vga_restorepalette(
/* restore saved palette */
_port_out(0, PEL_IW);
for (i = 0; i < 768; i++) {
vga_delay();
_port_out(*pal++, PEL_D);
}
vga_delay();
_port_out(*pal++, PEL_D);
}
}
/****************************************************************************
@ -247,25 +247,25 @@ void PMAPI PM_saveVGAState(
/* Save state of VGA registers */
for (i = 0; i < CRT_C; i++) {
_port_out(i, CRT_I);
regs[CRT + i] = _port_in(CRT_D);
}
_port_out(i, CRT_I);
regs[CRT + i] = _port_in(CRT_D);
}
for (i = 0; i < ATT_C; i++) {
_port_in(IS1_R);
vga_delay();
_port_out(i, ATT_IW);
vga_delay();
regs[ATT + i] = _port_in(ATT_R);
vga_delay();
}
_port_in(IS1_R);
vga_delay();
_port_out(i, ATT_IW);
vga_delay();
regs[ATT + i] = _port_in(ATT_R);
vga_delay();
}
for (i = 0; i < GRA_C; i++) {
_port_out(i, GRA_I);
regs[GRA + i] = _port_in(GRA_D);
}
_port_out(i, GRA_I);
regs[GRA + i] = _port_in(GRA_D);
}
for (i = 0; i < SEQ_C; i++) {
_port_out(i, SEQ_I);
regs[SEQ + i] = _port_in(SEQ_D);
}
_port_out(i, SEQ_I);
regs[SEQ + i] = _port_in(SEQ_D);
}
regs[MIS] = _port_in(MIS_R);
/* Save the VGA palette values */
@ -302,7 +302,7 @@ void PMAPI PM_restoreVGAState(
/* Delay to allow clock change to settle */
for (i = 0; i < 10; i++)
vga_delay();
vga_delay();
/* Synchronous reset on */
_port_out(0x00,SEQ_I);
@ -312,9 +312,9 @@ void PMAPI PM_restoreVGAState(
_port_out(1, SEQ_I);
_port_out(regs[SEQ + 1] | 0x20, SEQ_D);
for (i = 2; i < SEQ_C; i++) {
_port_out(i, SEQ_I);
_port_out(regs[SEQ + i], SEQ_D);
}
_port_out(i, SEQ_I);
_port_out(regs[SEQ + i], SEQ_D);
}
/* Synchronous reset off */
_port_out(0x00,SEQ_I);
@ -324,21 +324,21 @@ void PMAPI PM_restoreVGAState(
_port_out(0x11, CRT_I);
_port_out(_port_in(CRT_D) & 0x7F, CRT_D);
for (i = 0; i < CRT_C; i++) {
_port_out(i, CRT_I);
_port_out(regs[CRT + i], CRT_D);
}
_port_out(i, CRT_I);
_port_out(regs[CRT + i], CRT_D);
}
for (i = 0; i < GRA_C; i++) {
_port_out(i, GRA_I);
_port_out(regs[GRA + i], GRA_D);
}
_port_out(i, GRA_I);
_port_out(regs[GRA + i], GRA_D);
}
for (i = 0; i < ATT_C; i++) {
_port_in(IS1_R); /* reset flip-flop */
vga_delay();
_port_out(i, ATT_IW);
vga_delay();
_port_out(regs[ATT + i], ATT_IW);
vga_delay();
}
_port_in(IS1_R); /* reset flip-flop */
vga_delay();
_port_out(i, ATT_IW);
vga_delay();
_port_out(regs[ATT + i], ATT_IW);
vga_delay();
}
/* Ensure the VGA screen is turned on */
PM_vgaUnblankDisplay();

614
board/MAI/bios_emulator/scitech/src/pm/cpuinfo.c
View file

@ -168,144 +168,144 @@ uint ZAPI CPU_getProcessorType(void)
static ibool firstTime = true;
if (_CPU_haveCPUID()) {
cpu = _CPU_checkCPUID();
vendor = cpu & ~CPU_mask;
if (vendor == CPU_Intel) {
/* Check for Intel processors */
switch (cpu & CPU_mask) {
case 4: cpu = CPU_i486; break;
case 5: cpu = CPU_Pentium; break;
case 6:
if ((model = _CPU_getCPUIDModel()) == 1)
cpu = CPU_PentiumPro;
else if (model <= 6) {
cacheSize = _CPU_getCacheSize();
if ((model == 5 && cacheSize == 0) ||
(model == 5 && cacheSize == 256) ||
(model == 6 && cacheSize == 128))
cpu = CPU_Celeron;
else
cpu = CPU_PentiumII;
}
else if (model >= 7) {
/* Model 7 == Pentium III */
/* Model 8 == Celeron/Pentium III Coppermine */
cacheSize = _CPU_getCacheSize();
if ((model == 8 && cacheSize == 128))
cpu = CPU_Celeron;
else
cpu = CPU_PentiumIII;
}
break;
default:
cpu = CPU_UnkIntel;
}
}
else if (vendor == CPU_Cyrix) {
/* Check for Cyrix processors */
switch (cpu & CPU_mask) {
case 4:
if ((model = _CPU_getCPUIDModel()) == 4)
cpu = CPU_CyrixMediaGX;
else
cpu = CPU_UnkCyrix;
break;
case 5:
if ((model = _CPU_getCPUIDModel()) == 2)
cpu = CPU_Cyrix6x86;
else if (model == 4)
cpu = CPU_CyrixMediaGXm;
else
cpu = CPU_UnkCyrix;
break;
case 6:
if ((model = _CPU_getCPUIDModel()) <= 1)
cpu = CPU_Cyrix6x86MX;
else
cpu = CPU_UnkCyrix;
break;
default:
cpu = CPU_UnkCyrix;
}
}
else if (vendor == CPU_AMD) {
/* Check for AMD processors */
switch (cpu & CPU_mask) {
case 4:
if ((model = _CPU_getCPUIDModel()) == 0)
cpu = CPU_AMDAm5x86;
else
cpu = CPU_AMDAm486;
break;
case 5:
if ((model = _CPU_getCPUIDModel()) <= 3)
cpu = CPU_AMDK5;
else if (model <= 7)
cpu = CPU_AMDK6;
else if (model == 8)
cpu = CPU_AMDK6_2;
else if (model == 9)
cpu = CPU_AMDK6_III;
else if (model == 13) {
if (_CPU_getCPUIDStepping() <= 3)
cpu = CPU_AMDK6_IIIplus;
else
cpu = CPU_AMDK6_2plus;
}
else
cpu = CPU_UnkAMD;
break;
case 6:
if ((model = _CPU_getCPUIDModel()) == 3)
cpu = CPU_AMDDuron;
else
cpu = CPU_AMDAthlon;
break;
default:
cpu = CPU_UnkAMD;
}
}
else if (vendor == CPU_IDT) {
/* Check for IDT WinChip processors */
switch (cpu & CPU_mask) {
case 5:
if ((model = _CPU_getCPUIDModel()) <= 4)
cpu = CPU_WinChipC6;
else if (model == 8)
cpu = CPU_WinChip2;
else
cpu = CPU_UnkIDT;
break;
default:
cpu = CPU_UnkIDT;
}
}
else {
/* Assume a Pentium compatible Intel clone */
cpu = CPU_Pentium;
}
return cpu | vendor | (_CPU_getCPUIDStepping() << CPU_steppingShift);
}
cpu = _CPU_checkCPUID();
vendor = cpu & ~CPU_mask;
if (vendor == CPU_Intel) {
/* Check for Intel processors */
switch (cpu & CPU_mask) {
case 4: cpu = CPU_i486; break;
case 5: cpu = CPU_Pentium; break;
case 6:
if ((model = _CPU_getCPUIDModel()) == 1)
cpu = CPU_PentiumPro;
else if (model <= 6) {
cacheSize = _CPU_getCacheSize();
if ((model == 5 && cacheSize == 0) ||
(model == 5 && cacheSize == 256) ||
(model == 6 && cacheSize == 128))
cpu = CPU_Celeron;
else
cpu = CPU_PentiumII;
}
else if (model >= 7) {
/* Model 7 == Pentium III */
/* Model 8 == Celeron/Pentium III Coppermine */
cacheSize = _CPU_getCacheSize();
if ((model == 8 && cacheSize == 128))
cpu = CPU_Celeron;
else
cpu = CPU_PentiumIII;
}
break;
default:
cpu = CPU_UnkIntel;
}
}
else if (vendor == CPU_Cyrix) {
/* Check for Cyrix processors */
switch (cpu & CPU_mask) {
case 4:
if ((model = _CPU_getCPUIDModel()) == 4)
cpu = CPU_CyrixMediaGX;
else
cpu = CPU_UnkCyrix;
break;
case 5:
if ((model = _CPU_getCPUIDModel()) == 2)
cpu = CPU_Cyrix6x86;
else if (model == 4)
cpu = CPU_CyrixMediaGXm;
else
cpu = CPU_UnkCyrix;
break;
case 6:
if ((model = _CPU_getCPUIDModel()) <= 1)
cpu = CPU_Cyrix6x86MX;
else
cpu = CPU_UnkCyrix;
break;
default:
cpu = CPU_UnkCyrix;
}
}
else if (vendor == CPU_AMD) {
/* Check for AMD processors */
switch (cpu & CPU_mask) {
case 4:
if ((model = _CPU_getCPUIDModel()) == 0)
cpu = CPU_AMDAm5x86;
else
cpu = CPU_AMDAm486;
break;
case 5:
if ((model = _CPU_getCPUIDModel()) <= 3)
cpu = CPU_AMDK5;
else if (model <= 7)
cpu = CPU_AMDK6;
else if (model == 8)
cpu = CPU_AMDK6_2;
else if (model == 9)
cpu = CPU_AMDK6_III;
else if (model == 13) {
if (_CPU_getCPUIDStepping() <= 3)
cpu = CPU_AMDK6_IIIplus;
else
cpu = CPU_AMDK6_2plus;
}
else
cpu = CPU_UnkAMD;
break;
case 6:
if ((model = _CPU_getCPUIDModel()) == 3)
cpu = CPU_AMDDuron;
else
cpu = CPU_AMDAthlon;
break;
default:
cpu = CPU_UnkAMD;
}
}
else if (vendor == CPU_IDT) {
/* Check for IDT WinChip processors */
switch (cpu & CPU_mask) {
case 5:
if ((model = _CPU_getCPUIDModel()) <= 4)
cpu = CPU_WinChipC6;
else if (model == 8)
cpu = CPU_WinChip2;
else
cpu = CPU_UnkIDT;
break;
default:
cpu = CPU_UnkIDT;
}
}
else {
/* Assume a Pentium compatible Intel clone */
cpu = CPU_Pentium;
}
return cpu | vendor | (_CPU_getCPUIDStepping() << CPU_steppingShift);
}
else {
if (_CPU_check80386())
cpu = CPU_i386;
else if (_CPU_check80486()) {
/* If we get here we may have a Cyrix processor so we can try
* enabling the CPUID instruction and trying again.
*/
if (firstTime) {
firstTime = false;
_CPU_enableCyrixCPUID();
return CPU_getProcessorType();
}
cpu = CPU_i486;
}
else
cpu = CPU_Pentium;
if (!_CPU_checkClone())
return cpu | CPU_Intel;
return cpu;
}
if (_CPU_check80386())
cpu = CPU_i386;
else if (_CPU_check80486()) {
/* If we get here we may have a Cyrix processor so we can try
* enabling the CPUID instruction and trying again.
*/
if (firstTime) {
firstTime = false;
_CPU_enableCyrixCPUID();
return CPU_getProcessorType();
}
cpu = CPU_i486;
}
else
cpu = CPU_Pentium;
if (!_CPU_checkClone())
return cpu | CPU_Intel;
return cpu;
}
#elif defined(__ALPHA__)
return CPU_Alpha;
#elif defined(__MIPS__)
@ -337,7 +337,7 @@ ibool ZAPI CPU_haveMMX(void)
{
#ifdef __INTEL__
if (_CPU_haveCPUID())
return (_CPU_getCPUIDFeatures() & CPU_HaveMMX) != 0;
return (_CPU_getCPUIDFeatures() & CPU_HaveMMX) != 0;
return false;
#else
return false;
@ -366,7 +366,7 @@ ibool ZAPI CPU_have3DNow(void)
{
#ifdef __INTEL__
if (_CPU_haveCPUID())
return _CPU_have3DNow();
return _CPU_have3DNow();
return false;
#else
return false;
@ -395,7 +395,7 @@ ibool ZAPI CPU_haveSSE(void)
{
#ifdef __INTEL__
if (_CPU_haveCPUID())
return (_CPU_getCPUIDFeatures() & CPU_HaveSSE) != 0;
return (_CPU_getCPUIDFeatures() & CPU_HaveSSE) != 0;
return false;
#else
return false;
@ -432,7 +432,7 @@ ibool ZAPI CPU_haveRDTSC(void)
{
#ifdef __INTEL__
if (_CPU_haveCPUID())
return (_CPU_getCPUIDFeatures() & CPU_HaveRDTSC) != 0;
return (_CPU_getCPUIDFeatures() & CPU_HaveRDTSC) != 0;
return false;
#else
return false;
@ -464,22 +464,22 @@ static ulong GetBSFCpuSpeed(
iPriority = SetMaxThreadPriority();
GetCounterFrequency(&count_freq);
for (i = 0; i < SAMPLINGS; i++) {
GetCounter(&t0);
for (j = 0; j < INNER_LOOPS; j++)
_CPU_runBSFLoop(ITERATIONS);
GetCounter(&t1);
current = t1.low - t0.low;
if (current < lowest)
lowest = current;
}
GetCounter(&t0);
for (j = 0; j < INNER_LOOPS; j++)
_CPU_runBSFLoop(ITERATIONS);
GetCounter(&t1);
current = t1.low - t0.low;
if (current < lowest)
lowest = current;
}
RestoreThreadPriority(iPriority);
/* Compute frequency */
ticks = _CPU_mulDiv(lowest,1000000,count_freq.low);
if ((ticks % count_freq.low) > (count_freq.low/2))
ticks++; /* Round up if necessary */
ticks++; /* Round up if necessary */
if (ticks == 0)
return 0;
return 0;
return ((cycles*INNER_LOOPS)/ticks);
}
@ -513,44 +513,44 @@ static ulong GetRDTSCCpuSpeed(
GetCounterFrequency(&count_freq);
PM_set64(freq,count_freq.high,count_freq.low);
for (tries = 0; tries < 3; tries++) {
/* Loop until 100 ticks have passed since last read of hi-res
* counter. This accounts for overhead later.
*/
GetCounter(&t0);
t1.low = t0.low;
t1.high = t0.high;
while ((t1.low - t0.low) < 100) {
GetCounter(&t1);
_CPU_readTimeStamp(&s0);
}
/* Loop until 100 ticks have passed since last read of hi-res
* counter. This accounts for overhead later.
*/
GetCounter(&t0);
t1.low = t0.low;
t1.high = t0.high;
while ((t1.low - t0.low) < 100) {
GetCounter(&t1);
_CPU_readTimeStamp(&s0);
}
/* Loop until 30000 ticks have passed since last read of hi-res counter.
* This allows for elapsed time for sampling. For a hi-res frequency
* of 1MHz, this is about 0.03 of a second. The frequency reported
* by the OS dependent code should be tuned to provide a good
* sample period depending on the accuracy of the OS timers (ie:
* if the accuracy is lower, lower the frequency to spend more time
* in the inner loop to get better accuracy).
*/
t0.low = t1.low;
t0.high = t1.high;
while ((t1.low - t0.low) < maxCount) {
GetCounter(&t1);
_CPU_readTimeStamp(&s1);
}
/* Loop until 30000 ticks have passed since last read of hi-res counter.
* This allows for elapsed time for sampling. For a hi-res frequency
* of 1MHz, this is about 0.03 of a second. The frequency reported
* by the OS dependent code should be tuned to provide a good
* sample period depending on the accuracy of the OS timers (ie:
* if the accuracy is lower, lower the frequency to spend more time
* in the inner loop to get better accuracy).
*/
t0.low = t1.low;
t0.high = t1.high;
while ((t1.low - t0.low) < maxCount) {
GetCounter(&t1);
_CPU_readTimeStamp(&s1);
}
/* Find the difference during the timing loop */
PM_set64(stamp0,s0.high,s0.low);
PM_set64(stamp1,s1.high,s1.low);
PM_set64(ticks0,t0.high,t0.low);
PM_set64(ticks1,t1.high,t1.low);
PM_sub64(cycles,stamp1,stamp0);
PM_sub64(ticks,ticks1,ticks0);
/* Find the difference during the timing loop */
PM_set64(stamp0,s0.high,s0.low);
PM_set64(stamp1,s1.high,s1.low);
PM_set64(ticks0,t0.high,t0.low);
PM_set64(ticks1,t1.high,t1.low);
PM_sub64(cycles,stamp1,stamp0);
PM_sub64(ticks,ticks1,ticks0);
/* Sum up the results */
PM_add64(total_ticks,total_ticks,ticks);
PM_add64(total_cycles,total_cycles,cycles);
}
/* Sum up the results */
PM_add64(total_ticks,total_ticks,ticks);
PM_add64(total_cycles,total_cycles,cycles);
}
RestoreThreadPriority(iPriority);
/* Compute frequency in Hz */
@ -598,46 +598,46 @@ ulong ZAPI CPU_getProcessorSpeed(
ulong cpuSpeed;
uint i;
static ulong intel_cycles[] = {
115,47,43,
};
115,47,43,
};
static ulong cyrix_cycles[] = {
38,38,52,52,
};
38,38,52,52,
};
static ulong amd_cycles[] = {
49,
};
49,
};
static ulong known_speeds[] = {
1000,950,900,850,800,750,700,650,600,550,500,450,433,400,350,
333,300,266,233,200,166,150,133,120,100,90,75,66,60,50,33,20,0,
};
1000,950,900,850,800,750,700,650,600,550,500,450,433,400,350,
333,300,266,233,200,166,150,133,120,100,90,75,66,60,50,33,20,0,
};
if (CPU_haveRDTSC()) {
cpuSpeed = (GetRDTSCCpuSpeed(accurate) + 500000) / 1000000;
}
cpuSpeed = (GetRDTSCCpuSpeed(accurate) + 500000) / 1000000;
}
else {
int type = CPU_getProcessorType();
int processor = type & CPU_mask;
int vendor = type & CPU_familyMask;
if (vendor == CPU_Intel)
cpuSpeed = GetBSFCpuSpeed(ITERATIONS * intel_cycles[processor - CPU_i386]);
else if (vendor == CPU_Cyrix)
cpuSpeed = GetBSFCpuSpeed(ITERATIONS * cyrix_cycles[processor - CPU_Cyrix6x86]);
else if (vendor == CPU_AMD)
cpuSpeed = GetBSFCpuSpeed(ITERATIONS * amd_cycles[0]);
else
return 0;
}
int type = CPU_getProcessorType();
int processor = type & CPU_mask;
int vendor = type & CPU_familyMask;
if (vendor == CPU_Intel)
cpuSpeed = GetBSFCpuSpeed(ITERATIONS * intel_cycles[processor - CPU_i386]);
else if (vendor == CPU_Cyrix)
cpuSpeed = GetBSFCpuSpeed(ITERATIONS * cyrix_cycles[processor - CPU_Cyrix6x86]);
else if (vendor == CPU_AMD)
cpuSpeed = GetBSFCpuSpeed(ITERATIONS * amd_cycles[0]);
else
return 0;
}
/* Now normalise the results given known processors speeds, if the
* speed we measure is within 2MHz of the expected values
*/
if (!accurate) {
for (i = 0; known_speeds[i] != 0; i++) {
if (cpuSpeed >= (known_speeds[i]-3) && cpuSpeed <= (known_speeds[i]+3)) {
return known_speeds[i];
}
}
}
for (i = 0; known_speeds[i] != 0; i++) {
if (cpuSpeed >= (known_speeds[i]-3) && cpuSpeed <= (known_speeds[i]+3)) {
return known_speeds[i];
}
}
}
return cpuSpeed;
#else
return 0;
@ -674,8 +674,8 @@ ulong ZAPI CPU_getProcessorSpeedInHZ(
{
#if defined(__INTEL__)
if (CPU_haveRDTSC()) {
return GetRDTSCCpuSpeed(accurate);
}
return GetRDTSCCpuSpeed(accurate);
}
return CPU_getProcessorSpeed(false) * 1000000;
#else
return 0;
@ -706,101 +706,101 @@ char * ZAPI CPU_getProcessorName(void)
static char name[80];
if (speed == -1) {
cpu = CPU_getProcessorType();
speed = CPU_getProcessorSpeed(false);
}
cpu = CPU_getProcessorType();
speed = CPU_getProcessorSpeed(false);
}
sprintf(name,"%d MHz ", speed);
switch (cpu & CPU_mask) {
case CPU_i386:
strcat(name,"Intel i386 processor");
break;
case CPU_i486:
strcat(name,"Intel i486 processor");
break;
case CPU_Pentium:
strcat(name,"Intel Pentium processor");
break;
case CPU_PentiumPro:
strcat(name,"Intel Pentium Pro processor");
break;
case CPU_PentiumII:
strcat(name,"Intel Pentium II processor");
break;
case CPU_Celeron:
strcat(name,"Intel Celeron processor");
break;
case CPU_PentiumIII:
strcat(name,"Intel Pentium III processor");
break;
case CPU_UnkIntel:
strcat(name,"Unknown Intel processor");
break;
case CPU_Cyrix6x86:
strcat(name,"Cyrix 6x86 processor");
break;
case CPU_Cyrix6x86MX:
strcat(name,"Cyrix 6x86MX processor");
break;
case CPU_CyrixMediaGX:
strcat(name,"Cyrix MediaGX processor");
break;
case CPU_CyrixMediaGXm:
strcat(name,"Cyrix MediaGXm processor");
break;
case CPU_UnkCyrix:
strcat(name,"Unknown Cyrix processor");
break;
case CPU_AMDAm486:
strcat(name,"AMD Am486 processor");
break;
case CPU_AMDAm5x86:
strcat(name,"AMD Am5x86 processor");
break;
case CPU_AMDK5:
strcat(name,"AMD K5 processor");
break;
case CPU_AMDK6:
strcat(name,"AMD K6 processor");
break;
case CPU_AMDK6_2:
strcat(name,"AMD K6-2 processor");
break;
case CPU_AMDK6_III:
strcat(name,"AMD K6-III processor");
break;
case CPU_AMDK6_2plus:
strcat(name,"AMD K6-2+ processor");
break;
case CPU_AMDK6_IIIplus:
strcat(name,"AMD K6-III+ processor");
break;
case CPU_UnkAMD:
strcat(name,"Unknown AMD processor");
break;
case CPU_AMDAthlon:
strcat(name,"AMD Athlon processor");
break;
case CPU_AMDDuron:
strcat(name,"AMD Duron processor");
break;
case CPU_WinChipC6:
strcat(name,"IDT WinChip C6 processor");
break;
case CPU_WinChip2:
strcat(name,"IDT WinChip 2 processor");
break;
case CPU_UnkIDT:
strcat(name,"Unknown IDT processor");
break;
default:
strcat(name,"Unknown processor");
}
case CPU_i386:
strcat(name,"Intel i386 processor");
break;
case CPU_i486:
strcat(name,"Intel i486 processor");
break;
case CPU_Pentium:
strcat(name,"Intel Pentium processor");
break;
case CPU_PentiumPro:
strcat(name,"Intel Pentium Pro processor");
break;
case CPU_PentiumII:
strcat(name,"Intel Pentium II processor");
break;
case CPU_Celeron:
strcat(name,"Intel Celeron processor");
break;
case CPU_PentiumIII:
strcat(name,"Intel Pentium III processor");
break;
case CPU_UnkIntel:
strcat(name,"Unknown Intel processor");
break;
case CPU_Cyrix6x86:
strcat(name,"Cyrix 6x86 processor");
break;
case CPU_Cyrix6x86MX:
strcat(name,"Cyrix 6x86MX processor");
break;
case CPU_CyrixMediaGX:
strcat(name,"Cyrix MediaGX processor");
break;
case CPU_CyrixMediaGXm:
strcat(name,"Cyrix MediaGXm processor");
break;
case CPU_UnkCyrix:
strcat(name,"Unknown Cyrix processor");
break;
case CPU_AMDAm486:
strcat(name,"AMD Am486 processor");
break;
case CPU_AMDAm5x86:
strcat(name,"AMD Am5x86 processor");
break;
case CPU_AMDK5:
strcat(name,"AMD K5 processor");
break;
case CPU_AMDK6:
strcat(name,"AMD K6 processor");
break;
case CPU_AMDK6_2:
strcat(name,"AMD K6-2 processor");
break;
case CPU_AMDK6_III:
strcat(name,"AMD K6-III processor");
break;
case CPU_AMDK6_2plus:
strcat(name,"AMD K6-2+ processor");
break;
case CPU_AMDK6_IIIplus:
strcat(name,"AMD K6-III+ processor");
break;
case CPU_UnkAMD:
strcat(name,"Unknown AMD processor");
break;
case CPU_AMDAthlon:
strcat(name,"AMD Athlon processor");
break;
case CPU_AMDDuron:
strcat(name,"AMD Duron processor");
break;
case CPU_WinChipC6:
strcat(name,"IDT WinChip C6 processor");
break;
case CPU_WinChip2:
strcat(name,"IDT WinChip 2 processor");
break;
case CPU_UnkIDT:
strcat(name,"Unknown IDT processor");
break;
default:
strcat(name,"Unknown processor");
}
if (CPU_haveMMX())
strcat(name," with MMX(R)");
strcat(name," with MMX(R)");
if (CPU_have3DNow())
strcat(name,", 3DNow!(R)");
strcat(name,", 3DNow!(R)");
if (CPU_haveSSE())
strcat(name,", SSE(R)");
strcat(name,", SSE(R)");
return name;
#else
return "Unknown";

24
board/MAI/bios_emulator/scitech/src/pm/debug.c
View file

@ -61,23 +61,23 @@ void _CHK_defaultFail(
char buf[256];
if (logFile[0] == 0) {
strcpy(logFile,PM_getNucleusPath());
PM_backslash(logFile);
strcat(logFile,"scitech.log");
}
strcpy(logFile,PM_getNucleusPath());
PM_backslash(logFile);
strcat(logFile,"scitech.log");
}
if ((f = fopen(logFile,"a+")) != NULL) {
#if defined(__WIN32_VXD__) || defined(__OS2_VDD__) || defined(__NT_DRIVER__)
sprintf(buf,msg,cond,file,line);
fwrite(buf,1,strlen(buf),f);
sprintf(buf,msg,cond,file,line);
fwrite(buf,1,strlen(buf),f);
#else
fprintf(f,msg,cond,file,line);
fprintf(f,msg,cond,file,line);
#endif
fclose(f);
}
fclose(f);
}
if (fatal) {
sprintf(buf,"Check failed: check '%s' for details", logFile);
PM_fatalError(buf);
}
sprintf(buf,"Check failed: check '%s' for details", logFile);
PM_fatalError(buf);
}
}
#endif

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