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omap: clean-up dead configs

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The following configs are not defined at all.

 - CONFIG_OMAP1510
 - CONFIG_OMAP_1510P1
 - CONFIG_OMAP_SX1
 - CONFIG_OMAP3_DMA
 - CONFIG_OMAP3_ZOOM2
 - CONFIG_OMAP_INNOVATOR

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
This commit is contained in:
Masahiro Yamada 2014-07-30 19:11:41 +09:00 committed by Tom Rini
parent 0596d35d80
commit 8ac22a60e2
10 changed files with 3 additions and 255 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
drivers/dma/Makefile
View file

@ -8,4 +8,3 @@
obj-$(CONFIG_FSLDMAFEC) += MCD_tasksInit.o MCD_dmaApi.o MCD_tasks.o
obj-$(CONFIG_APBH_DMA) += apbh_dma.o
obj-$(CONFIG_FSL_DMA) += fsl_dma.o
obj-$(CONFIG_OMAP3_DMA) += omap3_dma.o

167
drivers/dma/omap3_dma.c
View file

@ -1,167 +0,0 @@
/* Copyright (C) 2011
* Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/* This is a basic implementation of the SDMA/DMA4 controller of OMAP3
* Tested on Silicon Revision major:0x4 minor:0x0
*/
#include <common.h>
#include <asm/arch/cpu.h>
#include <asm/arch/omap3.h>
#include <asm/arch/dma.h>
#include <asm/io.h>
#include <asm/errno.h>
static struct dma4 *dma4_cfg = (struct dma4 *)OMAP34XX_DMA4_BASE;
uint32_t dma_active; /* if a transfer is started the respective
bit is set for the logical channel */
/* Check if we have the given channel
* PARAMETERS:
* chan: Channel number
*
* RETURN of non-zero means error */
static inline int check_channel(uint32_t chan)
{
if (chan < CHAN_NR_MIN || chan > CHAN_NR_MAX)
return -EINVAL;
return 0;
}
static inline void reset_irq(uint32_t chan)
{
/* reset IRQ reason */
writel(0x1DFE, &dma4_cfg->chan[chan].csr);
/* reset IRQ */
writel((1 << chan), &dma4_cfg->irqstatus_l[0]);
dma_active &= ~(1 << chan);
}
/* Set Source, Destination and Size of DMA transfer for the
* specified channel.
* PARAMETERS:
* chan: channel to use
* src: source of the transfer
* dst: destination of the transfer
* sze: Size of the transfer
*
* RETURN of non-zero means error */
int omap3_dma_conf_transfer(uint32_t chan, uint32_t *src, uint32_t *dst,
uint32_t sze)
{
if (check_channel(chan))
return -EINVAL;
/* CDSA0 */
writel((uint32_t)src, &dma4_cfg->chan[chan].cssa);
writel((uint32_t)dst, &dma4_cfg->chan[chan].cdsa);
writel(sze, &dma4_cfg->chan[chan].cen);
return 0;
}
/* Start the DMA transfer */
int omap3_dma_start_transfer(uint32_t chan)
{
uint32_t val;
if (check_channel(chan))
return -EINVAL;
val = readl(&dma4_cfg->chan[chan].ccr);
/* Test for channel already in use */
if (val & CCR_ENABLE_ENABLE)
return -EBUSY;
writel((val | CCR_ENABLE_ENABLE), &dma4_cfg->chan[chan].ccr);
dma_active |= (1 << chan);
debug("started transfer...\n");
return 0;
}
/* Busy-waiting for a DMA transfer
* This has to be called before another transfer is started
* PARAMETER
* chan: Channel to wait for
*
* RETURN of non-zero means error*/
int omap3_dma_wait_for_transfer(uint32_t chan)
{
uint32_t val;
if (!(dma_active & (1 << chan))) {
val = readl(&dma4_cfg->irqstatus_l[0]);
if (!(val & chan)) {
debug("dma: The channel you are trying to wait for "
"was never activated - ERROR\n");
return -1; /* channel was never active */
}
}
/* all irqs on line 0 */
while (!(readl(&dma4_cfg->irqstatus_l[0]) & (1 << chan)))
asm("nop");
val = readl(&dma4_cfg->chan[chan].csr);
if ((val & CSR_TRANS_ERR) | (val & CSR_SUPERVISOR_ERR) |
(val & CSR_MISALIGNED_ADRS_ERR)) {
debug("err code: %X\n", val);
debug("dma: transfer error detected\n");
reset_irq(chan);
return -1;
}
reset_irq(chan);
return 0;
}
/* Get the revision of the DMA module
* PARAMETER
* minor: Address of minor revision to write
* major: Address of major revision to write
*
* RETURN of non-zero means error
*/
int omap3_dma_get_revision(uint32_t *minor, uint32_t *major)
{
uint32_t val;
/* debug information */
val = readl(&dma4_cfg->revision);
*major = (val & 0x000000F0) >> 4;
*minor = (val & 0x0000000F);
debug("DMA Silicon revision (maj/min): 0x%X/0x%X\n", *major, *minor);
return 0;
}
/* Initial config of omap dma
*/
void omap3_dma_init(void)
{
dma_active = 0;
/* All interrupts on channel 0 */
writel(0xFFFFFFFF, &dma4_cfg->irqenable_l[0]);
}
/* set channel config to config
*
* RETURN of non-zero means error */
int omap3_dma_conf_chan(uint32_t chan, struct dma4_chan *config)
{
if (check_channel(chan))
return -EINVAL;
dma4_cfg->chan[chan] = *config;
return 0;
}
/* get channel config to config
*
* RETURN of non-zero means error */
int omap3_dma_get_conf_chan(uint32_t chan, struct dma4_chan *config)
{
if (check_channel(chan))
return -EINVAL;
*config = dma4_cfg->chan[chan];
return 0;
}

2
drivers/serial/ns16550.c
View file

@ -81,7 +81,7 @@ void NS16550_init(NS16550_t com_port, int baud_divisor)
serial_out(baud_divisor & 0xff, &com_port->dll);
serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
serial_out(UART_LCRVAL, &com_port->lcr);
#if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \
#if defined(CONFIG_OMAP) || \
defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)

9
drivers/serial/serial_ns16550.c
View file

@ -122,15 +122,6 @@ static int calc_divisor (NS16550_t port)
{
const unsigned int mode_x_div = 16;
#ifdef CONFIG_OMAP1510
/* If can't cleanly clock 115200 set div to 1 */
if ((CONFIG_SYS_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) {
port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
return (1); /* return 1 for base divisor */
}
port->osc_12m_sel = 0; /* clear if previsouly set */
#endif
return DIV_ROUND_CLOSEST(CONFIG_SYS_NS16550_CLK,
mode_x_div * gd->baudrate);
}

2
drivers/serial/usbtty.h
View file

@ -14,8 +14,6 @@
#include <usbdevice.h>
#if defined(CONFIG_PPC)
#include <usb/mpc8xx_udc.h>
#elif defined(CONFIG_OMAP1510)
#include <usb/omap1510_udc.h>
#elif defined(CONFIG_CPU_PXA27X)
#include <usb/pxa27x_udc.h>
#elif defined(CONFIG_DW_UDC)

1
drivers/usb/gadget/Makefile
View file

@ -31,7 +31,6 @@ ifdef CONFIG_USB_DEVICE
obj-y += core.o
obj-y += ep0.o
obj-$(CONFIG_DW_UDC) += designware_udc.o
obj-$(CONFIG_OMAP1510) += omap1510_udc.o
obj-$(CONFIG_OMAP1610) += omap1510_udc.o
obj-$(CONFIG_MPC885_FAMILY) += mpc8xx_udc.o
obj-$(CONFIG_CPU_PXA27X) += pxa27x_udc.o

49
drivers/usb/gadget/omap1510_udc.c
View file

@ -15,9 +15,6 @@
#include <common.h>
#include <asm/io.h>
#ifdef CONFIG_OMAP_SX1
#include <i2c.h>
#endif
#include <usbdevice.h>
#include <usb/omap1510_udc.h>
#include <usb/udc.h>
@ -1097,20 +1094,6 @@ int udc_init (void)
outw ((1 << 4) | (1 << 5), CLOCK_CTRL);
UDCREG (CLOCK_CTRL);
#ifdef CONFIG_OMAP1510
/* This code was originally implemented for OMAP1510 and
* therefore is only applicable for OMAP1510 boards. For
* OMAP5912 or OMAP16xx the register APLL_CTRL does not
* exist and DPLL_CTRL is already configured.
*/
/* Set and check APLL */
outw (0x0008, APLL_CTRL);
UDCREG (APLL_CTRL);
/* Set and check DPLL */
outw (0x2210, DPLL_CTRL);
UDCREG (DPLL_CTRL);
#endif
/* Set and check SOFT
* The below line of code has been changed to perform a
* read-modify-write instead of a simple write for
@ -1124,44 +1107,12 @@ int udc_init (void)
/* Print banner with device revision */
udc_rev = inw (UDC_REV) & 0xff;
#ifdef CONFIG_OMAP1510
printf ("USB: TI OMAP1510 USB function module rev %d.%d\n",
udc_rev >> 4, udc_rev & 0xf);
#endif
#ifdef CONFIG_OMAP1610
printf ("USB: TI OMAP5912 USB function module rev %d.%d\n",
udc_rev >> 4, udc_rev & 0xf);
#endif
#ifdef CONFIG_OMAP_SX1
i2c_read (0x32, 0x04, 1, &value, 1);
value |= 0x04;
i2c_write (0x32, 0x04, 1, &value, 1);
i2c_read (0x32, 0x03, 1, &value, 1);
value |= 0x01;
i2c_write (0x32, 0x03, 1, &value, 1);
gpio = inl(GPIO_PIN_CONTROL_REG);
gpio |= 0x0002; /* A_IRDA_OFF */
gpio |= 0x0800; /* A_SWITCH */
gpio |= 0x8000; /* A_USB_ON */
outl (gpio, GPIO_PIN_CONTROL_REG);
gpio = inl(GPIO_DIR_CONTROL_REG);
gpio &= ~0x0002; /* A_IRDA_OFF */
gpio &= ~0x0800; /* A_SWITCH */
gpio &= ~0x8000; /* A_USB_ON */
outl (gpio, GPIO_DIR_CONTROL_REG);
gpio = inl(GPIO_DATA_OUTPUT_REG);
gpio |= 0x0002; /* A_IRDA_OFF */
gpio &= ~0x0800; /* A_SWITCH */
gpio &= ~0x8000; /* A_USB_ON */
outl (gpio, GPIO_DATA_OUTPUT_REG);
#endif
/* The VBUS_MODE bit selects whether VBUS detection is done via
* software (1) or hardware (0). When software detection is
* selected, VBUS_CTRL selects whether USB is not connected (0)

16
include/configs/omap1510.h
View file

@ -612,22 +612,6 @@ typedef struct {
int cpu_type(void);
#endif
/*
* EVM Implementation Specifics.
*
* *** NOTE ***
* Any definitions in these files should be prefixed by an identifier -
* eg. OMAP1510P1_FLASH0_BASE .
*
*/
#ifdef CONFIG_OMAP_INNOVATOR
#include "innovator.h"
#endif
#ifdef CONFIG_OMAP_1510P1
#include "omap1510p1.h"
#endif
/*****************************************************************************/
#define CLKGEN_RESET_BASE (0xfffece00)

7
include/ns16550.h
View file

@ -64,8 +64,6 @@ struct NS16550 {
UART_REG(uasr); /* F */
UART_REG(scr); /* 10*/
UART_REG(ssr); /* 11*/
UART_REG(reg12); /* 12*/
UART_REG(osc_12m_sel); /* 13*/
#endif
};
@ -164,11 +162,6 @@ typedef struct NS16550 *NS16550_t;
#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */
#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
#ifdef CONFIG_OMAP1510
#define OSC_12M_SEL 0x01 /* selects 6.5 * current clk div */
#endif
/* useful defaults for LCR */
#define UART_LCR_8N1 0x03

4
include/usb/udc.h
View file

@ -12,8 +12,8 @@
#define EP_MAX_PACKET_SIZE 64
#endif
#if !defined(CONFIG_PPC) && !defined(CONFIG_OMAP1510)
/* omap1510_udc.h and mpc8xx_udc.h will set these values */
#if !defined(CONFIG_PPC)
/* mpc8xx_udc.h will set these values */
#define UDC_OUT_PACKET_SIZE EP_MAX_PACKET_SIZE
#define UDC_IN_PACKET_SIZE EP_MAX_PACKET_SIZE
#define UDC_INT_PACKET_SIZE EP_MAX_PACKET_SIZE