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riscv: qemu: Use correct SYS_TEXT_BASE for S-mode on 32bit system
For 32bit system, the OpenSBI (or BBL) will jump to 0x80400000 address in S-mode whereas for 64bit system it will jump to 0x80200000 address in S-mode. Currently, the S-mode U-Boot sets SYS_TEXT_BASE to 0x80200000 for both 32bit and 64bit system. This breaks S-mode U-Boot for 32bit system. This patch sets different SYS_TEXT_BASE for 32bit and 64bit system so that S-mode U-Boot works fine for both. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Tested-by: Karsten Merker <merker@debian.org>
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1 changed files with 2 additions and 1 deletions
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@ -14,7 +14,8 @@ config SYS_CONFIG_NAME
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config SYS_TEXT_BASE
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default 0x80000000 if !RISCV_SMODE
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default 0x80200000 if RISCV_SMODE
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default 0x80200000 if RISCV_SMODE && ARCH_RV64I
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default 0x80400000 if RISCV_SMODE && ARCH_RV32I
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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