riscv: qemu: Use correct SYS_TEXT_BASE for S-mode on 32bit system

For 32bit system, the OpenSBI (or BBL) will jump to 0x80400000 address
in S-mode whereas for 64bit system it will jump to 0x80200000 address
in S-mode.

Currently, the S-mode U-Boot sets SYS_TEXT_BASE to 0x80200000 for both
32bit and 64bit system. This breaks S-mode U-Boot for 32bit system.

This patch sets different SYS_TEXT_BASE for 32bit and 64bit system so
that S-mode U-Boot works fine for both.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Karsten Merker <merker@debian.org>
This commit is contained in:
Anup Patel 2019-04-11 06:52:12 +00:00 committed by Andes
parent 081c660201
commit 8aa278df0a

View file

@ -14,7 +14,8 @@ config SYS_CONFIG_NAME
config SYS_TEXT_BASE
default 0x80000000 if !RISCV_SMODE
default 0x80200000 if RISCV_SMODE
default 0x80200000 if RISCV_SMODE && ARCH_RV64I
default 0x80400000 if RISCV_SMODE && ARCH_RV32I
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y