- r2dplus updates
This commit is contained in:
Tom Rini 2020-08-05 16:06:42 -04:00
commit 89150a9314
4 changed files with 41 additions and 4 deletions

View file

@ -10,6 +10,29 @@
model = "R2D";
compatible = "renesas,r2d", "renesas,sh7751";
#address-cells = <2>;
#size-cells = <2>;
aliases {
serial0 = &scif1;
};
scif_clks: scif60 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <60000000>;
u-boot,dm-pre-reloc;
};
scif1: serial@ffe80000 {
compatible = "renesas,scif";
reg = <0 0xffe80000 0 0x1000>;
clocks = <&scif_clks>;
clock-names = "fck";
status = "okay";
u-boot,dm-pre-reloc;
};
pci@fe200000 {
compatible = "renesas,pci-sh7751";
device_type = "pci";

View file

@ -53,7 +53,10 @@ _start:
mov.l ._gd_init, r13 /* global data */
mov.l ._stack_init, r15 /* stack */
#if CONFIG_VAL(SYS_MALLOC_F_LEN)
mov.l ._gd_malloc_base, r14
mov.l r15, @r14
#endif
mov.l ._sh_generic_init, r0
jsr @r0
mov #0, r4
@ -70,5 +73,8 @@ loop:
._bss_start: .long bss_start
._bss_end: .long bss_end
._gd_init: .long (_start - GENERATED_GBL_DATA_SIZE)
#if CONFIG_VAL(SYS_MALLOC_F_LEN)
._gd_malloc_base: .long (_start - GENERATED_GBL_DATA_SIZE + GD_MALLOC_BASE)
#endif
._stack_init: .long (_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)
._sh_generic_init: .long board_init_f

View file

@ -4,10 +4,11 @@ CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DEFAULT_DEVICE_TREE="sh7751-r2dplus"
CONFIG_TARGET_R2DPLUS=y
# CONFIG_SYS_MALLOC_F is not set
CONFIG_BOOTDELAY=-1
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttySC0,115200"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="pci enum"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_DM=y
@ -24,12 +25,20 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xA0040000
CONFIG_DM=y
CONFIG_CLK=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_DM_ETH=y
CONFIG_E1000=y
CONFIG_EEPRO100=y
CONFIG_PCNET=y
CONFIG_RTL8139=y
CONFIG_TULIP=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SERIAL_RX_BUFFER=y
CONFIG_SCIF_CONSOLE=y
CONFIG_USE_PRIVATE_LIBGCC=y

View file

@ -35,7 +35,6 @@
* SuperH Clock setting
*/
#define CONFIG_SYS_CLK_FREQ 60000000
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */
/*