mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 23:24:38 +00:00
mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND
Add more clarity by changing the Kconfig entry name. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [trini: Re-run migration, update a few more cases] Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
This commit is contained in:
parent
94d022bb40
commit
88718be300
324 changed files with 419 additions and 390 deletions
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@ -974,7 +974,7 @@ config ARCH_SUNXI
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select SPL_USE_TINY_PRINTF
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imply CMD_DM
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imply CMD_GPT
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imply CMD_UBI if NAND
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imply CMD_UBI if MTD_RAW_NAND
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imply DISTRO_DEFAULTS
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imply FAT_WRITE
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imply FIT
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@ -1004,7 +1004,7 @@ config ARCH_VF610
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select CPU_V7A
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select SYS_FSL_ERRATUM_ESDHC111
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imply CMD_MTDPARTS
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imply NAND
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imply MTD_RAW_NAND
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config ARCH_ZYNQ
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bool "Xilinx Zynq based platform"
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@ -80,7 +80,7 @@ config CMD_HDMIDETECT
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config CMD_NANDBCB
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bool "i.MX6 NAND Boot Control Block(BCB) command"
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depends on NAND && CMD_MTDPARTS
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depends on MTD_RAW_NAND && CMD_MTDPARTS
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select BCH if MX6UL || MX6ULL
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default y if (ARCH_MX6 && NAND_MXS) || (ARCH_MX7 && NAND_MXS)
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help
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@ -25,7 +25,7 @@ const struct gpmc *gpmc_cfg = (struct gpmc *)GPMC_BASE;
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#if defined(CONFIG_NOR)
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char gpmc_cs0_flash = MTD_DEV_TYPE_NOR;
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#elif defined(CONFIG_NAND) || defined(CONFIG_CMD_NAND)
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#elif defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_CMD_NAND)
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char gpmc_cs0_flash = MTD_DEV_TYPE_NAND;
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#elif defined(CONFIG_CMD_ONENAND)
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char gpmc_cs0_flash = MTD_DEV_TYPE_ONENAND;
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@ -93,7 +93,7 @@ void set_gpmc_cs0(int flash_type)
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STNOR_GPMC_CONFIG7
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};
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#endif
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#if defined(CONFIG_NAND) || defined(CONFIG_CMD_NAND)
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#if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_CMD_NAND)
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const u32 gpmc_regs_nand[GPMC_MAX_REG] = {
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M_NAND_GPMC_CONFIG1,
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M_NAND_GPMC_CONFIG2,
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@ -128,7 +128,7 @@ void set_gpmc_cs0(int flash_type)
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GPMC_SIZE_16M)));
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break;
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#endif
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#if defined(CONFIG_NAND) || defined(CONFIG_CMD_NAND)
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#if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_CMD_NAND)
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case MTD_DEV_TYPE_NAND:
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gpmc_regs = gpmc_regs_nand;
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base = CONFIG_SYS_NAND_BASE;
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@ -150,7 +150,7 @@ int board_init(void)
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hw_watchdog_init();
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#endif
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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gpmc_init();
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#endif
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return 0;
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@ -118,7 +118,7 @@ static struct module_pin_mux mii2_pin_mux[] = {
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{OFFSET(gpmc_be1n), (MODE(1) | RXACTIVE)},/* MII1_COL */
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{-1},
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};
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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static struct module_pin_mux nand_pin_mux[] = {
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{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
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{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
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@ -180,7 +180,7 @@ static struct module_pin_mux gpIOs[] = {
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{OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS) },
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/* GPIO3_17 (MCASP0_AHCLKR) - ETH2_LEDY */
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{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS) },
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#ifndef CONFIG_NAND
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#ifndef CONFIG_MTD_RAW_NAND
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/* GPIO2_3 - NAND_OE */
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{OFFSET(gpmc_oen_ren), (MODE(7) | PULLDOWN_EN | RXACTIVE)},
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/* GPIO2_4 - NAND_WEN */
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@ -241,7 +241,7 @@ void enable_board_pin_mux(void)
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configure_module_pin_mux(i2c0_pin_mux);
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configure_module_pin_mux(mii1_pin_mux);
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configure_module_pin_mux(mii2_pin_mux);
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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configure_module_pin_mux(nand_pin_mux);
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#elif defined(CONFIG_MMC)
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configure_module_pin_mux(mmc1_pin_mux);
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@ -292,7 +292,7 @@ int board_init(void)
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#endif
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
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#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
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gpmc_init();
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#endif
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return 0;
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@ -180,7 +180,7 @@ int board_init(void)
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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gpmc_init();
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#endif
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return 0;
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@ -39,7 +39,7 @@ static struct module_pin_mux guardian_interfaces_pin_mux[] = {
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{-1},
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};
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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static struct module_pin_mux nand_pin_mux[] = {
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{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)},
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{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)},
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@ -82,7 +82,7 @@ void enable_i2c0_pin_mux(void)
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void enable_board_pin_mux(void)
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{
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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configure_module_pin_mux(nand_pin_mux);
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#endif
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configure_module_pin_mux(guardian_interfaces_pin_mux);
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@ -444,7 +444,7 @@ int board_init(void)
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puts("EEPROM Content Invalid.\n");
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
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#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
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gpmc_init();
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#endif
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shc_request_gpio();
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@ -221,7 +221,7 @@ int board_init(void)
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else
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config_board_mux(MUX_TYPE_SDHC);
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#if defined(CONFIG_NAND) && defined(CONFIG_FSL_QSPI)
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#if defined(CONFIG_MTD_RAW_NAND) && defined(CONFIG_FSL_QSPI)
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val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4);
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if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3))
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@ -76,7 +76,7 @@ int checkboard(void)
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printf("NOR vBank%d\n", reg);
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}
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#elif defined(CONFIG_TARGET_T1023RDB)
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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puts("NAND\n");
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#else
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printf("NOR vBank%d\n", t1023rdb_ctrl(I2C_GET_BANK));
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@ -42,7 +42,7 @@ static void ci20_mux_eth(void)
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{
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void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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/* setup pins (some already setup for NAND) */
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writel(0x04030000, gpio_regs + GPIO_PXINTC(0));
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writel(0x04030000, gpio_regs + GPIO_PXMASKC(0));
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@ -82,7 +82,7 @@ static struct module_pin_mux cbmux_pin_mux[] = {
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{-1},
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};
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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static struct module_pin_mux nand_pin_mux[] = {
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{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
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{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
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@ -118,7 +118,7 @@ void enable_board_pin_mux()
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configure_module_pin_mux(rmii1_pin_mux);
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configure_module_pin_mux(mmc0_pin_mux);
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configure_module_pin_mux(cbmux_pin_mux);
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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configure_module_pin_mux(nand_pin_mux);
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#endif
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#ifdef CONFIG_SPI
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@ -72,7 +72,7 @@ static struct module_pin_mux cbmux_pin_mux[] = {
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{-1},
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};
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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static struct module_pin_mux nand_pin_mux[] = {
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{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
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{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
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@ -108,7 +108,7 @@ void enable_board_pin_mux(void)
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configure_module_pin_mux(rmii1_pin_mux);
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configure_module_pin_mux(mmc0_pin_mux);
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configure_module_pin_mux(cbmux_pin_mux);
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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configure_module_pin_mux(nand_pin_mux);
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#endif
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#ifdef CONFIG_SPI
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@ -26,7 +26,7 @@ static struct module_pin_mux uart0_pin_mux[] = {
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{-1},
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};
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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static struct module_pin_mux nand_pin_mux[] = {
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{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
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{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
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@ -169,7 +169,7 @@ void enable_board_pin_mux(void)
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{
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configure_module_pin_mux(uart0_pin_mux);
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configure_module_pin_mux(i2c1_pin_mux);
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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configure_module_pin_mux(nand_pin_mux);
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#endif
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#ifndef CONFIG_NO_ETH
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@ -21,7 +21,7 @@ In order to accomodate that, we create a tool that will generate an
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SPL image that is ready to be programmed directly embedding the ECCs,
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randomized, and with the necessary bits needed to reduce the number of
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bitflips. The U-Boot build system, when configured for the NAND (with
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CONFIG_NAND=y) will also generate the image sunxi-spl-with-ecc.bin
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CONFIG_MTD_RAW_NAND=y) will also generate the image sunxi-spl-with-ecc.bin
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that will have been generated by that tool.
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In order to flash your U-Boot image onto a board, assuming that the
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@ -710,7 +710,7 @@ int board_init(void)
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#endif
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
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#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
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gpmc_init();
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#endif
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@ -195,7 +195,7 @@ static struct module_pin_mux rmii1_pin_mux[] = {
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{-1},
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};
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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static struct module_pin_mux nand_pin_mux[] = {
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{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */
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{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */
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@ -360,7 +360,7 @@ void enable_board_pin_mux(void)
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/* Beaglebone pinmux */
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configure_module_pin_mux(mii1_pin_mux);
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configure_module_pin_mux(mmc0_pin_mux);
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#if defined(CONFIG_NAND)
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#if defined(CONFIG_MTD_RAW_NAND)
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configure_module_pin_mux(nand_pin_mux);
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#elif defined(CONFIG_NOR)
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configure_module_pin_mux(bone_norcape_pin_mux);
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@ -376,7 +376,7 @@ void enable_board_pin_mux(void)
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if (profile & ~PROFILE_2)
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configure_module_pin_mux(i2c1_pin_mux);
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/* Profiles 2 & 3 don't have NAND */
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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if (profile & ~(PROFILE_2 | PROFILE_3))
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configure_module_pin_mux(nand_pin_mux);
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#endif
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}
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/* Beaglebone LT pinmux */
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configure_module_pin_mux(mmc0_pin_mux);
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#if defined(CONFIG_NAND) && defined(CONFIG_EMMC_BOOT)
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#if defined(CONFIG_MTD_RAW_NAND) && defined(CONFIG_EMMC_BOOT)
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configure_module_pin_mux(nand_pin_mux);
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#elif defined(CONFIG_NOR) && defined(CONFIG_EMMC_BOOT)
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configure_module_pin_mux(bone_norcape_pin_mux);
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@ -73,7 +73,7 @@ static struct module_pin_mux gpio5_7_pin_mux[] = {
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{-1},
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};
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#ifdef CONFIG_NAND
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#ifdef CONFIG_MTD_RAW_NAND
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static struct module_pin_mux nand_pin_mux[] = {
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{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */
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{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */
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if (board_is_evm()) {
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configure_module_pin_mux(gpio5_7_pin_mux);
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configure_module_pin_mux(rgmii1_pin_mux);
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#if defined(CONFIG_NAND)
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#if defined(CONFIG_MTD_RAW_NAND)
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configure_module_pin_mux(nand_pin_mux);
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#endif
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} else if (board_is_sk() || board_is_idk()) {
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configure_module_pin_mux(rgmii1_pin_mux);
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#if defined(CONFIG_NAND)
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#if defined(CONFIG_MTD_RAW_NAND)
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printf("Error: NAND flash not present on this board\n");
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#endif
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configure_module_pin_mux(qspi_pin_mux);
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} else if (board_is_eposevm()) {
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configure_module_pin_mux(rmii1_pin_mux);
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#if defined(CONFIG_NAND)
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#if defined(CONFIG_MTD_RAW_NAND)
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configure_module_pin_mux(nand_pin_mux);
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#else
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configure_module_pin_mux(qspi_pin_mux);
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@ -784,7 +784,7 @@ void set_muxconf_regs(void)
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early_padconf, ARRAY_SIZE(early_padconf));
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}
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#if defined(CONFIG_NAND)
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#if defined(CONFIG_MTD_RAW_NAND)
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static int nand_sw_detect(void)
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{
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int rc;
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@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#if defined(CONFIG_NAND)
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#if defined(CONFIG_MTD_RAW_NAND)
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gpmc_init();
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#endif
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return 0;
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@ -265,7 +265,7 @@ int board_init(void)
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#endif
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
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#if defined(CONFIG_NOR) || defined(CONFIG_MTD_RAW_NAND)
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gpmc_init();
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#endif
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return 0;
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@ -112,7 +112,7 @@ void enable_board_pin_mux()
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configure_module_pin_mux(rmii1_pin_mux);
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configure_module_pin_mux(mmc0_pin_mux);
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#if defined(CONFIG_NAND)
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#if defined(CONFIG_MTD_RAW_NAND)
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configure_module_pin_mux(nand_pin_mux);
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#endif
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}
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@ -1954,7 +1954,7 @@ config CMD_JFFS2
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config CMD_MTDPARTS
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bool "MTD partition support"
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select MTD_DEVICE if (CMD_NAND || NAND)
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select MTD_DEVICE if (CMD_NAND || MTD_RAW_NAND)
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help
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MTD partitioning tool support.
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It is strongly encouraged to avoid using this command
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@ -303,7 +303,7 @@ config NOR_BOOT
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config NAND_BOOT
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bool "Support for booting from NAND flash"
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default n
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imply NAND
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imply MTD_RAW_NAND
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help
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Enabling this will make a U-Boot binary that is capable of being
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booted via NAND flash. This is not a must, some SoCs need this,
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@ -312,7 +312,7 @@ config NAND_BOOT
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config ONENAND_BOOT
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bool "Support for booting from ONENAND"
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default n
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imply NAND
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imply MTD_RAW_NAND
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help
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Enabling this will make a U-Boot binary that is capable of being
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booted via ONENAND. This is not a must, some SoCs need this,
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@ -46,7 +46,7 @@ CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -46,7 +46,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -37,7 +37,7 @@ CONFIG_ENV_IS_IN_NAND=y
|
|||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_FSL_CAAM=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -36,7 +36,7 @@ CONFIG_ENV_IS_IN_NAND=y
|
|||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_FSL_CAAM=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -44,7 +44,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -44,7 +44,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -44,7 +44,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -17,7 +17,7 @@ CONFIG_ENV_UBI_PART="UBI"
|
|||
CONFIG_ENV_UBI_VOLUME="uboot-env"
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
|
||||
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
|
||||
CONFIG_SYS_NAND_OOBSIZE=0x100
|
||||
|
|
|
@ -161,7 +161,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_PROTECTION=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
|
|
|
@ -160,7 +160,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_PROTECTION=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_PHY_MARVELL=y
|
||||
CONFIG_TSEC_ENET=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
|
|
|
@ -17,7 +17,7 @@ CONFIG_CMD_MTDPARTS=y
|
|||
CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition"
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
|
||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
|
||||
CONFIG_SYS_NAND_OOBSIZE=0x40
|
||||
|
|
|
@ -52,7 +52,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -51,7 +51,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -52,7 +52,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -51,7 +51,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -54,7 +54,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -53,7 +53,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -57,7 +57,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -56,7 +56,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -55,7 +55,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -53,7 +53,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -52,7 +52,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -50,7 +50,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -52,7 +52,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -59,7 +59,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -58,7 +58,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -37,7 +37,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -33,7 +33,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -37,7 +37,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -34,7 +34,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -34,7 +34,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -34,7 +34,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -38,7 +38,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -54,7 +54,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -56,7 +56,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -59,7 +59,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -53,7 +53,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -54,7 +54,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -57,7 +57,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -58,7 +58,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -56,7 +56,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -56,7 +56,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -55,7 +55,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -50,7 +50,7 @@ CONFIG_FLASH_CFI_DRIVER=y
|
|||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -46,7 +46,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -46,7 +46,7 @@ CONFIG_MTD_NOR_FLASH=y
|
|||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
CONFIG_SF_DEFAULT_SPEED=10000000
|
||||
|
|
|
@ -48,7 +48,7 @@ CONFIG_SYS_OMAP24_I2C_SPEED=1000
|
|||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_MMC_OMAP_HS_ADMA=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
|
||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x00080000
|
||||
CONFIG_PHY_ADDR_ENABLE=y
|
||||
|
|
|
@ -49,7 +49,7 @@ CONFIG_MISC=y
|
|||
CONFIG_DM_MMC=y
|
||||
# CONFIG_MMC_HW_PARTITIONING is not set
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_SPEED=24000000
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
|
|
|
@ -61,7 +61,7 @@ CONFIG_BOOTCOUNT_ENV=y
|
|||
CONFIG_MISC=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
|
||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x100000
|
||||
CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x200000
|
||||
|
|
|
@ -43,7 +43,7 @@ CONFIG_MISC=y
|
|||
CONFIG_DM_MMC=y
|
||||
# CONFIG_MMC_HW_PARTITIONING is not set
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_SPEED=24000000
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
|
|
|
@ -45,7 +45,7 @@ CONFIG_MISC=y
|
|||
CONFIG_DM_MMC=y
|
||||
# CONFIG_MMC_HW_PARTITIONING is not set
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_SPEED=24000000
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
|
|
|
@ -64,7 +64,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_MTD_UBI_FASTMAP=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_DRIVER_TI_CPSW=y
|
||||
|
|
|
@ -26,7 +26,7 @@ CONFIG_CMD_FAT=y
|
|||
CONFIG_CMD_JFFS2=y
|
||||
CONFIG_ENV_IS_IN_NAND=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
|
||||
CONFIG_SPL_NAND_SIMPLE=y
|
||||
CONFIG_CONS_INDEX=3
|
||||
|
|
|
@ -49,7 +49,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
|
|||
CONFIG_SPL_OF_TRANSLATE=y
|
||||
CONFIG_DM_PCA953X=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
|
||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
|
||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
|
||||
|
|
|
@ -49,7 +49,7 @@ CONFIG_DM_GPIO=y
|
|||
CONFIG_MISC=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SF_DEFAULT_SPEED=48000000
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_PHY_GIGE=y
|
||||
|
|
|
@ -37,7 +37,7 @@ CONFIG_DFU_SF=y
|
|||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SF_DEFAULT_SPEED=48000000
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_PHY_GIGE=y
|
||||
|
|
|
@ -49,7 +49,7 @@ CONFIG_DFU_SF=y
|
|||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SF_DEFAULT_SPEED=48000000
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_PHY_GIGE=y
|
||||
|
|
|
@ -47,7 +47,7 @@ CONFIG_DFU_SF=y
|
|||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_SF_DEFAULT_SPEED=48000000
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_PHY_GIGE=y
|
||||
|
|
|
@ -48,7 +48,7 @@ CONFIG_FPGA_XILINX=y
|
|||
CONFIG_FPGA_SPARTAN3=y
|
||||
CONFIG_MXC_GPIO=y
|
||||
CONFIG_MMC_MXC=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_NAND_MXC=y
|
||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
|
||||
CONFIG_MII=y
|
||||
|
|
|
@ -38,7 +38,7 @@ CONFIG_ENV_OFFSET_REDUND=0x180000
|
|||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_MXS_GPIO=y
|
||||
CONFIG_MMC_MXS=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_NAND_MXS=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_CONS_INDEX=0
|
||||
|
|
|
@ -42,7 +42,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
|||
CONFIG_ENV_OFFSET_REDUND=0xE0000
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_FSL_USDHC=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_NAND_MXS=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_BUS=3
|
||||
|
|
|
@ -42,7 +42,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
|||
CONFIG_ENV_OFFSET_REDUND=0xE0000
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_FSL_USDHC=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_NAND_MXS=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_MODE=0
|
||||
|
|
|
@ -42,7 +42,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
|||
CONFIG_ENV_OFFSET_REDUND=0xE0000
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_FSL_USDHC=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
CONFIG_NAND_MXS=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SF_DEFAULT_BUS=3
|
||||
|
|
|
@ -41,7 +41,7 @@ CONFIG_CLK_AT91=y
|
|||
CONFIG_DM_GPIO=y
|
||||
CONFIG_AT91_GPIO=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
|
|
|
@ -41,7 +41,7 @@ CONFIG_CLK_AT91=y
|
|||
CONFIG_DM_GPIO=y
|
||||
CONFIG_AT91_GPIO=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
|
|
|
@ -38,7 +38,7 @@ CONFIG_CLK_AT91=y
|
|||
CONFIG_DM_GPIO=y
|
||||
CONFIG_AT91_GPIO=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
|
|
|
@ -41,7 +41,7 @@ CONFIG_CLK_AT91=y
|
|||
CONFIG_DM_GPIO=y
|
||||
CONFIG_AT91_GPIO=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
|
|
|
@ -41,7 +41,7 @@ CONFIG_CLK_AT91=y
|
|||
CONFIG_DM_GPIO=y
|
||||
CONFIG_AT91_GPIO=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
|
|
|
@ -38,7 +38,7 @@ CONFIG_CLK_AT91=y
|
|||
CONFIG_DM_GPIO=y
|
||||
CONFIG_AT91_GPIO=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
|
|
|
@ -46,7 +46,7 @@ CONFIG_DM_GPIO=y
|
|||
CONFIG_AT91_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
|
|
|
@ -46,7 +46,7 @@ CONFIG_DM_GPIO=y
|
|||
CONFIG_AT91_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
|
|
|
@ -43,7 +43,7 @@ CONFIG_DM_GPIO=y
|
|||
CONFIG_AT91_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
|
|
|
@ -46,7 +46,7 @@ CONFIG_GENERIC_ATMEL_MCI=y
|
|||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
|
|
|
@ -46,7 +46,7 @@ CONFIG_GENERIC_ATMEL_MCI=y
|
|||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
|
|
|
@ -41,7 +41,7 @@ CONFIG_CLK_AT91=y
|
|||
CONFIG_DM_GPIO=y
|
||||
CONFIG_AT91_GPIO=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_MTD_RAW_NAND=y
|
||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue